Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.
If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!
Questions? Contact your local staff coordinator: Click here
3:30 pm - 5:30 pm
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Add to Calendar2025-10-17 15:30:002025-10-17 17:30:00Flexible Hybrid Electronics Japan TC Chapter MeetingFlexible Hybrid Electronics (FHE) Japan TC Chapter Meeting Date: Friday, October 17, 2025Time: 3:30 PM - 5:30 PM JSTvia OVTCCM/ KOMORI CORPORATION, Tsukuba Plant, Ibaraki, Japan (Hybrid) AGENDA Standards Contact Information:Nahoko KogaCoordinator, SEMI JapanEmail: [email protected] NOTE:Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!Questions? Contact your local staff coordinator: Click hereKOMORI CORPORATION, Tsukuba Plant 203-1 Nakayama Tsukuba-shi, Ibaraki 300-1268 JapanSEMI.org[email protected]Asia/Tokyopublic
Asia/Tokyo
A digital twin is a computer representation of the structure, context, and behavior of physical systems, which are critical components in the optimization of computational systems, accurately representing physical systems and processes. A Digital Twin can be used to reduce or eliminate iterative physical experiments needed for optimization, thereby enhancing yield, saving time, and resources. Semiconductor manufacturing involves numerous complex steps, where accurate control of each step is crucial to achieving the overall manufacturing yield and minimizing variations in device characteristics. The complexity of the manufacturing processes' flows limits flexibility for testing novel approaches. Unit processes can be based on first-principal models (physics-based), data-based models, or hybrid models combining both approaches when possible. Fabrication processes in the cleanroom and on printed electronics tools are often a function of time-varying parameters, including those of the equipment, environment, and materials. The parameters often have co-dependencies across different process steps and tool sets.
This course will cover the necessary material to create DNN-based Digital twins for nanofabrication processes in cleanrooms. The course will include experimental details for data preparation, data processing, training models, and use case demonstrations. Nanofabrication process equipment can inherently have millions of internal variables and can learn from datasets, providing a robust and complementary approach to traditional feedback control and process stabilization methods. The included Digital Twin modes are developed using images (CD-SEMs, optical images), time history data (Optical Emission Spectroscopy), and textual process information (recipes and materials). The course will include: (1) Approaches to preprocess image data and create learning-based models, (2) using DNN-based domain translation for learning to predict the DUV nanolithography and ICP Plasma Etch, (3) virtual metrology methods for quantification of learning outcomes, and (4) developing a new class of process-aware DNN-based digital twins.
ABOUT THE SPEAKERS
Benyamin Davaji, PhD Benyamin Davaji is an Assistant Professor in the Electrical and Computer Engineering Department at Northeastern University. His research focuses on integrated microsystems with an emphasis on sensing and computation using mechanical waves, acoustic/ultrasound transducers, bio-interfaces, and microcalorimetry. He also applies data-guided methods to nanofabrication process development and semiconductor manufacturing. Dr. Davaji earned his PhD in Electrical and Computer Engineering from Marquette University in 2016 and later served as a post-doctoral associate at Cornell University’s School of Electrical and Computer Engineering.
Peter Doerschuk, PhD
Peter Doerschuk, Professor at Cornell University since 2006, previously served on the Purdue faculty in Electrical and Computer Engineering and Biomedical Engineering. He earned B.S., M.S., and Ph.D. degrees in Electrical Engineering from MIT, an M.D. from Harvard Medical School, and completed training at Brigham and Women’s Hospital and a postdoc at MIT. His research applies computational nonlinear stochastic systems to biology and medicine, spanning viral 3-D structure determination using electron microscopy and x-ray scattering, to nonlinear models of ethanol pharmacokinetics that enable sensor processing, pattern recognition, and individualized physiological analysis.
Join us for this engaging Master Class with Benyamin Davaji, PhD, Assistant Professor of Electrical and Computer Engineering at Northeastern University and Peter Doerschuk, Professor of Electrical and Computer Engineering and Biomedical Engineering at Cornell University, as they explore the role of digital twin models in advancing semiconductor manufacturing. The masterclass will highlight how data-guided methods and computational modeling are transforming unit process development, driving efficiency and innovation across the semiconductor industry. With expertise spanning microsystems, acoustic transducers, and nanofabrication, the speakers will provide insights into how digital twins can bridge research and production to accelerate breakthroughs in semiconductor technology.
Digital Twin Models for Semiconductor Manufacturing Unit Process
Flexible Electronics Master Class #27
10:00 am - 12:00 pm
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Add to Calendar2025-11-05 10:00:002025-11-05 12:00:00FEMC#27 Digital Twin Models for Semiconductor Manufacturing Unit ProcessJoin us for this engaging Master Class with Benyamin Davaji, PhD, Assistant Professor of Electrical and Computer Engineering at Northeastern University and Peter Doerschuk, Professor of Electrical and Computer Engineering and Biomedical Engineering at Cornell University, as they explore the role of digital twin models in advancing semiconductor manufacturing. The masterclass will highlight how data-guided methods and computational modeling are transforming unit process development, driving efficiency and innovation across the semiconductor industry. With expertise spanning microsystems, acoustic transducers, and nanofabrication, the speakers will provide insights into how digital twins can bridge research and production to accelerate breakthroughs in semiconductor technology.United StatesSEMI.org[email protected]America/Los_Angelespublic
America/Los_Angeles
Watch On-Demand
Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.
If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!
Questions? Contact your local staff coordinator: Click here
3:00 pm - 5:00 pm
Off
Add to Calendar2025-10-15 15:00:002025-10-15 17:00:00FPD Materials & Components and FPD Metrology Japan Joint TC Chapter MeetingFPD Materials & Components and FPD Metrology Japan Joint TC Chapter Meeting Date: Wednesday, October 15, 2025Time: 3:00 PM - 5:00 PM JSTvia OVTCCM/ SEMI Japan Office (Hybrid) AGENDA Standards Contact Information:Nahoko KogaCoordinator, SEMI JapanEmail: [email protected] NOTE:Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!Questions? Contact your local staff coordinator: Click hereSEMI Japan 26F, xLINK Marunouchi Eiraku Bldg. 1-4-1 Marunouchi Chiyoda-ku, Tokyo 1000005 JapanSEMI.org[email protected]Asia/Tokyopublic
Asia/Tokyo
Sponsoring will associate your company with the industry's most respected senior executives. Sponsorship opportunities can be tailored to meet your specific branding and marketing objectives.
The Surface Preparation and Cleaning Conference (SPCC) is a premier technical forum dedicated to advancing surface preparation, cleaning technologies, and wet processes essential to semiconductor manufacturing. Formerly presented by Linx Consulting, SPCC continues its legacy of delivering high-quality technical content through invited presentations, peer-reviewed sessions, and poster presentations covering all aspects of cleaning science, process integration, materials, equipment, and metrology.
SPCC will feature invited business-focused presentations that examine macroeconomic, market, and structural trends shaping the global semiconductor industry that were formerly included in the Business Interface Conference (BIC). These sessions will provide attendees with valuable context on industry dynamics, supply chain, and strategic outlooks that complement the technical discussions at SPCC.
Now a unified conference, SPCC unites both business and technical aspects of industry into a comprehensive program that bridges technology development and business strategy, offering attendees enhanced opportunities for cross-disciplinary learning, collaboration, and networking with industry leaders, researchers, and decision-makers across the semiconductor ecosystem.
Join our premier technical forum with topics including—
Cleaning Science
Equipment
Industry Dynamics
Materials
Metrology
Process Integration
Strategic Outlook
Supply Chain
Wild Horse Pass 5040 Wild Horse Pass Blvd Chandler, AZ , AZ85226 United States
Surface Preparation and Cleaning Conference (SPCC), formerly presented by Linx Consulting, brings together key business insights, IC manufacturers, equipment makers, materials and chemical providers, metrology experts, process technologists to address critical challenges, and innovations in surface preparation and cleaning.
Held at the Wild Horse Pass Resort in Chandler, Arizona, SPCC 2026 will feature technical sessions, poster presentations, and business-focused programming, creating a unique forum where technology and industry strategy converge.
Surface Preparation & Cleaning Conference—SPCC
May 18–20, 2026
Wild Horse Pass, Chandler, AZ
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Add to Calendar2026-05-18 00:00:002026-05-20 00:00:00SPCC 2026—Surface Preparation & Cleaning Conference Surface Preparation and Cleaning Conference (SPCC), formerly presented by Linx Consulting, brings together key business insights, IC manufacturers, equipment makers, materials and chemical providers, metrology experts, process technologists to address critical challenges, and innovations in surface preparation and cleaning.Held at the Wild Horse Pass Resort in Chandler, Arizona, SPCC 2026 will feature technical sessions, poster presentations, and business-focused programming, creating a unique forum where technology and industry strategy converge.Wild Horse Pass 5040 Wild Horse Pass Blvd Chandler, AZ , AZ 85226 United StatesSEMI.org[email protected]America/Phoenixpublic
America/Phoenix
Join us for an insightful webinar as we present the findings from the 2025 Semiconductor Supply Chain Survey, a collaborative effort between the SEMI Supply Chain Management initiative and McKinsey & Company.
The annual survey aims to establish benchmarks for operational agility metrics, covering the entire value chain from material suppliers to OEMs, offering a comprehensive view of the landscape. New this year are additional insights on trends in LTAs and organizational supply chain management capabilities
During this webinar, we will share results from the survey uncovering key trends, challenges, and opportunities within the semiconductor supply chain. By attending, you'll gain valuable insights to benchmark your organization against peers, identify areas for improvement, and course-correct more effectively. Please contact us if you like to learn about how your company can participate in the SCM initiative.
Join us for a webinar highlighting the 2025 Semiconductor Supply Chain Survey results, conducted by SEMI SCM initiative and McKinsey & Company. Gain fresh insights into operational agility, LTAs, and SCM capabilities across the value chain. Discover key trends, challenges, and opportunities to benchmark your organization and strengthen supply chain resilience.
2025 Semiconductor Supply Chain survey: Insights for strategy and capabilities
9:00 am - 10:00 am
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Add to Calendar2025-09-23 09:00:002025-09-23 10:00:002025 Semiconductor Supply Chain survey: Insights for strategy and capabilitiesJoin us for a webinar highlighting the 2025 Semiconductor Supply Chain Survey results, conducted by SEMI SCM initiative and McKinsey & Company. Gain fresh insights into operational agility, LTAs, and SCM capabilities across the value chain. Discover key trends, challenges, and opportunities to benchmark your organization and strengthen supply chain resilience.Choose your session:US/EU: 9:00 AM – 10:00 AM PT [ Register Now ]Asia/US: 5:00 PM – 6:00 PM PT [ Register Now ]United StatesSEMI.org[email protected]America/Los_Angelespublic
America/Los_Angeles
Speakers
Henry Marcil
Partner
McKinsey & Company
Bio: Leader in McKinsey’s Advanced Industries Practice, focused on semiconductors n and key end markets (e.g., high tech)
Leads McKinsey’s Resiliency and Geopolitics service line in Semiconductor
Kushal Jolapara
Engagement Manager
McKinsey & Company
Bio: Manager in McKinsey's Operations practice, with a focus on product development and procurement service lines
Leads Supply Chain studies for Advanced Industries clients including Aerospace, Auto and Semiconductors
Dan Peacock
Engagement Manager
McKinsey & Company
Bio: Manager in McKinsey’s Operations Practice, focused on procurement and capital projects
Leads Operations projects at Foundries, IDMs, and equipment clients
• Lead times throughout the semiconductor value chain • Landscape and trends in purchasing agreements and LTAs • Demand forecasts, backlogs, and end markets • Market outlook, opportunities, and threats • New for 2025: Organizational capabilities in supply chain management
Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.
If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!
Questions? Contact your local staff coordinator: Click here
Physical Interfaces & Carriers Japan TC Chapter Meeting
10:00 am - 1:00 pm
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Add to Calendar2025-09-26 10:00:002025-09-26 13:00:00Physical Interfaces & Carriers Japan TC Chapter MeetingPhysical Interfaces & Carriers Japan TC Chapter Meeting Date: Friday, September 26, 2025Time: 10:00 am - 1:00 pm JSTVenue: SEMI Japan Office + OVTCCM (Hybrid) AGENDA Standards Contact Information:Takeaki HirabaraStandards & EHS, SEMI JapanEmail: [email protected] NOTE:Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!Questions? Contact your local staff coordinator: Click hereSEMI Japan Office 26F, xLINK Marunouchi Eiraku Bldg. 1-4-1 Marunouchi, Chiyoda-ku, Tokyo 1000005 JapanSEMI.org[email protected]Asia/Tokyopublic
Asia/Tokyo
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Standards
9:00 am - 5:30 pm
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Add to Calendar2025-11-19 09:00:002025-11-20 17:30:00SEMICON Europe Standards Meetings 2025Munich GermanySEMI.org[email protected]America/Los_Angelespublic
The IRDS Roadmap has identified near-term challenges related to measurements of particles, trace metals and organics in liquid chemicals at levels required to meet the needs of the industry. The identified challenges are measurement of 10 nm and smaller particles, sub ppt measurement of metallic impurities, measurement of particle precursors and trace organics and online speciation of trace organics. The focus of the workshop will be on recent advances in analytical methodology and instrumentation that will enable the industry to meet these challenges.
In-Person—Mountain Time Phoenix Convention Center North Building, 200 Level, Room 229B Phoenix, AZ United States
9:00 am - 11:30 am
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Add to Calendar2025-10-08 09:00:002025-10-08 11:30:00SEMI Liquid Chemicals Analytical WorkshopSEMI Analytical WorkshopIn-Person—Mountain Time Phoenix Convention Center North Building, 200 Level, Room 229B Phoenix, AZ United StatesSEMI.org[email protected]America/Los_Angelespublic
Contact
For any questions about the event, please contact:
Since 2018, the SEMI Voltage Sag Task Force—comprising Fabs, Utilities, OEMs, Tool Suppliers, and EPRI—has collaborated to address a persistent challenge: why do tools remain vulnerable to voltage sags despite the implementation of SEMI F47?
Over seven years, the task force has investigated the power quality environment, tool susceptibility, testing methodologies, and mitigation strategies. This deep dive has led to actionable recommendations for strengthening the SEMI F47 standard and improving tool resilience in future builds.
What to Expect
Join us for a comprehensive workshop that will:
Review the task force’s findings and collaborative efforts
Share insights from key stakeholders
Present proposed revisions to the SEMI F47 standard
Discuss how these updates can enhance tool performance and reliability
In-Person—Mountain Time Phoenix Convention Center North Building, 200 Level, Room 229B Phoenix, AZ United States
SEMI F47 Background & Voltage Sag Immunity Task Force Review
Biography
Mark will present the background of the 7-year effort, the findings from the work , proposed updates and pathways towards improvements and will close out with a summary and next steps.
2:50 pm
Baselining PQ Data from Semiconductor Fabs
3:05 pm
Zachary Pike
SMTS Facilities Electrical Engineer
GlobalFoundries
Insights from Global Foundries
Biography
Zack will present on Global Foundries experiences with semiconductor tool shutdowns, efforts toward improvement and the types of voltage sags that are still causing tool downtime.
2:20 pm
Clayton Burns
Principal Engineer, Transmission Planning & Asset Management
National Grid
Experiences from National Grid
Biography
Clay will discuss the power quality environment, relay concepts such as area of vulnerability, and the need for including some level of three-phase voltage sag testing.
3:35 pm
Task Force Leader
Mark Stephen
Program Manager
EPRI
Key Findings from Research and Testing
3:50 pm
Proposed Updates to the SEMI F47 Standard from Task Force Work
Enhancing Voltage Sag Immunity: SEMI F47 Standard Updates & Insights Workshop
This is a must-attend session for professionals involved in semiconductor manufacturing, power quality engineering, and equipment design.
Enhancing Voltage Sag Immunity - A Workshop
2:30 pm - 4:30 pm
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Add to Calendar2025-10-08 14:30:002025-10-08 16:30:00Enhancing Voltage Sag Immunity: SEMI F47 Standard Updates & Insights WorkshopEnhancing Voltage Sag Immunity: SEMI F47 Standard Updates & Insights WorkshopThis is a must-attend session for professionals involved in semiconductor manufacturing, power quality engineering, and equipment design.In-Person—Mountain Time Phoenix Convention Center North Building, 200 Level, Room 229B Phoenix, AZ United StatesSEMI.org[email protected]America/Los_Angelespublic
Contact
For any questions about the event, please contact:
