Advancements in Wafer Backside cleaning for DRAM Manufacturing
As semiconductor device dimensions continue to shrink and the number of mask layers increases, photolithography depth of focus and overlay tolerances have become increasingly stringent. While surface defect control has traditionally been prioritized, backside defects—once considered negligible—now pose significant challenges, including wafer deflection, focus spot formation, and yield loss. Backside contamination from particles, scratches, and unwanted films can lead to warpage, vacuum chuck errors, and transfer failures, impacting both yield and productivity. Conventional backside cleaning methods, such as physical scrubbing and chemical cleaning, offer partial solutions but fail to address embedded defects and scratches without introducing risks like silicon damage or bevel distortion. To overcome these limitations, an advanced backside polishing technology has been developed. This approach incorporates hard materials (e.g., diamond, SiC) into polishing brushes and applies controlled mechanical load during scanning, enabling effective removal of embedded defects and scratches while preserving wafer integrity. This paper reviews the evolution of backside cleaning techniques, highlights the technical challenges posed by advanced DRAM manufacturing, and demonstrates how backside polishing mitigates defocus, overlay degradation, and hotspot issues in photolithography. Future directions and expectations for equipment innovation are also discussed.
BIOGRAPHY
Hiroki Uoyama received the B.S. (2006), M.S. (2008), and Ph.D. (2011) in Science from Ehime University, Japan, specializing in organic chemistry and materials science. He held JSPS Research Fellowships at Ehime University and Kyushu University. He then joined Central Glass Co., Ltd. (2012–2018), serving as Researcher and Chief Researcher. Since 2018, he has been with Micron’s F15 ADTJ ATE WET group in Higashi Hiroshima and currently serves as Manager, leading teams for SWC, batch, and scrubber. His technical expertise spans wet clean and SCRUB technologies—including nanospray, TMAH and SC1 brushes, backside polish/CMP—as well as SWC (hot plate/DIO₃). He has pioneered DIO₃ replacement from SPM and introduced backside polish SCRUB and backside CMP to production with demonstrated yield and reliability gains.