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Add to Calendar2026-02-11 00:00:002026-02-13 00:00:00SEMICON Korea 2026TRANSFORM TOMORROWThe future of the semiconductor industry starts here.Join us at SEMICON Korea 2026 to shape tomorrow together. HoursFebruary 11, 2026 | 10:00-17:00 (Last entry 16:30)February 12, 2026 | 10:00-17:00 (Last entry 16:30)February 13, 2026 | 10:00-16:00 (Last entry 15:30)VenueCOEX (Hall A, B, C, D, E, Grand Ballroom, Platz and ASEM Ballroom)Westin Seoul ParnasGrand InterContinental Seoul ParnasScale550 Exhibitors, 2409 booths (2025: 501 exhibitors, 2301 booths)Seoul South KoreaSEMI.org[email protected]America/Los_Angelespublic
Heterogeneous Integration (HI) has come a long way in 50 years. The world of multi-chip modules (MCMs) has given way to a vast ecosystem of chiplets, 3D stacked die, and co-packaging of antenna, high-bandwidth memory (HBM), and optics. HI is at the center of “More than Moore” development activities, as innovative engineers look for creative ways to overcome the slower scaling of silicon technology. The promise of HI is new devices with superior power, performance, area, and cost (PPAC). All these promises come with new challenges. Managing different process nodes, physical characteristics, mechanical stresses, and other system-level challenges not found in monolithic system-on-chip (SoC) devices, creates a great opportunity for design and manufacturing companies to reshape our industry.
In this webinar, we’ll explore this enabling technology from both the device maker and material supplier perspectives. We will learn about demands placed on devices by new applications and what new tools are needed to meet these demands. We will also hear about the challenges placed on materials and equipment suppliers to develop processes capable of manufacturing the individual components and integrating them into final products. Join us as our panel of experts address the issues and opportunities involved with heterogeneous integration.
United States
Arsalan Alam, PhD
Member of Technical Staff (MTS), 3D Stacking Technology Group
AMD Packaging
2nd Generation 3D V-Cache™ Enablement
Andrea Chacko, PhD
Director of Packaging Solutions
Brewer Science
Dongshun Bai, PhD
Business Development Director and Senior Technologist of Packaging Solutions
Brewer Science
Enabling Heterogeneous Integration through Material Design
The realization of Heterogeneous Integration (HI) has been key in driving advancements in semiconductor technology. The complexities of integrating dissimilar materials continue to be a challenge for HI. All advanced packaging technologies rely on advanced materials to address the many challenges in achieving continued shrinking and improved performance of devices. Novel materials capable of managing mechanical stresses and increased thermal budgets with strict cleanliness requirements are required for processes such as wafer thinning, fan-out wafer-level packaging, and hybrid bonding. This presentation will highlight how advanced materials can address the growing challenges in the industry.
Dive into the dynamic world of semiconductor materials and discover the future landscape as the industry experts provide a glimpse into the future of the semiconductor ecosystem in the era of heterogenous integration.
Heterogenous Integration finds its place
Webinar
10:00 am - 11:00 am PT
Zoom
10:00 am - 11:00 am
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Add to Calendar2024-10-16 10:00:002024-10-16 11:00:00Heterogeneous Integration finds its placeDive into the dynamic world of semiconductor materials and discover the future landscape as the industry experts provide a glimpse into the future of the semiconductor ecosystem in the era of heterogenous integration.United StatesSEMI.org[email protected]America/Los_Angelespublic
America/Los_Angeles
REGISTER NOW
INAUGURAL EVENT FOCUSED ON SMART MANUFACTURING & SMART MOBILITY
Join us for a groundbreaking Midwest conference and tradeshow on April 1-2, 2025, focused on Smart Manufacturing and Smart Mobility with an emphasis on the semiconductor industry! Automotive electronics and smart manufacturing are two of the key end markets on the path to $1T in semiconductor revenue.
A significant amount of both markets is concentrated in the Midwestern United States. SEMIEXPO in the Heartland will bring these two key markets together and provide an opportunity for collaboration and growth.
Smart Manufacturing
The program will focus on the deployment of Industry 4.0 or Smart Manufacturing tools, technologies, and methods for the semiconductors required for this growing market.
Smart Mobility
The program will unite stakeholders in the semiconductors/sensors and mobility ecosystems to identify and address technical issues and supply chain dynamics that are best addressed collectively.
Ways to Participate
Exhibit
Sponsor
Speak
Attend
MAKE YOUR MARK AT THE INAUGURAL SEMIEXPO HEARTLAND
Plan Now to Exhibit or Sponsor. Contact— Shane Poblete | +1 202-847-5983 | [email protected]
NEW EVENT!
April 1–2, 2025
Indiana Convention Center, Indianapolis, IN
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Add to Calendar2026-04-29 00:00:002026-04-30 00:00:00SEMIEXPO Heartland 2026Indiana Convention Center 100 S Capitol Ave Detroit, MI United StatesSEMI.org[email protected]America/Detroitpublic
America/Detroit
If you are registering to attend the Workshop Virtually, please follow the same registration procedure (via the Button Below) and we will email you the Dial-In information a week before the session.
Registration for this Workshop is separate from SEMICON West registration, but necessary to access the workshop room. To waive the SEMICON West Registration fee, use code "STANDARDSGUEST22" when registering on the SEMICON West Registration page.
In this workshop, our journey of navigating the detection limit obstacle course begins with a broad view of the problem focused on developing a conceptual understanding of key detection limit concepts and limitations. Statistics plays a key role in effective detection limit definition; but need to be the last and final piece of solving the detection limit puzzle where they drive the development of an appropriate statistical practice for detection limit standards.
The current version of SEMI C10 - Guide for Determination of Method Detection Limits sets out important and useful guidance for these concepts. Key detection limit concepts, including the problems caused by our natural biases must be explored and understood. Issues in detection limit and rule-set application will be probed since it is at the application level that detection limit standards succeed or fail.
Workshop Agenda
Part 1: Detecting the Detection Limit – Broad View of Detection Limit Standards / Issues
The Swamp: Why so much disagreement?
Basic Detection Limit concepts
Calibration’s under-appreciated role
Detection Limit Quantification Uncertainty
DL Usage Contexts and Reporting Practices
What’s required to build a Detection Limit standard?
Part 2: SEMI C10 – Guide for Determination of Method Detection Limits
How does it work?
What does it assume?
What are its strengths and limitations?
How should Semi C10 derived Detection Limits be applied?
What form could an update to SEMI C10 take and why?
@ SEMICON WEST Moscone Center San Francisco, CA United States
Join this workshop during SEMICON West 2022 to explore SEMI C10 and discuss how its application to your procedures will improve your yields and manufacturing processes. Quality experts, analytical experts, statisticians and those involved with product quality and process metrics should attend.
Determining the Detection Limit / SEMI C10
A Guide for Determination of Method Detection Limits
10:00 am - 11:30 am
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Add to Calendar2022-07-12 10:00:002022-07-12 11:30:00Determining the Detection Limit - SEMI C10Join this workshop during SEMICON West 2022 to explore SEMI C10 and discuss how its application to your procedures will improve your yields and manufacturing processes. Quality experts, analytical experts, statisticians and those involved with product quality and process metrics should attend.@ SEMICON WEST Moscone Center San Francisco, CA United StatesSEMI.org[email protected]America/Los_Angelespublic
America/Los_Angeles
