Held over three days, this FOA members-only meeting will focus on key speakers, open forums, market updates, and content that you have come to expect. Please plan on joining fellow industry peers at the meeting to network and share insights and best practices on the latest business, and technology trends affecting the electronics manufacturing industry. The FOA community stays connected and continues the good dialogue on keeping our fabs productive with the innovative solutions that members continue to drive even in the virtual environment.
About Fab Owners Alliance (FOA)
The Fab Owners Alliance, a SEMI technology community, is an international, group of semiconductors & MEMS fab owners and industry suppliers who meet regularly to discuss and act on common manufacturing issues, combining strengths and resources to maintain and increase their global competitiveness. Established in 2004, the FOA consists of 25+ device companies with over 120 semiconductor manufacturing facilities and 65+ suppliers to the industry. With a network of global offices, the FOA connects fab managers and accelerates manufacturing excellence at semiconductor fabs around the world.
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FOA
8:00 am - 11:30 am
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Add to Calendar2021-06-22 08:00:002021-06-24 11:30:00Fab Owners Alliance 2021 Q2 Meeting United StatesSEMI.org[email protected]America/Los_Angelespublic
America/Los_Angeles
Non-Member Price for Government, Military, and Academia: $199
Contact Michelle Fabiano at [email protected] for discount code. Must have a valid .gov, .mil or .edu or email address
Non-Member Price for Students: $199
Contact Michelle Fabiano at [email protected] for discount code. Must have a valid student identification card.
Bridging the Gap Between Engineering and the Life Sciences
OVERVIEW
The Symposium brought together experts to share their work and identify gaps to accelerating the development of technologies and optimize health outcomes. Topics covered included using AI in diagnostics and decision-making using AI; data fusion for real time diagnosis; and the impact of these technologies on rural and decentralized healthcare.
Layered on top was the topic of performance augmentation by reading biochemical markers, digital genomics, using new and proposed bio-sensors and wearables. We heard about tools and technologies available to assess physiological markers that are correlated to health and wellness such as stress, fatigue, chronic disease and cognition.
The forum focused on bringing together the players across the growing range of industries that are advancing human monitoring applications to:
share pre-competitive ideas that may be applied to product development
assess roadblocks in bringing human monitoring products to market
form partnerships that have become key in overcoming obstacles to successful manufacturing and product development
Symposium Planning Committee
Michael Brothers, PhD, UES
Dr. Andreas Caduff, Digital Medicine Society
Dr. Paul Chao, National Chiao Tung University
Caroline Desvergne, PhD, CEA-Leti
Doyle Edwards, Brewer Science
Dr. Johnsee Lee, Personal Genomics
Dr. Yi-Shao Liu, Helios Bioelectronics Inc.
Regina Shia, US Air Force Research Laboratory
Suren Uswatta, 1st Lt , US Air Force Research Laboratory
Natalie Wisniewski, PhD, Profusa, Inc.
Dr. Tsung-Lung Yang, Quality Improvement Center, Kaohsiung Veterans General Hospital
Background on SEMI NBMC
The Nano-Bio Materials Consortium (NBMC) was founded to bring together scientists, engineers and business development professionals from industry, government and universities to collaboratively initiate research and development of electronic technologies to improve human performance health monitoring, diagnostics and performance augmentation. The goal is to proactively build an ecosystem that can drive healthcare and medical electronics innovation towards products that serve society faster. These innovations are laying the groundwork for new products in in digital health and personalized medicine enabling overall health protection.
MODERATOR:
- Dr. Yi-Shao Liu, Helios Bioelectronics Inc.
PANELISTS:
- Dr. Paul Chao, National Chiao Tung University
Central Europe Time (CET)
MODERATOR:
- Dr. Yi-Shao Liu, Helios Bioelectronics Inc.
PANELISTS:
- Ben Carter, B-Secur
- Paru Deshpande, PhD, IMEC
- Dr. Golo von Basum, von basum consulting
- Dr. Paul Chao, National Chiao Tung University
Pacific Daylight Time (PDT)
MODERATOR:
- Dr. Yi-Shao Liu, Helios Bioelectronics Inc.
PANELISTS:
- Justin Reggi, HumanFirst
- Sheng Xu, UCSD
- Adrian Condon, B-Secur
- Matthew Dalton, Air Force Research Laboratory, Materials and Manufacturing Directorate
- Azar Alizadeh, GE Research
12:35 pm
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12:40 pm
Break for Moving to Breakout Rooms
12:40 pm
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1:00 pm
Breakout Rooms for Smaller Discussion
THURSDAY, JULY 29, 2021 (CST, CET, PDT) - SESSION 2: DECENTRALIZED DNA SEQUENCING & MOLECULAR DIAGNOSTICS
10:00 am
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10:05 am
MODERATOR
Dr. Yi-Shao Liu
Chief Operating Officer
Helios Bioelectronics, Inc.
Welcome
MODERATOR
Dr. Yi-Shao Liu
Chief Operating Officer, Helios Bioelectronics, Inc.
MODERATOR:
- Yu-Chuan Li, Taipei Medical Universtiy
PANELISTS:
- Paul Chua, Becton Dickinson
Central Europe Time (CET)
MODERATOR:
- Michael Brothers, UES, Inc.
PANELISTS:
- Angelos Echiadis, GlaxoSmithKline Pharmaceuticals Ltd
- Andrew Carmody, The Health Data Exchange
- Philipp Tholen, Zühlke Group
Pacific Daylight Time (PDT)
MODERATOR:
- Dr. Andreas Caduff, Digital Medicine Society
PANELISTS:
- Steve Steinhubl, PhysIQ
- Bobby Reddy, Jr., Prenosis
- Matteo Lai, Empatica
- Joseph Jarvis, Airman Biosciences Division (RHB), 711th Human Performance, Air Force Research Laboratory
12:35 pm
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12:40 pm
Breakout Room Instructions
12:40 pm
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1:00 pm
Breakout Rooms & Networking
THURSDAY, AUGUST 5, 2021 (CST, CET, PDT) - SESSION 4: APPLICATIONS IN RURAL & DECENTRALIZED HEALTHCARE IN THE DIGITAL AGE
10:00 am
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10:05 am
Welcome
MODERATOR (Chungyuan Standard Time (CST))
Stephen Lee
Director for Early Innovation Partnering for North Asia, Johnson & Johnson Innovation
MODERATOR (Central Europe Time (CET))
Jerome Mouly
Team Lead Analyst, Sensing & Actuating, Yole Développement
MODERATOR (Pacific Daylight Time (PDT))
Regina Shia
Research Psychologist, Air Force Research Laboratory
Associate Dean for Rural Health, MU School of Medicine & Senior Program Director for Health and Safety, MU Extension and Engagement
University of Missorui
Using Health Care Workforce, Community, and Health Indicators to Inform Policy, Education Methods, and Programming for Rural Providers Through Technology to Improve Health Outcomes in Missouri
- Tracy Greever-Rice, Director, MC Center for Health Policy
- E. Rachel Mutrux, Sr. Program Director, Missouri Telehealth Network & Show-Me ECHO
- Dena Higbee, Director, Russell D. and Mary B. Shelden Clinical Simulation Centers at the University of Missouri School of Medicine, and the Essig Simulation Center, Sinclair School of nursing
11:35 am
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12:05 pm
Jean-Charles DRON
e-Meuse santé COO
Département de la Meuse
E-Meuse santé, a Large-scale Transformation Project, Rooted in Territories, to Address Major Health Issues of the Population, Thanks to Digital, Organizational and Economic Innovations
The Global Smart MedTech Symposium was produced July 28-29, Aug 4-5, 2021, for a global audience with a wide range in international experts and panelists. Overall focused on bridging the gap between engineering and life sciences.
Each day had a different technical focus, enabling shared roadmaps and direction:
July 28 - Realtime Continuous Diagnostics & Monitoring
July 29 - Decentralized DNA Sequencing & Molecular Diagnostics
August 4 - Data Science & Infrastructure - AI/Data Fusion
August 5 - Applications in Rural & Decentralized Healthcare in the Digital Age
Presentations from subject matter experts and the subsequent panel discussions are available for each of three regions: Asia, Europe and North America.
2021 Global Smart MedTech Symposium
Bridging the Gap Between Engineering and the Life Sciences
Innovation for a Transforming World—Now On-Demand Through August 14, 2021
The transformation of our industry never ceases. As the data storm builds, the drivers for digital disruption are coming together at the first global conference for Innovation for a Transforming World.
Accelerated by the response to the global pandemic, the innovations enabled by the semiconductor ecosystem continue to evolve at breakneck speed. The crises of the past year emerged as a powerful force that hastened the merging of the physical and digital worlds. This brought dramatic changes to our ways of life.
At the tip of this rapidly building iceberg of challenges and opportunities, every business is weighing the most favorable blend of preservation and innovation. The Innovation for a Transforming World virtual event will explore the optimal balance of resources for both preserving current expertise and customers, while seeing where to innovate to engage the next technology demands and fortunes.
It is a fusion of strategy and successful tactics. It begins with design, materials, workforce, advanced manufacturing, and now, it adds utilization of unprecedented volumes of data, via the Cloud and AI. Not only will we forecast equipment, fab, packaging and semiconductor market demand, but also trends for emerging markets and design.
Offering insights for the digital next steps, the collaborative value of SEMI’s members provides the foundation that has helped to deliver the most productive half century in history. This platform and its tremendous collective assets will serve to power the global economy for the next 50 years.
Going forward, the space between the physical and digital will shrink even further, enabling us to do things we’ve never done before. Unheard-of innovations will materialize with greater frequency and immeasurable impact. Sharing best practices that can be applied today is critical to transformations.
PRESENTATION TOPICS
Day 1—Digital Transformation
How will your business thrive through disruption, providing resiliency, vision, and culture?
Does your organization have a 360* view of customer needs and digital touch points?
What are the next business models?
How has the process for innovation changed in a more decentralized world?
Day 2—Market Symposium: Market Outlook, Technology Trends, Market Indicators and Drivers
Explore how to garner a competitive edge in times of crisis.
Gain new strategies for customer engagement.
Build business resilience during disruption.
Access mid-year market outlook, technology trends, market indicators, and drivers to help guide business decisions.
Hear expert insights from Altimeter | Bank of America, Merrill Lynch | Cornami | Dell Technologies | Deloitte | SEMI | TechSearch International and more.
United States
8:00 am
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8:10 am
Ajit Manocha
CEO and President
SEMI
Welcome & SEMI Survey Results
8:10 am
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8:20 am
Heidi M. Hoffman
Senior Director, Corporate Marketing
SEMI
SEMI Member Survey on COVID Response & Impact
8:20 am
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8:40 am
Sven Smit
Chairman & Director
McKinsey Global Institute
Leading Toward and Beyond the COVID Exit
8:40 am
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9:05 am
Jennie Raubacher
Global Head of Semiconductor, Clean Tech & Auto Tech Investment Banking
The demand for microelectronics surged this past year as the COVID-19 pandemic accelerated a digital transformation of the way many of us work and live.
Join your C-suite colleagues in a webinar, hosted by Ajit Manocha, President & CEO of SEMI, for an analysis of the emerging business landscape and what post-pandemic operations and opportunities will look like. Featured speakers from McKinsey & Co. and Wells Fargo Securities will share their insights on the impact of the surge and the economic policies being enacted to strengthen the worldwide economy.
This webinar is a timely forum to better gauge future demand and ongoing challenges – and how to adapt your business accordingly.
CEO Webinar Series: Surging Chip Demand, Digital Transformation, and the Pandemic – What’s Next?
8:00 am - 9:30 am
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Strengths & weaknesses of printed conductor and filler types
Understanding the performance criteria of conductive inks
Resistance measurement, sheet resistance vs volume resistivity, unit conversion, measuring film thickness and surface roughness
Understanding the microstructure of low temperature printable conductors
Percolation conductors: silver filled Polymer Thick Film (PTF) inks and isotropic ECAs
Sinterable conductors: nanoparticle, metalorganic/particle hybrids, and copper inks
Semi-sinterable conductors
Test methods for mechanical and environmental reliability
Overview of how printing methods work
Methods with a master: Screen, flexo, gravure, gravure offset
'Digital' or direct write methods for 2D & 3D: jet based, microdispense,
Conventional, non-equilibrium photonic, chemical, and mechanical methods for curing
Understand the resolution and sheet resistance limits to AM of circuits
Calculating the tradeoffs to selecting the appropriate conductor for achieving a specific sheet resistance
Transparent printable conductors and films
About the Instructor
Mike Mastropietro has spent his entire 20+ year career working with printable electronically functional materials and additive manufacturing methods for FHE devices including: formulation, conventional printing, direct write printing, equilibrium and non-equilibrium curing methods, and application development. Prior to joining ACI, he spent two years at NextFlex managing their printing/direct write programs, and overseeing material selection and integration into devices.
At 27, he cofounded a nanoparticle ink company, PChem Associates, whose unique low temperature sintering ink technology was acquired a decade later by NovaCentrix. He started his career at Parelec Inc., pioneers of hybrid particle-metalorganic decomposition (MOD) based inks. He has received an IPC Distinguished Committee Service award for his contributions PE/FHE standards and is a Nextflex fellow. Mike holds a M.S degree in chemical engineering from The Pennsylvania State University where his research on synthesis of surfactant stabilized nanoparticles was awarded a 2000 Materials Research Institute Xerox Research Award.
This FHE Master Class covers all the basics of using printable conductors for additive manufacture of circuits on polymer substrates. Attendees will learn about the different types classes of conductive inks available, and how to characterize their performance and cost. Students will also procure an overview of traditional and digital printing methods, drying/curing/sintering methods, and design and assembly differences compared to traditional ‘printed’ circuit boards.
This class is offered OnDemand.
Printing, Curing and Characterization Methods for Printable Conductors
Flexible Electronics Master Class
Originally recorded - September 8, 2021
10:00 am - 12:00 pm
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Add to Calendar2021-09-08 10:00:002021-09-08 12:00:00FlexTech Master Class #8 MaterialsThis FHE Master Class covers all the basics of using printable conductors for additive manufacture of circuits on polymer substrates. Attendees will learn about the different types classes of conductive inks available, and how to characterize their performance and cost. Students will also procure an overview of traditional and digital printing methods, drying/curing/sintering methods, and design and assembly differences compared to traditional ‘printed’ circuit boards.
This class is offered OnDemand. United StatesSEMI.org[email protected]America/Los_Angelespublic
America/Los_Angeles
In the last few years, electronics packaging has rightfully emerged from the shadows of CMOS scaling to make a significant impact in high performance and mobile appliance computing.
In this course, we reviewed the key developments in this paradigm change and the implications these have on Flexible Hybrid Electronics especially the use of bare dielets, fine pitch interconnects and novel substrate materials.
The area of Flexible Hybrid Electronics (FHE) has also developed and is making a significant impact in the area of medical and wellness electronics. The first generation of these devices have, for most part, adapted Printed Circuit Board (PCB) technology by using thinner PCBs and assembling either thinned or thin packaged “older” generation of chips on to these platforms, typically with coarse printed wiring to connect a small number of such chips.
This approach, while immensely useful to get the field going, needs to adapt and borrow from the both silicon and advanced packaging technology trends, so that we can advance this trend to the next level. The key paradigm challenges ahead are: scaling FHE in general – this includes the adoption of dielet (chiplet) technology in more advanced CMOS nodes including edge-AI, higher performance interconnects, flexible high-density energy storage, wireless communication and advanced ergonomics and all of these at lower cost and higher reliability.
This talk addresses the challenges and outline a possible technology roadmap to achieve these goals in the next few years.
Featured Speaker Biography: Subramanian S. Iyer (Subu) is Distinguished Professor and holds the Charles P. Reames Endowed Chair in the Electrical Engineering Department and a joint appointment in the Materials Science and Engineering Department at the University of California at Los Angeles. He is Director of the Center for Heterogeneous Integration and Performance Scaling (CHIPS). Prior to that he was an IBM Fellow. His key technical contributions have been the development of the world’s first SiGe base HBT, Salicide, electrical fuses, embedded DRAM and 45nm technology node used to make the first generation of truly low power portable devices as well as the first commercial interposer and 3D integrated products. He also was among the first to commercialize bonded SOI for CMOS applications through a start-up called SiBond LLC.
More recently, he has been exploring new packaging paradigms and device innovations that they may enable wafer-scale architectures, in-memory analog compute and medical engineering applications. He has published over 300 papers and holds over 75 patents. He has received several outstanding technical achievements and corporate awards at IBM. He is an IEEE Fellow, an APS Fellow, an iMAPS Fellow and a Distinguished Lecturer of the IEEE EDS and EPS and a member of the Board of Governors of IEEE EPS. He is also a Fellow of the National Academy of Inventors. He is a Distinguished Alumnus of IIT Bombay and received the IEEE Daniel Noble Medal for emerging technologies in 2012 and the 2020 iMAPS Daniel C. Hughes Jr Memorial award.
View this Master Class On Demand! Learn why and how new packaging paradigms like chiplets and dielets are impacting the world of flexible hybrid electronics (FHE) from one of the industry's foremost experts, Dr. Subramanian Iyer of UCLA. The course explores how these packages are packing such a punch and enabling advanced performance in a much smaller and flexible footprint.
Flexible Hybrid Electronics 2.0 based on Fan-out Wafer Packaging
Fabrication in the cleanroom, and in the newer printed electronics tools, are often a function of time-varying parameters of the equipment, environment, and materials. The parameters often have co-dependencies across different process steps and tool sets. Physics based models and linear regression have been used traditionally, which are often not sufficient to learn the underlying variabilities.
This course will teach the material needed to connect cleanroom and printed electronics science and technology to that of advanced data processing capabilities enabled by Artificial Intelligence and Machine Learning. Cleanroom tools inherently can have millions of internal variables and can learn from the datasets, providing a powerful and complementary approach to traditional feedback control and process stabilization approaches.
Learning models are developed on images (CD-SEMS, optical images), time history data (Optical Emission Spectroscopy), and textual process information. A subset of the class will include: (1) Approaches to preprocess image data and create learning-based models, (2) model verification, (3) application to nanomechanical switch fabrication, and (4) cloud based implementation, data security, and data standardization.
Course Outline:
1.Introduction – The need for AI in microfabrication and printed electronics
a.Microfabrication: Tool variability, process variations
d.Deep Neural Nets (e.g. Image to Image translation using Pix2Pix)
5.Results and outlook
a.Improvement in linewidths
b.Cloud based implementations
About the Instructors
Amit Lal Amit Lal is the Robert M. Scharf 1977 Professor in the School of Electrical and Computer Engineering at Cornell University, Ithaca, NY. His work has resulted in new fabrication approaches and architectures in Micro/Nano-Electromechanical Systems, Physical Acoustics and Ultrasonics, Inertial Sensors, Biomedical MEMS, Analog Circuit Design, Solid-State Electronics, Radioactive Thin Films for Autonomous Microsystems, and Nanofabrication. The current focus of his research is on: (1) Gigahertz Ultrasonic for chip-scale communications, sensing, and computation, (2) Near zero power sensors for long-lifetime IoT, (3) Ultrasonic inertial sensors based on surface acoustic waves.
Peter C. Doerschuk Peter C. Doerschuk is a professor in the School of Electrical and Computer Engineering and the Meinig School of Biomedical Engineering at Cornell University in Ithaca NY. His interests in signal and image understanding have resulted in new algorithms for a variety of problems from microfabrication to single-particle cryo electron microscopy of biological particles.
Benyamin Davaji Benyamin Davaji is a postdoctoral research associate in the School of Electrical and Computer Engineering at Cornell University. Ben works with Prof. Amit Lal at SonicMEMS Laboratory on developing solid-state acoustic wave inertial sensors, ultrasound neuromodulation microdevices, event-powered sensors, and methods to use machine learning and artificial intelligence to enhance micro and nanosystem design and manufacturing. He is the recipient of the 2019 Cornell achievement award for excellence in mentoring and the 2016 MEMS shark pub tank prize at the Hilton Head Conference. Before joining Cornell, Ben worked with Prof. Chung Hoon Lee on microthermal analysis and thermal microfluidic systems at Nanodevices Laboratory at Marquette University and received a Ph.D. in electrical engineering. During his Ph.D., he received the 2014 IEEE Larry Hause award and the 2014 College of Engineering outstanding TA award.
Flexible Hybrid Master Classes are offered on many topics! Visit this page for entire list and links to more detailed information on each one.
J. Devin MacKenzie is the Washington Research Foundation Professor of Clean Energy and an Associate Professor of Materials Science and Engineering and Mechanical Engineering at UW. Dr. MacKenzie is also the director of the Washington Clean Energy Testbeds, an open access laboratory with world-class printed electronics, flexible electronics and energy device fabrication and testing capabilities. Dr. MacKenzie has 20 years of experience co-founding or leading startups in novel fabrication including as a co-founder and CEO of Imprint Energy commercializing printed flexible batteries, as CTO of Add-Vision, a printed flexible OLED display company that was acquired in 2011, and as a VP at Kovio, an MIT spin out, leading printed Si RF device integration. Devin also co-founded the world’s first printed electronics company, Plastic Logic Ltd. in the United Kingdom. Previously Dr. MacKenzie was a researcher at AT&T Bell Laboratories. Prior to entering the start-up world, Devin was a postdoc in Physics at the University of Cambridge and earned PhD, MS, and BS degrees from the University of Florida and MIT. Dr. MacKenzie has over 220 patents and publications and has been cited over 10,000 times.
The Master Class covers the basics of battery terminology, chemistry and structures relevant to flexible electronics. The unique challenges related to the practical use and manufacturing of flexible batteries is discussed, as well as a summary of the current state of the art and emerging flexible battery technologies. The presentation is 90 minutes with 30 minutes of Q&A and discussion from the participants who attended the live recording on April 20, 2021.
Flexible Hybrid Master Classes are offered on many topics! Visit this page for entire list and links to more detailed information on each one.
Flexible Batteries
A Flexible Electronics Master Class On Demand
10:00 am - 12:00 pm
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America/Los_Angeles
Held over three days, the virtual Collaborative Forum will focus on case studies, key speakers, market updates, and content that you have come to expect. Please plan on joining fellow industry peers at the meeting to network and share insights and best practices on the latest business, and technology trends affecting the electronics manufacturing industry. The FOA community stays connected and continues the good dialogue on keeping our fabs productive with the innovative solutions that members continue to drive even during the pandemic.
About Fab Owners Alliance (FOA)
The Fab Owners Alliance, a SEMI technology community, is an international, group of semiconductors & MEMS fab owners and industry suppliers who meet regularly to discuss and act on common manufacturing issues, combining strengths and resources to maintain and increase their global competitiveness. Established in 2004, the FOA consists of 25+ device companies with over 120 semiconductor manufacturing facilities and 65+ suppliers to the industry. With a network of global offices, the FOA connects fab managers and accelerates manufacturing excellence at semiconductor fabs around the world.
During the workshop recording, you will hear perspectives from the key stakeholder segments and develop a greater understanding of the overall efforts and progress of the task force.
The workshop is focused on diagnosing and improving SEMI F47, Specification for Semiconductor Processing Equipment Voltage Sag Immunity, widely adopted across the industry, the governing standard that defines voltage sag test levels and requirements for semiconductor tools.
Since the implementation of SEMI F47, the vulnerability of semiconductor manufacturing to single-phase and two-phase voltage sags has improved greatly. However, semiconductor manufacturers continue to experience significant product loss and downtime due to voltage sag events.
Given the ongoing issues with semiconductor plant downtime, a new SEMI Voltage Sag Immunity Task Force was formed to take a fresh look at the issue. The workshop and the task force:
Reviews the characteristics of the power quality events that cause downtime.
Takes a new look at the sensitivities in the process equipment.
Determines any potential adjustments to equipment design, facility design, utility systems, or SEMI Standards to further reduce voltage sag induced losses by the semiconductor industry.
Principal Project Manager & Leader, Voltage Sag Immunity Task Force
EPRI
Introduction to the SEMI Voltage Sag Immunity Task Force Effort
A review of the key objectives of the voltage sag task force will be discussed along with the characteristics of the power quality events that are still causing semiconductor plant process downtime. A new look at the sensitivities in the tooling and process equipment is required to determine any potential adjustments to equipment design, facility design, utility systems or standards to further reduce voltage sag induced losses by the semiconductor industry. This important work will help utilities, semiconductor manufacturers, and tool equipment providers to better understand the tolerance and susceptibility of today’s generation of semiconductor processing tools and then to develop effective strategies to improve uptime and lower product losses due not only to single-phase (Type I) and two-phase (Type II) voltage sag events but for three-phase (Type III) events as well.
10:25 am
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10:50 am
Clayton Burns
Principal Engineer
National Grid
Regional Voltage Sags- Importance of Addressing Three-Phase Voltage Sags in SEMI F47
A review of voltage sags at a National Grid substation which were produced by two lightning-caused three-phase transmission faults at locations fairly remote to the substation. This will show the regional effect of transmission level faults on voltage. The voltage sags will be compared to the existing SEMI-F47 standard and the accepted sag definition. Additionally, a proposed regional voltage sag study will be considered in light of the changing make-up of the future electric system and the influx of large inverter-based resources.
10:50 am
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11:15 am
Ed McGann
Manager of Engineering
VELCO
Utility Dynamic VAR device fault response, fault mitigation techniques, and power quality measures addressed with protection design
VELCO recently conducted a refurbishment of its STATCOM facility as part of a planned controls system upgrade. The system planning need for this facility is to provide area voltage support during transmission system contingencies. The refurbishment project team recognized the benefits of the STATCOM’s ability to provide voltage support during system faults and specified fault performance requirements in the vendor specifications. This presentation will discuss those performance requirements, review pre and post project upgrade system fault record’s and review project lessons learned. The second half of the presentation will cover utility fault mitigation design strategies for substation and transmission line assets as well as protective relaying techniques to improve power quality
11:15 am
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11:50 am
Michael Noth
Power System Managing Engineer
Austin Energy
Seeing it from both sides: The importance of Power Quality Metering at the utility and inside the Fab Distribution System.
In this presentation we will discuss the importance of having power quality-based metering on both sides of the point of connection and other parts of the distribution system. Mike will share some examples and stories of how important that can be.
11:50 am
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12:15 pm
Dan Sabin & Tony Hunt
Schneider Electric
Waveform captures of voltage sag events can be automatically analyzed by software to determine their source and impact
This presentation will summarize efforts to categorize events automatically that exceed SEMI F47 limits, and to determine the source of those disturbances. It will also present recent efforts to analyze the impact of voltage sags automatically on electrical loads. This research has resulted in automatic algorithms to determine which voltage sags caused downtime and which ones did not. Combining all of this information together provides a means to more precisely and effectively diagnose, manage, and mitigate voltage sag disturbances.
12:15 pm
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12:25 pm
Christopher "Dale" Moffitt
Electrical Systems Engineering
HP
Power Quality and Monitoring, What Does the Data Tell Us?
Power Quality (PQ) has a long and diverse history dating back to the first power grids in the United States. Impacts and concerns about PQ events have evolved and will continue to evolve as our usage of electricity changes. Recent natural disasters have highlighted the importance of a robust power grid and the changing landscape of power generation presents new PQ challenges. As power consumers, a key element in any PQ strategy is adequate power monitoring. This provides the data that can drive conversation with the utility, discover opportunities in our infrastructure and deliver to our facilities the power quality necessary to sustain our businesses.
12:25 pm
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12:50 pm
Willem Meijs & Giel Croonen
Low Voltage expert in electrical engineering on supply distribution system for machines
ASML
SEMI F47 and Power Quality Perspectives and Considerations from a Tool OEM
This presentation will address power quality perspectives and consideration from the point of a lithographic tools manufacture. Effect of different test methods on the sag immunity, test strategy on systems, sub-systems and components. How to divide a large installation up in to testable units and maintaining performance integrity. 3 phase type III test generator topology and the impact on harmonic emission and immunity in relation to voltage sag immunity.
12:50 pm
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1:15 pm
Josh Pankratz
Director of Engineering
Advanced Energy, Inc.
Power Supply Considerations and Standards for Voltage Sag Ride Through
Disturbances in utility power during semiconductor manufacturing can result in loss of revenue, productivity, production yields, and product quality. Focus on power quality continues to grow as new fabs are built in developing regions, which historically suffer from poor infrastructure. Highly automated fabs have driven a demand for systems that can ride through power glitches without shutting down tools and production lines. This presentation examines how power quality, most typically resulting in voltage sag events, affects semiconductor manufacturing and how industry standards and guidelines for tool immunity to those events affect the design of power supplies.
1:15 pm
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1:40 pm
Steve Lewis
Lam Research
Round Table Discussion & Q&A
1:40 pm
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1:55 pm
Mark Stephens
Principal Project Manager
EPRI
Next Steps for SEMI Voltage Sag Immunity Task Force
Based on the initial findings from utility and fab power quality data, the task force is poised to move forward to re-evaluate semiconductor tools against voltage sag additional characteristics that are indicative of measured events still causing downtime. Utilities, semiconductor fabs and equipment OEMs will be invited to actively participate in this effort to obtain the required test data.
SEMI & EPRI invite you to view a workshop held on April 21, 2021, to hear perspectives from all stakeholders on a persistent and difficult issue in microelectronics manufacturing - uncertain power quality. As work on SEMI Standard F47, the Specification for Semiconductor Processing Voltage Sag Immunity, continues this is the opportunity to hear from distinct parts of the supply chain.
Voltage Sag for Manufacturing Fabs - A Workshop
10:00 am - 2:00 pm
Off
Add to Calendar2021-04-21 10:00:002021-04-21 14:00:00Voltage Sag Workshop for Manufacturing FabsSEMI & EPRI invite you to view a workshop held on April 21, 2021, to hear perspectives from all stakeholders on a persistent and difficult issue in microelectronics manufacturing - uncertain power quality. As work on SEMI Standard F47, the Specification for Semiconductor Processing Voltage Sag Immunity, continues this is the opportunity to hear from distinct parts of the supply chain. United StatesSEMI.org[email protected]America/Los_Angelespublic
America/Los_Angeles
