In recent years, sustainability has emerged as a critical aspect of global development, demanding increased attention across industries. The semiconductor industry has a pivotal role to play in promoting environmental responsibility.
In this webinar we will hear the successes, challenges, and ongoing efforts from both a semiconductor device manufacturer and a semiconductor material supplier and how efforts across the supply chain influence each other. Join us as we foster knowledge sharing and collaborations to create a sustainable future for the semiconductor industry and the planet as a whole.
Push & Pull: How the Members of the Semiconductor Supply Chain Drive a Sustainable Future
Brought to you by the EMG Webinar Sub-Committee
10:00 am - 11:00 am
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Micro-electromechanical systems, or MEMS, constitute many devices that combine electrical and mechanical components, range in size from a few microns to millimeters, and are often fabricated using traditional semiconductor manufacturing processes. ALD builds material up Angstroms at a time with high conformality, even on complex geometries.
For MEMS and Sensor fabrication, including inkjet heads, pressure sensors, and microfluidics, ALD offers the most precision deposition technique on the market. Beneq ALD solutions include a wide range of materials and processes, making it simple to coat tiny, complicated components with anti-stiction, piezoelectric, or barrier films.
Atomic Layer Deposition (ALD) Solutions for MEMS and Actuators
An MSIG Sensors Manufacturing Webinar
8:00 am - 9:00 am
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The discussion will help attendees understand why and how governments implement trade controls, what “exports” are and how they take place in different business contexts, and common due diligence methods – such as customer screening – that United States companies use to incorporate regulatory compliance into their business processes. Finally, the discussion will address recent regulatory updates which address current issues such as US-China trade relations and the anticipated effects of those regulations on the US semiconductor design ecosystem.
Following the presentations we will address questions from attendees as time permits.
Meet the Speakers
Ada Loo Group Director and Associate General Counsel, Cadence Design Systems Biography
Ben Kallen Senior Manager, Public Policy & Advocacy SEMI Biography
Marc Coldiron Director of Global Public Policy & Advocacy SEMI Biography
Join us as members of SEMI's Public Policy and Advocacy team will join representatives from Cadence Design Systems to host a webinar focused on export control policy—a topic which is especially relevant to the ESD Alliance given the global reach of the EDA industry. SEMI staff will contextualize export controls within the broader national political landscape and offer their perspective on what EDA companies can expect over the longer term.
ESD Alliance Export Webinar
Navigating Export Controls in EDA
June 11, 2026 | 9–10:30am PT | Virtual
9:00 am - 10:30 am
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Add to Calendar2026-06-11 09:00:002026-06-11 10:30:00ESD Alliance Export WebinarJoin us as members of SEMI's Public Policy and Advocacy team will join representatives from Cadence Design Systems to host a webinar focused on export control policy—a topic which is especially relevant to the ESD Alliance given the global reach of the EDA industry. SEMI staff will contextualize export controls within the broader national political landscape and offer their perspective on what EDA companies can expect over the longer term. CA United StatesSEMI.org[email protected]America/Los_Angelespublic
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California CHIPS Act Support: State and Local Government Incentives
SEMI has invited the California Governor’s Office of Business and Economic Development (GO-Biz) to discuss California state services and programs that can be leveraged in alignment with current and upcoming CHIPS Funding Opportunities. GO-Biz provides direct support to semiconductor businesses of all sizes and scopes via site selection and identification services, personalized incentive navigation services, liaison services, and local engagement and environmental process assistance.
Competitive CHIPS proposals will apply one or more state or local government incentive(s) to finance their project costs. In this webinar, representatives from GO-Biz will outline different state incentives, including the R&D tax credit and Partial Sales and Use Tax Credit, that can be used to meet this financing requirement. Additionally, they will detail how their multiple services may be leveraged to strengthen your project proposal plans. Following a short presentation, they will be available for a Q&A.
Meet the Speakers
Joe Stockunas
President
SEMI Americas
Kaina Pereira
Senior Advisor, Business Development
Governor’s Office of Business and Economic Development (GO-Biz)
Michael Karavolias
Sustainable Innovation Specialist
Governor’s Office of Business and Economic Development (GO-Biz)
Derek Kirk
Assistant Deputy Secretary of Climate
California Labor & Workforce Development Agency
Co-sponsored by
This Virtual Forum is 10:00–11:00am Pacific Time
United States
Co-sponsored by SEMI and GO-Biz
The California CHIPS Act webinar will outline state programs and available state support that California applicants can leverage for more competitive CHIPS applications.
California CHIPS Act Support: State and Local Government Incentives
[VIRTUAL EVENT]
California CHIPS Act Support: State and Local Government Incentives
April 11, 2023
10:00 am - 11:00 am
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The nine to tenfold increase in critical electric field strength of SiC over Si allows high voltage blocking layers to be fabricated significantly thinner than those of similarly rated Si devices. This reduces device on-state resistance and capacitance, and therefore the associated conduction and switching losses, while maintaining high-voltage breakdown capability. However, lack of a well-designed edge termination structure diminishes the high voltage performance of SiC power devices. Indeed, under reverse bias, planar junctions exhibit breakdown voltages well below the ideal SiC drift layer limit because of electric field crowding at the junction periphery. Consequently, to maximize breakdown voltage, specialized edge termination structures are utilized. In this webinar, common structures that enhance the breakdown voltage of power SiC devices like metal field plates, floating guard rings, multiple-Junction-Termination-Extensions, and beveled edge terminations will be discussed. Emphasis will be placed on optimizing their fabrication by minimizing photolithography levels and processing complexity, while ensuring robust breakdown voltage capability at high wafer yields.
Join us online for the fifth webinar in the Silicon Carbide Series.
9:00 am - 10:00 am
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Add to Calendar2023-12-07 09:00:002023-12-07 10:00:00SiC—Silicon Carbide Webinar Series Now Available On-Demand!
Join us online for the fifth webinar in the Silicon Carbide Series.United StatesSEMI.org[email protected]America/Los_Angelespublic
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Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.
If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!
9:00 am - 11:00 am
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Add to Calendar2023-03-28 09:00:002023-03-28 11:00:00Microlithography North America TC Chapter Meeting 2023Microlithography North America TC Chapter Meeting
Date: Tuesday, March 28, 2023
Time: 09:00-11:00 AM Pacific
via Web Conference
AGENDA
(subject to change)
Last updated: Feb 24, 2023
NOTE:
Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.
If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!
United StatesSEMI.org[email protected]America/Los_Angelespublic
Contact
Kevin Nguyen
Manager, International Standards Operations
Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.
If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!
8:00 am - 9:30 am
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Add to Calendar2023-03-15 08:00:002023-03-15 09:30:00Silicon Wafer Surface Microroughness WorkshopSilicon Wafer Surface Microroughness Workshop
Date: Wednesday, March 15, 2023
Time: 08:00-09:30 AM Pacific
via Web Conference
AGENDA
(subject to change)
Last updated: Feb 23, 2023
NOTE:
Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.
If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!
United StatesSEMI.org[email protected]America/Los_Angelespublic
Contact
Kevin Nguyen
Manager, International Standards Operations
The passage of the CHIPs Act and the Inflation Reduction Act have created opportunities and challenges for the semiconductor industry supply chain. Join industry professionals as we discuss the implications of this legislation and how materials companies can make the most of it.
What's In it for Materials Companies?
CHIPs Act, Inflation Reduction Act, and Tax Incentives
10:00 am - 11:00 am
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The Fourth Industrial Revolution, or Industry 4.0, revolutionized automation monitoring, enhanced production efficiencies, and improved product quality. Industry 5.0 is the next industrial revolution coming to the forefront.
Industry 5.0 builds and adapts the components of Industry 4.0 (robotization, automation, IoT, connected machines, smart systems, data analytics, AI, ML) with a focus on sustainability, environmental, social, and well-being of the worker, and optimized human-robot interactions.
With the renewed interest in on-shoring manufacturing in the United States, this breakfast forum is a great opportunity to learn about Industry 5.0 and the ecosystem partners developing these future ideas.
Join the conversation on—
Market Trends, Forecast & Outlook
Industry 4.0 + Transition to 5.0—Challenges + Solutions
Digital Journey–AI/ML, Autonomous Solutions, Digital Twin, etc.
Supply Chain / Disruptions: Linear to Circular Economy and Localized Sourcing
Hosted by Analog Devices Presented by the SEMI Pacific Northwest Chapter
Smart Manufacturing—What Does a Smarter World Look Like With Industry 5.0?
SEMI Pacific Northwest Forum IN-PERSON & VIRTUAL EVENT
Pacific Time
8:00 am - 11:30 am
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Add to Calendar2023-05-12 08:00:002023-05-12 11:30:00[Pacific Northwest Forum] Smart Manufacturing—What Does a Smarter World Look Like With Industry 5.0?IN-PERSON AND VIRTUAL EVENT
Hosted by Analog Devices
Presented by the SEMI Pacific Northwest ChapterAnalog Devices—ADI OR United StatesSEMI.org[email protected]America/Los_Angelespublic
America/Los_Angeles
Health and Safety
We Are Excited to Welcome You Back to the Pacific Northwest Forum
Your health and safety are our top priority. SEMI Americas (“SEMI”) monitors developing federal, state, and local health and safety recommendations and requirements to determine the most appropriate safety protocols for our in-person events.
SEMI will comply with and follow current facility and local government jurisdiction guidelines of the venue's location. The health and safety guidelines outlined below continue to evolve and will be updated as necessary to help support a safe experience for all attendees onsite.
FACE COVERINGS
Although masks are not required, attendees are encouraged to determine use based on their own personal comfort level as well as to be respectful of other's individual choice.
RELEASE AND WAIVER FORM
This was included in your online registration.
ADDITIONAL SAFETY PROTOCOLS
Please practice social distancing.
Wash and sanitize your hands frequently.
Avoid handshakes.
Wear your attendee badge at all times to indicate that you have gone through the health screening process.
SEMI is committed to upholding the health and safety standards outlined on this page. We will continue to monitor the guidance of public health authorities and government agencies going forward and will make appropriate adjustments in the future based on that guidance. Additional details about policies and procedures will be posted here as they are made available.
Non-CMOS Compatible SiC Power Device Fabrication in Volume Si Fabs
SiC devices are displacing their incumbent Si counterparts in several high-volume power applications. As SiC market share continues to grow, the industry is lifting the last barriers to mass commercialization that include higher than Si device cost, relative lack of wafer planarity, the presence of defects like basal plane dislocations, reliability and ruggedness concerns, and the need for a workforce skilled in SiC power technology to keep up with the rising demand. To enable cost-effective manufacturing, high-yielding SiC fabrication in conventional Si fabs is desirable.
In this webinar, I will summarize key aspects of SiC fabrication technology and outline non-CMOS compatible processes that have been streamlined to allow for mass SiC chip fabrication in conventional Si mature fabs. The SiC industry has successfully leveraged the Si fab infrastructure and has made the relatively small financial investments required to allow existing Si fabs to process SiC. Consequently, SiC chip fabrication in volume fabs alongside Si has emerged as a “cost reduction” model that exploits “silicon” manufacturing economies of scale. Today’s SiC fab infrastructure is vibrant, mirrors that of silicon, and is rapidly expanding.
View Previous Webinar in the SiC Series
Webinar #1—Silicon Carbide Material Properties, Key Applications, and Fabrication Basics: Making the Transition from Silicon
Webinar #2—Non-CMOS Compatible SiC Power Device Fabrication in Volume Si Fabs
Webinar #3—Bidirectional SiC and GaN Switch Technology
Webinar #4—Understanding SiC Chip Cost, the Impact of Defects, and the Case of Price Parity with Si at the System Level
Join us online as we dive into SiC fabrication technology and non-CMOS compatible processes that have been streamlined to allow for mass SiC chip fabrication in conventional Si mature fabs.
SiC—Silicon Carbide Webinar Series #2
Virtual Webinar #2
ON-DEMAND
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