※ Biography

As AI systems push requirements for higher bandwidth, lower power, and increased integration density, 3D integrated circuits (3DIC) are moving rapidly from development to production. However, scaling 3DIC introduces complex application challenges across the manufacturing flow, where process interactions and control become critical.
This talk examines key 3DIC applications and process challenges, including high aspect ratio TSV etch, void free TSV fill, and dielectric deposition, required for reliable wafer and die level stacking. Emerging applications such as inter die gap fill for advanced chiplets integration and plasma dicing for improved yield, edge quality, and die strength further increase integration complexity and productivity demands.
The presentation highlights Lam Research innovations across etch, deposition and clean processes that enable tighter process windows, improved uniformity, and higher throughput. In addition, equipment intelligence and data driven control are increasingly essential to enhance yield learning and manufacturing productivity. Together, these advances are enabling scalable, high volume 3DIC manufacturing for next generation AI systems.

※ Biography

The future of compute will not be defined by silicon alone. As AI reshapes industries and economies, advanced packaging has become the foundation of the next era of innovation, enabling unprecedented gains in performance, efficiency, and scale. During his keynote, Yin Chang will explore how breakthroughs in heterogeneous integration, chiplets, and advanced manufacturing are transforming bold AI ambitions into deployable systems, and why AI leadership will depend not only on compute power, but on the ability to integrate and manufacture at scale.

※ Biography

The rapid electrification of automotive and industrial systems is placing increasingly stringent demands on power semiconductor devices in terms of voltage capability, thermal performance, reliability, and system integration. This presentation reviews recent trends in power devices and power module packaging technologies aimed at improving performance while addressing cost and manufacturability constraints.
First, the fundamental differences between digital and power devices are outlined, followed by an overview of power device applications based on silicon (Si), silicon carbide (SiC), and gallium nitride (GaN) technologies, together with Amkor’s product portfolio.
Next, power module packaging technologies are discussed with a focus on key electrical and thermal challenges. Representative solutions, including advanced interconnects, cooling architectures, and embedded power modules, are introduced, along with a brief overview of Amkor’s technology roadmap.
Finally, the role of the Amkor Technology Japan R&D Center in supporting open innovation and global collaboration is briefly discussed.

※ Biography

The presentation explores advanced packaging technologies designed to meet the escalating performance and power efficiency demands of AI and High-Performance Computing (HPC). To overcome the limitations of traditional semiconductor architectures, System Technology Co-Optimization (STCO) is introduced as a critical framework for managing thermal crosstalk and enhancing heterogeneous integration. The discussion highlights key innovations, including Customized HBM (cHBM) for optimized base-die performance and Samsung's 2.xD packaging portfolio, which encompasses Cube S, Cube E, and Cube R. Specifically, the 2.3D Cube E leverages panel level packaging to enable larger interposers and increased HBM integration, significantly improving productivity and reducing silicon fab burdens. The technical achievements in PLP—such as precise warpage control and the realization of fine RDL patterns (2/2μm)—are detailed to demonstrate their viability for large-scale AI chips. Furthermore, the roadmap extends toward 3D integration and Co-Packaged Optics (CPO) to maximize bandwidth and energy efficiency. Finally, the importance of an ecosystem-wide collaboration is emphasized as the driver for future innovation in "More than Moore" technology. These advancements collectively provide a scalable path toward the next generation of AI hardware acceleration.

※ Biography

Glass core substrates exhibit low CTE and significantly higher rigidity than conventional organic substrates and are therefore regarded as promising core materials for next-generation build-up packages. However, a major challenge lies in the occurrence of SeWaRe defects (delamination in glass), which arise from thermal stresses induced by the mismatch in the coefficients of thermal expansion (CTE) between the glass material and the build-up resin.
To mitigate this issue, we proposed a structure in which the corner regions of each individual piece are formed from resin. However, considering the thermal history during chip mounting, it became evident that the suppression effect was insufficient. Therefore, an edge‑protection material was applied to relieve the stress concentrated at the edges of each individual piece. As a result, it was confirmed that SeWaRe defects could be effectively suppressed even under thermal loading.
Through these efforts, we successfully developed a glass core build-up package substrate incorporating 11 layers of single‑sided copper wiring (22 layers in total).

※ Biography

AI and data-intensive workloads are outpacing what conventional semiconductor technology can deliver. Two innovations are stepping in to close the gap: Silicon Photonics, which brings optical-speed, low-power data transmission into the data center, and Advanced Packaging, which uses chiplets and 2.5D/3D integration to maximize performance and efficiency at the chip level.
This talk examines how these complementary technologies are reshaping HPC architecture—covering their current state, how they work in tandem, and the key technical and commercial barriers to large-scale adoption.

※ Biography

Co-packaged optics (CPO) is emerging as a key enabler for scaling bandwidth while containing power and cost in next-generation AI and cloud infrastructure. By moving optical engines closer to the switch ASIC and shortening high-speed electrical reaches, CPO can reduce SerDes power, ease signal-integrity constraints, and increase overall front-panel bandwidth density. However, delivering these benefits at volume requires new approaches across package architecture, manufacturing, and system integration.
This presentation reviews the main packaging challenges that must be solved to industrialize CPO, including thermal management and heat spreading near high-power silicon, fiber attach and optical alignment tolerances, photonics/laser integration choices, high-density optical and electrical I/O, substrate and interposer selection, and reliability risks such as warpage, CTE mismatch, and contamination control. Test and rework strategy, yield learning, and supply-chain readiness (materials, assembly, and metrology) are highlighted as practical barriers to adoption.
The talk also outlines opportunities created by CPO packaging innovations—such as modular optical tiles, standardized fiber interfaces, advanced lid/heat-sink concepts, and co-design of electrical, mechanical, and optical domains—to unlock higher radix switches and lower system power. Attendees will leave with a structured view of technology tradeoffs, a roadmap of near-term versus long-term packaging options, and actionable considerations for bringing CPO from prototypes to deployable products.

※ Biography

AI is fueling unprecedented growth and accelerating demand for advanced devices. Its requirements for performance, power, and area scaling are driving memory and logic devices toward 3D architectures.
At the heart of this 3D transformation, processing steps must enable taller, perpendicular structures as well as smaller features. Meeting these requirements calls for new deposition and etch capabilities that did not exist before, leading to breakthroughs needed in areas such as atomic-level deposition and etch (ALD and ALE), high-aspect-ratio processing, dry resist EUV patterning, and the adoption of new materials like molybdenum (Mo). As a result, the transition to 3D devices will drive increased intensity of deposition and etch processing.
This presentation will explore how deposition and etch are critical to unlocking the future of 3D devices, with increasing velocity required to meet the demands of AI-driven innovation.

※ Biography

As the semiconductor industry navigates the challenges of dimensional and functional scaling in the artificial intelligence (AI) era, advanced materials science has emerged as a critical enabler for performance enhancement. Modern AI-centric architectures demand the integration of increasingly complex system-on-chip (SoC) designs with non-traditional material systems.
This work details a high-throughput methodology for the rapid down-selection and optimization of multi-element thin films, ensuring alignment with both physical and electrical key performance indicators (KPIs). Utilizing combinatorial physical vapor deposition (PVD) in conjunction with unit-cell electrical test vehicles, we systematically screen an expansive elemental compositional space to identify optimal candidates. Advanced machine learning (ML) algorithms are integrated into each phase of the development lifecycle—spanning precursor synthesis, process optimization, and heterogeneous integration—to satisfy the rigorous specifications of emerging device applications. The synergy between integrated materials engineering and AI-driven informatics significantly reduces the temporal gap between material discovery and device-level implementation.

※ Biography

Chemical and materials research faces increasing demands for data-driven automation and autonomous research systems due to vast exploration spaces and complex decision-making processes. In this talk, we introduce EXAONE Discovery as a Chemical Agentic AI system and present an integrated research framework designed to accelerate scientific discovery.
EXAONE Discovery is an agent-based system that tightly integrates property prediction, molecular generation, synthesis prediction, and literature/data extraction. Based on given research objectives, the system accumulates relevant data, generates candidate molecules using model-driven approaches, evaluates their properties, and derives feasible synthetic routes—automating the end-to-end discovery pipeline. Furthermore, it is designed to enable a closed-loop research paradigm by interfacing with autonomous laboratories, connecting design–prediction–synthesis–validation cycles. This allows hypotheses proposed by AI to be experimentally validated, with results continuously fed back into the system for iterative model improvement and optimization.
In this talk, we will demonstrate how this integrated approach enhances research productivity across various industrial use cases in materials discovery and optimization, and discuss future directions of Chemical Agentic AI.

※ Biography

※ Biography

※ Biography

The rising technical demands for advanced semiconductor device manufacturing, and the industry’s ambitious net-zero commitments necessitate the development of novel etch chemistries that deliver both technical excellence and environmental sustainability. This talk will present an overview of the emerging etching chemistries developed by Air Liquide for variety-targeted applications. These innovative chemistries focus on delivering improved performance with unique technical merits to address current industry challenges. Exemplified by a novel low Global Warming Potential (GWP) designed for general dielectric etch, its synergistic integration with advanced abatement solutions, and a simplified Life Cycle Analysis (LCA) - from raw material extraction through processing, manufacturing, distribution, and use, this presentation aims to provide insights into a pathway towards more sustainable semiconductor manufacturing processes.

※ Biography

As device architectures scale toward the angstrom era, metallization has emerged as one of the most critical bottlenecks to continued improvements in power and performance. Shrinking feature dimensions increase resistance, heighten reliability risks, and add complexity in interconnects and contacts. At these scales, traditional approaches which uniformly affect all wafer surfaces are increasingly ineffective. They rely heavily on lithography to define placement, and struggle to address tighter geometries and growing sensitivity to interfaces. Selective deposition is a solution which enables atomicscale control of where metals grow, placing material only where it is needed, without relying on patterning. It also enables monocrystalline metal growth, eliminating grain boundaries to minimize contact resistance.

This presentation will highlight how Applied Materials’ integrated materials solutions are enabling multiple inflections through area selective metallization. Selective Cobalt Capping technology encapsulates copper interconnects, improving adhesion, suppressing electromigration, and extending copper reliability to advanced nodes. Applied’s Selective Barrier eliminates a highly resistive interface at the interface of interconnect wiring. For contact fill, Applied developed Selective Tungsten (W) as a liner-less gap-fill solution that eliminates traditional liner/barrier layers and enables bottomup, seamfree metal fill. Finally, we introduce Selective Molybdenum (Mo) deposition that carries lowresistivity contact scaling forward as dimensions approach the fundamental scaling limits of W. Applied’s state-of-the-art atomic layer deposition tool for molybdenum delivers bottom-up, single-crystal Mo growth, enabling the next generation of contact scaling.

※ Biography

※ Biography

Cleaning processes originally relied on wet etch based patterning. However, dry etching now performs the majority of the patterning work, so wet etching is no longer needed for most pattern creation steps. Consequently, the focus of cleaning has shifted from patterning to the removal of contaminants. To obtain a clean surface, we must eliminate unwanted contaminants without any side effects such as pattern damage, collapse, material loss, or corrosion.
However, in the current era of 3 D structured devices such as V NAND, GAA, and 3 D DRAM, lateral wet etching is essential for patterning 3 D devices, and the proportion of wet etching in cleaning processes is increasing. Additionally, different kinds of selectivity such as concentration selectivity and area selectivity, have become important, in addition to conventional material selectivity. Sometimes we have to remove a film uniformly even though there are seams and voids. In addition, pattern loading has become a critical factor in lateral removal processes. We must solve these loading issues to achieve better performance and yield.
From time to time we must use more flexible, multi step processes; therefore, premixed chemistry is not enough to meet our purpose. Due to the flexibility of dry (gas phase) cleaning, the portion of dry cleaning has been increasing sharply. Area selectivity has also become another challenge. We must etch without corner rounding or climbing, and we want to perform anisotropic etching.
Conversely, based on the generic clean roadmap, high aspect ratio cleaning and low consumption cleaning will remain continuous challenges. Super critical CO2 drying is a solution for pattern collapse in HAR patterns, yet a dryer that is milder than CO2 but better than conventional IPA dryer technology is still required. In terms of chemical reduction, the puddle process may be a solution, but some side effects related to temperature consistency and cleanliness differences due to fluid dynamics must be resolved before implementation.

※ Biography

Biography

Biography

This talk discusses the strategic importance of next-generation memory technologies, such as DRAM and HBM, in the semiconductor industry being reshaped by rapid AI advancements. It highlights their role in boosting performance and energy efficiency, while exploring broader transformations across supply chains, industry collaboration, and talent development.

Biography

The roadmap for advanced packaging in AI applications presents significant challenges, particularly with scaling up and incorporating more chiplets.
This expansion poses obstacles in terms of yield and productivity.
To address these challenges, CoP (Chip-on-Panel) technology will be introduced to complement current CoW (Chip-on-Wafer) to accelerate 3DIC scale up. However, this shift requires substantial infrastructure development, especially for tool development and material innovations. Meanwhile, material usage will be significantly increased, raising concerns about supply chain resilience.
All of which will play a pivotal role in enabling this critical technology expansion and requires seamless collaborations across backend eco-system.

Biography

As global change accelerates and the international environment becomes increasingly uncertain, the effective use of technologies such as AI is essential for Japan to achieve sustainable economic growth. At the same time, building a “Collaborative Growth Model” rooted in empathy enables us to realize true prosperity. This lecture explores the latest technological trends and discusses Japan’s vision for sustainable growth.

Biography

Generative AI is beginning to create an “autonomous digital world,” in which operations and decision-making are orchestrated autonomously through AI agents.
In this session, we will provide an overarching view of how these technological advancements are transforming corporate business processes, organizational structures, and executive decision-making, and examine the fundamental impact these changes have on competitiveness and business strategy.
In addition, the session will offer insights for Japanese companies and the Japanese market from a global perspective, while sharing Microsoft’s vision for the future and strategic perspectives on driving new value creation.

Biography

This presentation will discuss the growing importance of the semiconductor industry amid concurrent geopolitical tensions,
supply chain disruptions, and technological advancements; outline strategies for fostering innovation and strengthening supply chain resilience;
and introduce the Japanese government’s AI and semiconductor strategy in light of these developments.

Biography

This presentation explores Taiwan’s semiconductor development strategy as a "pivotal fulcrum" of the global AI industry. First, it examines how Taiwan maintains its technological leadership by leveraging advanced process nodes and the unique cluster advantage of "zero distance between R&D and production". Second, from a supply chain perspective, it analyzes innovative models for the global deployment of the industrial ecosystem. Furthermore, the session addresses the strategic management of key technical know-how amidst geopolitical challenges and defines a collaborative positioning of "deep coupling" with global partners. Finally, it highlights the evolution and vision
of government policy as it transforms from a "regulator" into an "enabler".

Biography

This session explains approaches to addressing economic security risks, incorporating the latest developments in export and investment regulations in the semiconductor sector. In particular, it focuses on risks associated with business operations in China and India.

Biography

In March this year, the Chinese Communist Party and government adopted the 15th Five-Year Plan (2026–2030), reaffirming their commitment to accelerating “self-reliance and self-strengthening” in high-tech industries centered on semiconductors. This presentation examines how far China’s semiconductor supply chain has advanced toward greater autonomy amid prolonged U.S.–China technology tensions. By analyzing developments in key firms, it also considers how Japanese companies should respond to these changes.

Biography

①Supply chain Resilience
②International Competitiveness
③Geopolitics
④Energy

The world has witnessed the Russian invasion of Ukraine, China’s wolf warrior diplomacy and a series of economic coercion, and the US military operations in Venezuela as well as Iran.
How should Japan react to the measures by major powers that shake the foundations of the rules-based international order established after WWII?

Fawning China, worshipping the US, and the deterioration of Japan’s presence in the world.
How could Prime Minister Takaichi extricate Japan’s diplomacy from such a stalemate that has continued since PM Suga through PM Kishida and Ishiba?

These will be discussed candidly in light of the speaker’s 40-year-long experience as a diplomat.

Biography

As AI reshapes the world, global competition and collaboration are accelerating. How can Japan create new value and demonstrate leadership in an era with no easy answers? Drawing on perspectives from startups, global companies, local governments, and business schools, this session offers fresh insights and invites participants to rethink Japan's future in the age of AI.

Biography

AI is dominating the semiconductor market. As AI-related semiconductor prices rise and demand continues to grow, the outlook for the Semiconductor Production Equipment (SPE) market is improving. In addition to demand fueled by technological innovations unique to AI semiconductors, the industry faces an urgent need to construct new fabrication facilities and add production lines to keep up with increased volumes. In this seminar, we will explore the outlook for both the semiconductor and SPE markets.

Biography

We would like to examine the current status and future prospects of Japan's Semiconductor Materials Industries that not only provides solutions for BEOL where semiconductor elements are formed on wafer surface but also for BEOL where thermal and insulation managements are vital. We would like to briefly touch the implications of geopolitical risks.

Biography

AI progress continues to accelerate. Frontier development is shifting from scaling pretraining to optimizing inference and strengthening agent/orchestration layers. This drives demand beyond GPUs to DPUs and data center infrastructure. As physical AI and multimodal models rise, this talk examines the implications for the semiconductor industry.

Biography

Global electricity demand is rising due to the growing needs of AI and semiconductors, alongside advancing electrification in the industry, transport, and buildings. In developing Asian countries, structural shifts toward electrification are also being pursued to counter soaring oil prices, making the securing of a stable power supply a shared global challenge.This presentation highlights future demand outlooks and proposes solutions—including AI-driven energy efficiency, grid enhancement, and "watt-bit" integration—and draws implications for Japan.

Biography

In light of the anticipated increase in electricity demand driven by the expansion of GX (Green Transformation) industrial development, as well as the expected growth in the adoption of renewable energy leveraging Hokkaido’s inherent potential, this presentation introduces Hokkaido Electric Power Company’s initiatives to secure power supply capacity and promote energy decarbonization toward the future industrial growth of Hokkaido.

Biography

As the need for carbon neutrality becomes more urgent and AI-driven data center demand continues to grow, integrating renewable energy with industrial infrastructure is increasingly important. This session highlights our 100% renewable-powered Ishikari data center as a practical model for integrating digital and green transformation at scale.

Biography

Artificial Intelligence (AI) has push the semiconductor industry toward a great challenge of energy efficiency. AI rely on massive infrastructure that are converting electricity into token. The demand is very high at either device level (high transistor density, huge amount of memory, etc.), technology level (3D integration, 3D partitioning, etc.) and infrastructure (power management, optical interconnection, etc.). These challenges are a unique opportunity to promote innovation at system level to reach a sustainable way to support AI requirements in terms of energy.
Biography

This presentation examines the structural shift whereby AI and semiconductors are emerging as critical foundations that shape national competitiveness, social resilience, and economic security. It further explores the technological trajectory toward the advancement of Vertical AI and Physical AI. Against this backdrop, it highlights the importance of transforming Japan’s unique strength in real-world operational data into a new source of competitive advantage and presents a strategy for realizing a System-to-Silicon paradigm.

Biography

As the world grapples with challenges such as population decline and intensifying global competition, how can Japan achieve sustainable growth? This session will highlight technologies such as space, AI, and robotics from a broad perspective that spans industry, society, and philosophy. We will explore Japan’s future and strategic direction through “science and technology-oriented nation,” a concept advocated by Keidanren.
Biography

The rise of AI is radically transforming the semiconductor industry. In this new era, the keys to success are speed and data. To thrive, we must build deep partnerships with cutting-edge global leaders while fostering strong co-creation with local communities. We will share our steps to create new innovations.

Biography