DuPont Wins Jeffrey Byers Best Poster Award at 2025 SPIE Advanced Lithography + Patterning Conference
Recognized for Innovative Research in More Sustainable Lithography Solutions

WILMINGTON, Del., Feb. 26, 2025 – DuPont today announced that it has been awarded the Jeffrey Byers Best Poster Award in Patterning Materials and Processes at the 2025 SPIE Advanced Lithography + Patterning conference. Presented during the conference’s opening session on Monday, Feb. 24, the award recognizes DuPont’s research on more sustainable material design for lithography.

The award-winning presentation, titled “Disruptive Non-Fluorinated Photoacid Generators Using Computational Chemistry and Library Design,” introduces a novel class of non-fluorine photoacid generators (PAGs) that can serve as a foundation for product development in sustainable lithography materials. Developed through computational chemistry and synthetic organic methods, these PAGs deliver competitive performance across multiple lithographic technologies, including i-line, KrF, ArF, and extreme ultraviolet (EUV) lithography. The research also addresses environmental and regulatory challenges associated with per- and polyfluoroalkyl substances (PFAS) – substances of concern.

Building on these findings, DuPont recently launched the DuPont™ UV™ 26GNF photoresist, the Company’s first commercial photoresist which substitutes traditional fluorine-containing PAGs with a non-fluorine alternative.

“This recognition is a testament to DuPont’s technical leadership in advancing more sustainable lithography materials,” said Ben Xie, Global R&D Director, Lithography Technologies at DuPont Electronics & Industrial. “Our team’s pioneering work in non-fluorine PAGs demonstrates our commitment to providing innovative solutions that meet the industry’s high performance standards and also help semiconductor fabricators advance their sustainability efforts by reducing substances of concern.”
The Jeffrey Byers Best Poster Award in Patterning Materials and Processes was named in memory of Dr. Jeffrey A. Byers, an award-winning researcher in sustainable chemistry. It recognizes the most outstanding poster presented at the previous year’s conference, selected on criteria including technical originality, relevance, quality of presentation, and quality of the associated paper.

Throughout the 2025 SPIE Advanced Lithography + Patterning conference, Feb. 24–28 in San Jose, California, DuPont is showcasing its latest advancements in sustainable lithography solutions as well as innovation in materials for EUV lithography. For more information about DuPont’s solutions for lithography, please visit the DuPont Electronics & Industrial website.

Caption: DuPont is awarded the Jeffrey Byers Best Poster Award in Patterning Materials and Processes at the 2025 SPIE Advanced Lithography + Patterning conference on Monday, Feb. 24, 2025. Pictured from left: Douglas Guerrero, Conference Chair for Patterning Materials and Processes, and Paul LaBeaume, Technical Manager, DuPont Electronics & Industrial and co-author of the awarded paper.

About DuPont
DuPont (NYSE: DD) is a global innovation leader with technology-based materials and solutions that help transform industries and everyday life. Our employees apply diverse science and expertise to help customers advance their best ideas and deliver essential innovations in key markets including electronics, transportation, construction, water, healthcare and worker safety. More information can be found at www.dupont.com. Investors can access information included on the Investor Relations section of the website at investors.dupont.com.

• Read more about DuPont Wins Jeffrey Byers Best Poster Award at 2025 SPIE Advanced Lithography + Patterning Conference

PDF Solutions, Inc. (Nasdaq: PDFS) today announced it has entered into a definitive agreement to acquire secureWISE, LLC, the most widely used secure, remote connectivity solution in the semiconductor manufacturing equipment industry, from Telit IOT Solutions Inc.

The secureWISE global network enables equipment manufacturers to bring up new equipment faster, provide operational support, and maximize the value derived from the equipment customers’ investments. It is currently used by over 100 equipment vendors to connect and control their tools located in over 190 semiconductor fabs and to manage the exchange of multiple petabytes of data annually.

PDF Solutions empowers semiconductor companies to maximize their manufacturing effectiveness. The PDF Solutions platform breaks down data silos to enable engineers to uncover critical relationships across manufacturing and design, resulting in better process control, product screening, and equipment operations.

As the semiconductor industry becomes more globally distributed, and as advanced devices rely on the integration of multiple chiplets into a single package, more collaboration and integration are required across the semiconductor industry. This collaboration needs to be executed securely with each participant controlling access to its intellectual property.

Today, secureWISE customers have built applications on top of the secureWISE network to deliver equipment analytics. PDF Solutions expects the acquisition to accelerate equipment makers’ ability to derive value from equipment data by enabling them to leverage PDF Solutions’ Exensio analytics software.

Beyond enabling equipment vendors to build equipment analytics at foundries, the acquisition of secureWISE is expected to dramatically expand the capability of PDF Solutions’ secure DEX OSAT network by allowing equipment makers, fab operators, and fabless companies to collaborate to optimize chip manufacturing and test.

“This acquisition extends PDF Solutions analytics for equipment makers and fabless to the factory manufacturing level, which allows them to generate value from AI,” said Dr. John Kibarian, President, CEO and co-founder of PDF Solutions. He continued, “We provide the leading analytics platform for semiconductor manufacturing, and with secureWISE, the PDF Solutions platform will also be able to help members of the semiconductor ecosystem collaborate through a secure, direct connection and control the manufacturing process down to the production equipment.”

Mike Dempsey, Vice President of secureWISE LLC, said, “We believe PDF Solutions is the ideal partner to accelerate secureWISE’s evolution, ensuring we remain at the forefront of industry trends and ahead of our customers’ needs. This acquisition will strengthen our ability to anticipate, pioneer, and integrate a far richer suite of security, collaboration, and analytics capabilities into our platform. As data exchange and collaboration become increasingly relevant to the semiconductor industry, this acquisition will better position secureWISE to deliver maximum long-term benefit to its customers who have invested in our platform.”

Under the terms of the definitive agreement, PDF Solutions will pay a cash amount of $130.0 million, subject to customary purchase price adjustments. The purchase price will be funded by a combination of cash on hand and $70M of new bank debt. The acquisition is subject to certain closing conditions and is expected to close in the first calendar quarter of 2025.

TD Securities (USA) LLC acted as financial advisor and Latham & Watkins LLP acted as legal advisor to PDF Solutions.

Updated Financial Outlook
John Kibarian, CEO and President of PDF Solutions, said, “Assuming the transaction closes in the first quarter of 2025, and with purchase accounting adjustments, we would expect to achieve a full year 2025 revenue growth rate between 21% to 23% on year-over-year basis. Given that, we also expect to achieve 2025 gross margin in line with our corporate gross margin, our target model 20% operating margin, and for EPS to be slightly accretive.”

Conference Call
PDF Solutions will discuss this announcement on a live conference call beginning at 3:00 p.m. Pacific Time / 6:00 p.m. Eastern Time today. To participate in the live call, analysts and investors should pre-register at: https://register.vevent.com/register/BI9abfc7eadb2245c5ba00c59922fe6c87.

Registrants will receive dial-in information and a unique passcode to access the call. We encourage participants to dial into the call ten minutes ahead of the scheduled time. The teleconference will also be webcast simultaneously on the Company’s website at https://ir.pdf.com/webcasts. A replay of the conference call webcast will be available after the call on the Company’s investor relations website. A copy of this press release will also be available on PDF Solutions’ website at News & PR Archives - PDF Solutions following the date of this release.

Forward-Looking Statements
The statements in this press release regarding the expected future financial results, benefits and synergies of the secureWISE acquisition on PDF Solution’s product offerings, and the expected closing of the secureWISE acquisition are forward looking and are subject to future events and circumstances. Actual results could differ materially from those expressed in these forward-looking statements. Risks and uncertainties that could cause results to differ materially include risks associated with: uncertainties with respect to the timing of the closing of the proposed transaction, including when and whether all conditions to closing will be satisfied; the failure of expected benefits from the proposed transaction to be realized or to be realized within the expected time period; uncertainties with respect to the future performance of secureWISE following an acquisition by PDF Solutions; PDF Solution’s ability to integrate secureWISE and its product and service offerings, the cost and schedule of new product development; continued adoption of the PDF Solution’s and secureWISE’s solutions by new and existing customers; the fact that operating costs and business disruption may be greater than expected following the public announcement or consummation of the proposed transaction; potential adverse reactions or changes to business or employee relationships, including those resulting from the public announcement or consummation of the proposed transaction; the incurrence of significant transaction costs related to the proposed transaction; unknown or understated liabilities of secureWISE; and other risks set forth in PDF Solutions’ periodic public filings with the Securities and Exchange Commission, including, without limitation, its Annual Reports on Form 10-K, most recently filed for the year ended December 31, 2023, Quarterly Reports on Form 10-Q, and Current Reports on Form 8-K and amendments to such reports. The forward-looking statements made herein are made as of the date hereof, and PDF Solutions does not assume any obligation to update such statements nor the reasons why actual results could differ materially from those projected in such statements.

About PDF Solutions
PDF Solutions (Nasdaq: PDFS) provides comprehensive data solutions designed to empower organizations across the semiconductor and electronics industry ecosystem to improve the yield and quality of their products and operational efficiency for increased profitability. The Company’s products and services are used by Fortune 500 companies across the semiconductor and electronics ecosystem to achieve smart manufacturing goals by connecting and controlling equipment, collecting data generated during manufacturing and test operations, and performing advanced analytics and machine learning to enable profitable, high-volume manufacturing.

Founded in 1991, PDF Solutions is headquartered in Santa Clara, California, with operations across North America, Europe, and Asia. The Company (directly or through one or more subsidiaries) is an active member of SEMI, INEMI, TPCA, IPC, the OPC Foundation, and DMDII. For the latest news and information about PDF Solutions or to find office locations, visit: https://www.pdf.com.

Headquartered in Santa Clara, Calif., PDF Solutions also operates worldwide in Canada, China, France, Germany, Italy, Japan, Korea, Sweden, and Taiwan. For the Company’s latest news and information, visit https://www.pdf.com.

About secureWISE
The secureWISE platform enables secure and controlled remote connectivity, collaboration and service enablement in the semiconductor industry. The secureWISE suite of products and services is designed to give OEM suppliers role-based, real-time and on-demand access to their equipment that is installed at the production facilities of their customers, to deliver valuable operational insights, mission-critical performance, substantial time and cost savings, and new service revenue opportunities. As the only remote access tool built around the ISMI guidelines, secureWISE is installed in over 90% of the world’s 300mm semiconductor fabs and also numerous solar and chemical plants across the globe. https://www.telit.com/iot-platforms-overview/telit-securewise/

PDF Solutions and the PDF Solutions logo are trademarks or registered trademarks of PDF Solutions, Inc. and/or its subsidiaries in the United States and other countries. Other trademarks used herein are the property of their owners.

• Read more about PDF Solutions to Acquire secureWISE to Expand the Reach of its Semiconductor Manufacturing Data Platform

–– Breker Verification Systems today confirmed its RISC-V SystemVIP library components and test suite synthesis product portfolio is deployed in more than 15 commercial RISC-V semiconductor design projects, while its RISC-V products are used in several large-scale academic projects.

Large, complex application processor projects that range from data center, automotive and AI accelerator to consumer device applications rely on Breker’s RISC-V CoreAssurance™, SoCReady™ and Cache Coherency SystemVIPs across the RISC-V core and SoC verification stack. Breker executives are heading working groups in the evolving RISC-V International certification program.

“Breker Verification Systems’ products provide significant advantages on top of standard verification solutions, especially for the most challenging verification problems,” affirms Ty Garibay, President of Condor Computing. “Applying these approaches to RISC-V processor design was a natural extension, and leveraging this technology in the development of our high-performance CPU IP is already paying dividends.”

Breker’s test suite synthesis solution and SystemVIP library allow for enhanced verification coverage while significantly reducing test development time for complex scenarios. The verification of processor cores that leverage the RISC-V Open Instruction Set Architecture (ISA) requires testing specialized, unique scenarios. Breker’s RISC-V synthesized SystemVIPs make use of AI Planning Algorithms, cross-test multiplication and concurrent, multi-threaded scheduling provide rigorous testing from randomized instructions to unique coherency, paging and other complex system integration validation.

“MIPS RISC-V cores represent the state-of-the-art in advanced application processor solutions,” notes Steve Mullinnix, Senior Director, Design Verification, MIPS. “Working with Breker, we are able to verify complex, compounded scenarios unique to these devices quickly and efficiently.”

Breker is cooperating with academic institutions including Harvey Mudd College in Claremont, Calif., and Oklahoma University, developers of the Wally open-source processor core, and ETH Zurich in Zurich, Switzerland, that produced the Ariane processor core. Breker has provided application-level tests for these institutions while collaborating on next-generation verification environments.

“Breker is at the forefront of RISC-V verification,” comments David Harris, the Harvey S. Mudd Professor of Engineering Design. “It’s first-rate SystemVIP synthesis platform is a breakthrough verification tool and an effective problem-solver for our RISC-V programs.”

Additionally, executives from Breker are leading two working groups within RISC-V International’s Certification Steering Committee to develop a program to provide a quality stamp based on extensive, independent architectural testing.

“The rate of adoption of our tools is remarkable and supports our belief that test suite synthesis is a must-have tool for every RISC-V design project,” says David Kelf, Breker’s Chief Executive Officer. “Our efforts to build more features will continue as will our willingness to partner with leading project groups and industry organizations helping to cement the RISC-V ISA place across the semiconductor industry.”

Breker’s RISC-V CoreAssurance, SoCReady and SystemVIP
Breker unveiled RISC-V CoreAssurance, SoCReady and SystemVIP in June 2024, along with a complete range of tests for the entire RISC-V core verification stack. Starting with randomized instruction generation and microarchitectural scenarios, SystemVIP includes unique tests that check all integrity levels ensuring the smooth application of the core into an SoC, regardless of architecture, and the evaluation of possible performance and power bottlenecks and functional issues.

The SystemVIP can be extended for custom RISC-V instructions to be fully incorporated into the complete test suite crossed with other tests. It is self-checking and incorporates debug and coverage analysis solutions and can be ported across simulation, emulation, prototyping, post-silicon and virtual platform environments.

Breker’s SystemVIP is used for a variety of complex RISC-V core designs, including system coherency in a multicore SoC integrity test sets, high-coverage core test, power domain switching, hardware security access rules, and automated packet generation.

Breker at DVCon U.S. February 24-27 in San Jose
Breker will exhibit and demonstrate its RISC-V CoreAssurance and SoCReady SystemVIP and Trek Test Suite Synthesis solutions at DVCon U.S. February 24-26 at the DoubleTree Hotel in San Jose, Calif.

It will present a workshop titled “Complex Verification Example: RISC-V MMU Verification of Virtualization and Hypervisor Operation for CPU and SOC platforms” Monday, February 24, from 3:30 p.m. until 5 p.m. in the Oak Room.

To arrange a demonstration or private meeting, send email to [email protected].

About Breker Verification Systems
Breker Verification Systems solves complex semiconductor challenges across the functional verification process from streamlining UVM-based testbench composition to execution for IP block verification, significantly enhancing SoC integration and firmware verification with automated solutions that provide test content portability and reuse. Breker solutions easily layer into existing environments and operate across simulation, emulation and prototyping, and post-silicon execution platforms. Its Trek family is production-proven at leading semiconductor companies worldwide and enables design managers and verification engineers to realize measurable productivity gains, speed coverage closure and easy verification knowledge reuse. As a leader in the development of the Accellera Portable Stimulus Standard (PSS), privately held Breker has a reputation for dramatically reducing verification schedules in advanced development environments. Case studies that feature Altera (now Intel), Analog Devices, Broadcom, IBM and other companies leveraging Breker’s solutions are available on the Breker website.

Engage with Breker at:
Website: www.brekersystems.com
Twitter: @BrekerSystems
LinkedIn: https://www.linkedin.com/company/breker-verification-systems/
Facebook: https://www.facebook.com/BrekerSystems/

• Read more about Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification

Expanded Collaboration Aims to Bridge Talent Gap, Drive Innovation and Growth

SUNNYVALE, Calif., February 18, 2025 – Synopsys, Inc. (Nasdaq: SNPS) and the SEMI Foundation today announced the signing of a Memorandum of Understanding (MoU) at Synopsys’ corporate headquarters in Sunnyvale, Calif. to advance workforce development within the semiconductor chip design sector. It’s predicted¹ the global industry will need to fill over one million additional semiconductor jobs by 2030, equivalent to 100,000 jobs annually highlighting the crucial need for workforce development programs. Collaborations like this one are essential to bridging the chip design talent gap and shaping the innovators of tomorrow. Together, Synopsys and SEMI Foundation will engage in opportunities to collaborate on education and training programs with academic institutions and industry experts to enhance chip design workforce development both in the United States and internationally. The two organizations will also jointly develop specialized education and training programs designed for K-12 students, academic institutions, and military veterans, providing support and resources across the talent development spectrum.

As a global silicon to systems design leader, Synopsys, through its SARA (Synopsys Academic & Research Alliances) program, has been an active participant in workforce development activities worldwide. SARA empowers the workforce of tomorrow by enabling access to cutting-edge technologies, developing shared programs, and partnering on advanced collaborations to support universities in building a diverse semiconductor workforce ready to invent the technology of the future. This collaboration with the SEMI Foundation will strengthen the pipeline of skilled talent to benefit the global semiconductor ecosystem and align with Synopsys’ goal to be the preferred technology partner-of-choice for workforce development. 
 

"I have been honored to be a part of the SEMI Foundation Board of Trustees for over five years. This partnership has been instrumental in driving forward a shared vision for a diverse and skilled workforce in the microelectronics sector. By leveraging our combined expertise and resources, we aim to make a tangible impact on the industry's ability to attract, develop, retain, and advance an inclusive and skilled workforce," said Katy Crist, Director of Workforce Development at Synopsys and SEMI Foundation Board of Trustees Member.  

"Workforce development is critical for driving the semiconductor industry’s continued growth and innovation," said Shari Liss, Vice President, Global Workforce Development & Initiatives at SEMI. "We are excited to announce our strategic partnership with Synopsys to advance education and training initiatives that engage, inform, and inspire the next generation of high-tech talent in the United States and abroad. Launching in 2025, our first program will focus on training students, educators, and military service members transitioning to civilian careers to expand participation in the chip design sector. Through this collaboration, the SEMI Foundation will further its mission to foster economic opportunity and equip semiconductor companies with the skilled talent they need to succeed."

Additional Resources

• Addressing the Semiconductor Talent Gap Q&A with 2024 SIGDA Distinguished Service Award Winner Patrick Haspel
• SEMI Foundation Workforce Development Programs
• SEMI High Tech U

¹Deloitte, “The Global Semiconductor Talent Shortage” Report, 2022,

https://www2.deloitte.com/us/en/pages/technology/articles/global-semiconductor-talent-shortage.html

About Synopsys
Catalyzing the era of pervasive intelligence, Synopsys, Inc. (Nasdaq: SNPS) delivers trusted and comprehensive silicon to systems design solutions, from electronic design automation to silicon IP and system verification and validation. We partner closely with semiconductor and systems customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.  Learn more at www.synopsys.com.

About SEMI Foundation

The SEMI Foundation’s mission is to support economic opportunity for workers and the sustained growth of the microelectronics industry through creating pathways and opportunities for job seekers and tools and systems for semiconductor companies to attract, develop, retain, and advance a diverse and skilled workforce. Visit the SEMI Foundation online to learn more, and follow the SEMI Foundation on LinkedIn.

Editorial Contacts:

Cara Walker

Synopsys, Inc.

(650) 584-5000

[email protected]

Sherrie Gutierrez

SEMI Foundation

(831) 889-3800

[email protected] 

• Read more about Synopsys Teams Up with SEMI Foundation to Drive Workforce Development Initiatives in Semiconductor Industry