downloadGroupGroupnoun_press release_995423_000000 copyGroupnoun_Feed_96767_000000Group 19noun_pictures_1817522_000000Member company iconResource item iconStore item iconGroup 19Group 19noun_Photo_2085192_000000 Copynoun_presentation_2096081_000000Group 19Group Copy 7noun_webinar_692730_000000Path
Skip to main content
Default Banner Image

United States

Espoo, Finland, July 14, 2025 – Beneq, a global leader in Atomic Layer Deposition (ALD) technology, is proud to announce significant progress in the microLED display market, underscored by repeat orders from industry-leading technology innovators. MicroLED technology is revolutionizing the future of displays across sectors including consumer electronics, augmented and virtual reality (AR/VR), and the automotive industry. With unparalleled brightness, contrast, energy efficiency, and durability, microLED represents a paradigm shift in how displays are designed and manufactured – enabling ultra-fine pixel resolution, seamless scalability, and longer device lifetimes. As demand for next-generation display solutions accelerates, microLED is poised to become the backbone of future visual interfaces.

According to Yole Group, global microLED display shipments are projected to grow at a compound annual growth rate (CAGR) of 180.6% from 2022, reaching 42.4 million units by 2029. Despite its promise, microLED development presents formidable challenges, particularly in scaling down pixel sizes to below 10 micrometers while maintaining uniformity, stability, and manufacturability. As pixels shrink, precise material control and surface passivation become critical to device performance. Atomic Layer Deposition offers a unique solution, enabling ultra-thin, conformal coatings with atomic-level precision. ALD addresses key barriers in microLED production, such as surface defect passivation, sidewall protection, transparent conductive oxides and final passivation, thereby improving both device efficiency and long-term reliability.

“Our top-tier customers rely on ALD technology to advance monolithic integration of microLEDs and driver electronics on a single chip. This integration paves the way for a new class of smaller, more powerful display products – delivering faster data transfer, lower power consumption, and a significantly more compact footprint,” says Mikko Söderlund, Head of Semiconductor ALD Sales.

“These repeat orders validate Beneq’s solution and demonstrate the company’s commitment to support customers through both the demanding development phase and the critical transition to volume manufacturing.”

Beneq’s Transform® ALD cluster platform stands at the forefront of this technological evolution. Designed for high-throughput production and advanced technology development, the Beneq Transform combines modularity, flexibility, and productivity, making it an ideal tool for microLED manufacturers. Its multi-chamber architecture supports a wide range of materials and processes, enabling customers to fine-tune optical and electrical properties while seamlessly scaling from lab to fab. By equipping microLED pioneers with the tools needed to overcome manufacturing barriers, the Beneq Transform is helping accelerate the commercialization of microLED displays – paving the way for brighter, smarter, and more sustainable electronic experiences.

About Beneq

Beneq pioneered industrial Atomic Layer Deposition (ALD) with the introduction of the first commercial ALD equipment in 1984. Today, Beneq advances ALD technology adoption and validation with a portfolio that includes Transform®, Transform® 300, and Prodigy™ for specialty semiconductor device fabrication; TFS 200 and TFS 500 for R&D; innovative spatial ALD platforms such as the C2R™, and Genesis for roll-to-roll processing. Beneq’s products support process innovation from lab to fab, enabling integration of ALD in high volume manufacturing. Headquartered in Espoo, Finland, Beneq operates globally to help customers scale ALD solutions for the future of semiconductors, optics, and functional coatings.

Press Contact

Charlotte Bärlund
Event and Communications Lead
[email protected]

Lie Luo
Head of Marketing
[email protected]

Kitchener, Ontario, July 8, 2025 – PEER Group®, the largest supplier of innovative factory automation software products for the semiconductor industry, is hosting a webinar that will provide critical information to help equipment suppliers comply with the new SEMI® Cybersecurity Standard E187: Specification for Cybersecurity of Fab Equipment.

“SEMI E187 is one of a growing group of cybersecurity standards that have been developed to help secure the semiconductor manufacturing supply chain and build resilience in the face of an increasing threat of cyberattacks,” says Doug Suerich, PEER Group’s Director of Marketing and Governing Council member of the Semiconductor Manufacturing Cybersecurity Consortium (SMCC), “this webinar will provide OEMs with a crash course on the new cybersecurity standards and detail best practices on how to comply with E187.”

A popular speaker at a variety of industry conferences and tradeshows, Suerich will be the main speaker during the webinar, titled SEMI Cybersecurity Standard E187: Are you ready? During the 45-minute presentation, Suerich will delve into the history, development, and industry-wide collaboration that has resulted in the publication of SEMI’s new cybersecurity standards. This will be followed by an in-depth break down of SEMI E187, with Suerich explaining what equipment makers must do to achieve compliance and meet the factory specification.

Mike Barrett, Vice President, Global Sales at PEER Group will host the webinar. “As a software supplier to both semiconductor OEMs and fabs, we have deep knowledge and experience helping our customers meet the strict requirements outlined in factory specifications,” shares Barrett, while noting: “One thing we’re starting to see is that factories are beginning to require SEMI Cybersecurity Standards compliance as part of the factory purchase specification. Considering the risk and financial damages that come with a cyberattack, we expect to only see this requirement increase.”

The webinar is free to attend but requires registration. It will take place live on July 24, 2025, at 1:00 p.m. EDT.

To learn more, and to register, visit: https://attendee.gotowebinar.com/register/7410295402908186710?source=se…

About PEER Group
PEER Group® is the leading global supplier of innovative factory and tool automation and connectivity software for the semiconductor industry. Since our founding in 1992, we have been committed to developing best-in-class solutions that help OEMs and factories reduce their time to market, risk, and costs by solving their most challenging automation, connectivity, and SEMI Standards compliance problems. Follow PEER Group on. Follow PEER Group on LinkedIn.

United States Image Training

Course Description

This course introduces key cybersecurity principles, practices, and strategies tailored for semiconductor manufacturing environments. Participants will explore foundational concepts in cybersecurity, risk management, and best practices to secure semiconductor manufacturing systems and data.

Who Should Attend

This course is designed for:

  • Engineers and technicians in semiconductor manufacturing
  • IT professionals managing manufacturing systems
  • System administrators responsible for securing semiconductor equipment and networks
  • Individuals tasked with implementing cybersecurity strategies in industrial settings

Prerequisites

  • Basic understanding of semiconductor manufacturing processes
  • Familiarity with IT infrastructure (networks, computers, and systems)

Learning Objectives

By the end of the course, participants will: 

  • Understand the basic principles of cybersecurity and their importance in a manufacturing environment. 

  • Be able to assess and manage cybersecurity risks within semiconductor manufacturing systems. 

  • Learn practical strategies to implement cybersecurity measures for protecting critical infrastructure, devices, and data. 

  • Gain insights into responding to and recovering from cybersecurity incidents. 

  • Be prepared to develop and promote a strong security culture within their organization. 

     

Instructor

Jim Montgomery

Jim Montgomery

Instructor Bio

 

Important Information

Note that only the person who registered will receive a certificate of completion. This virtual training will not be recorded. Attendees must be present to access course knowledge. 

Can't find the training link day of? After you register, you will receive the link to the live training via the email address you provided. In addition, you will receive email reminders about 24 hours in an advance and an hour before with the same link. Please keep these emails on hand to access the trainings on time. If you do not see any confirmation emails, please check your junk/spam folders before contacting SEMI U for support.

United States

SEMI U Standards

Unlock the secrets to safeguarding semiconductor manufacturing systems with this comprehensive cybersecurity course. Learn essential principles, risk management strategies, and best practices to protect critical infrastructure and data from cyber threats. Equip yourself with the knowledge to implement robust security measures and respond effectively to incidents in industrial environments.

Pricing
  • Members: $299
  • Non-Members: $325

* For group orders with 10+ attendees, and for Students/Veterans discounted pricing, please contact [email protected]

4:00 pm - 8:00 pm Off Add to Calendar 2025-11-05 16:00:00 2025-11-05 20:00:00 Implementing Basic Cybersecurity Principles in Semiconductor Manufacturing (Virtual Training - Americas & Asia) Unlock the secrets to safeguarding semiconductor manufacturing systems with this comprehensive cybersecurity course. Learn essential principles, risk management strategies, and best practices to protect critical infrastructure and data from cyber threats. Equip yourself with the knowledge to implement robust security measures and respond effectively to incidents in industrial environments.PricingMembers: $299Non-Members: $325* For group orders with 10+ attendees, and for Students/Veterans discounted pricing, please contact [email protected] United States SEMI.org [email protected] America/Los_Angeles public America/Los_Angeles Cancelled
Event format
Promote in calendar
Off

Prudential Cleanroom Services is proud to announce our newest cleanroom laundry processing facility in Heath, OH (located in the greater Columbus / Central Ohio market area). The Ohio market is important to Prudential, so we can best serve our customers expansion requirements in the region. This will be Prudential’s eighth ISO Class 3 cleanroom laundry processing facility in the United States. This extends the greatest throughput capacity from any company in our industry. The new state of the art Cleanroom Laundry Processing Plant is approximately 67,000 square-feet and sits on over nine (9) acres. The NEW projected investment is projected to be $35 million. The site will employ up to eighty (80) full time employees or more. This Plant will be the industry’s most modern, newest and amongst the largest cleanroom processing Plants in the United States and possibly the world! Prudential is excited to bring this customer centric facility to Ohio that will provide direct services throughout the Midwest! https://www.prudentialuniforms.com/event/heath-ribbon-cutting-ceremony/

United States standards-500w.jpg

United States

- Standards

Liquid Chemicals North America TC Chapter

July Meeting

Date: Tuesday, July 29 - Wednesday, July 30

Time: 09:00-12:00 Noon Pacific Time

via Virtual Meeting

 

AGENDA

(subject to change) 

Last updated: July 23, 2025

9:00 am - 12:00 pm Off Add to Calendar 2025-07-29 09:00:00 2025-07-30 12:00:00 Liquid Chemicals North America TC Chapter July Meeting Liquid Chemicals North America TC ChapterJuly MeetingDate: Tuesday, July 29 - Wednesday, July 30Time: 09:00-12:00 Noon Pacific Timevia Virtual Meeting AGENDA(subject to change) Last updated: July 23, 2025 United States SEMI.org [email protected] America/Los_Angeles public America/Los_Angeles

Voting Instructions

To Vote During TC Chapter Meetings

  1. Open a separate Web browser and go to:  https://svm.semi.org/
  2. Click “Login”
  3. Enter your Standards Membership username and password (same login you use for voting on ballots)
  4. Find the meeting room you wish to attend under “Room Name”
  5. Click “Go” to enter the meeting room.

 

NOTE: You must be a registered SEMI Standards Program Member to gain access. Reach out to your staff contact if you are unable to log on, or if your "voting interest" is incorrect or shows "NONE".

 

Next Meetings

Save the Date!

SEMICON West Standards Meetings
October 6-9, 2025 @ Phoenix, Arizona, California

 

Contact

Please email staff contact below for virtual information:

Laura Nguyen
Sr. Coordinator, International Standards
 

Event format
Tab Order
Overview
Agenda
Registration
New Tab 1
Travel
Sponsors
Call for Abstracts
Call for Papers
Technology Showcase
Press
New Tab 2
Photo Gallery
Promote in calendar
Off

Martinez, CA—EUV Tech (EUVT), a global leader in designing and manufacturing at-wavelength EUV metrology equipment, is excited to announce the release of the FALCON Photoresist Flood Exposure Tool. As our next-generation EUV resist characterization and diagnostics tool, FALCON allows photoresist manufacturers to rapidly and accurately test EUV resist sensitivity, as well as providing patterning materials developers critical insights into exposure mechanisms.

Built upon EUV Tech’s proven resist tool technology, FALCON is a fully automated tool that supports high-throughput contrast curves on EUV-patterning materials and radiation chemistry diagnostics by integrating a wide variety of optional add-on analysis and processing modules.

Enhancing FALCON’s platform is an array of in-situ analysis and process modules, including Fourier Transform Infrared (FTIR) Spectroscopy, Atomic Mass Spectrometry, Total Electron Yield (TEY), Photo-Electron Spectroscopy (PES), environmental and vacuum bake module with additional diagnostics, and a scanner-environment exposure module.

Key to FALCON’s effectiveness is its highly uniform exposure spot size of 6 mm, supporting high-sensitivity chemical analysis and over 1,000 exposures for a 300 mm wafer in a single recipe run. Built-in data visualization tools make it possible to analyze this rich data. Combining uniformity, high configurability, and deep data collection and analysis makes FALCON a highly efficient, cost-effective tool for advanced photoresist development.

For more information on the enhanced FALCON Flood Exposure Tool or any of EUV Tech’s at-wavelength metrology tools, please visit euvtech.com.

About EUV Tech
EUV Tech enables technology advancement in the frontiers of semiconductor manufacturing and material science through the development of world-leading EUV and soft-x-ray instrumentation and techniques.

For further information, contact:
EUV Tech, Inc.
[email protected]
+1 (925) 229-4388

CEA LID World Summit, Grenoble, France, June 17, 2025 – Agileo Automation, a leading provider of control and connectivity solutions for global semiconductor manufacturing equipment, today announced the future expansion of its A²ECF-SEMI automation framework to include SEMI’s EDA (Equipment Data Acquisition) standards suite. This integration that already includes Agil’GEM and Agil’GEM300 will empower OEMs to deliver structured, high-bandwidth data to manufacturing facilities and drive process improvements with artificial intelligence (AI) by leveraging large amounts of reliable, actionable data. EDA standards, built on the legacy of SECS/GEM and GEM300, are transforming equipment communication and enabling high-speed, data-driven manufacturing. As semiconductor fabs become more connected and automated, the ability of OEM equipment to integrate seamlessly and deliver high-quality, structured data has become a competitive differentiator. 

Agileo Automation has carried out EDA Freeze 2 client and server tests with equipment manufacturers already supporting EDA and is working with these early adopters on the integration on their equipment using A²ECF-SEMI, Agil'GEM, and Agil'GEM300. The company will soon be providing a comprehensive offer for OEMs in need of EDA Freeze 2 or 3. EDA is increasingly required in RFQs that equipment manufacturers must address.

“EDA is going to enable fabs to realize superior yields, faster innovation cycles, and a sustainable competitive advantage in an ever-accelerating market,” explains Marc Engel, CEO of Agileo Automation. “Agileo is proud to be a major contributor to this global effort and pleased to support OEMs in all market segments with a complete and scalable product suite.”

About Agileo Automation

Since its inception in 2010 in Poitiers, France, Agileo Automation has empowered global semiconductor equipment manufacturers to optimize their production machines with control, communication, data acquisition, and testing solutions, enabling their deployment in large-scale fabs worldwide. At the heart of Industry 4.0, Agileo’s A²ECF-SEMI framework provides a robust foundation for developing equipment controller software, leveraging the SEMI SECS/GEM and GEM300 standard suites. As a member of SEMI and the OPC Foundation, Agileo Automation is a key contributor to the development and integration of industry standards such as SEMI standards and OPC Unified Architecture (OPC UA). For more information, please visit our web site or follow us on LinkedIn.

Nordson Electronics Solutions, a global leader in reliable electronics manufacturing technologies, has developed several solutions for panel-level packaging (PLP) during semiconductor manufacturing. In one particular case, Nordson’s customer, Powertech Technology, Inc. (PTI) saw underfill yields improve to greater than 99% as they plan to transition from wafers to panels in their manufacturing operations. For details about this solution developed in late 2024 and 2025, download the case study here: Customer Success: Powertech Technology Inc. (PTI) Advances Panel Level Packaging with Nordson.

PTI, one of the world’s top OSAT (Outsourced Semiconductor Assembly and Test) companies, worked with the Nordson applications team to set up a comprehensive PLP demonstration that achieved high-quality, void-free underfill results at scale, using the industry-leading ASYMTEK Vantage® Series fluid dispensing system, equipped with the ASYMTEK IntelliJet® Jetting system. Nordson’s precision technology mitigated warpage and optimized fluid flow while decreasing cycle time by almost 30%.

PLP offers a path to managing the complexity of larger die sizes and higher-density designs while maintaining manufacturability and cost efficiency as the semiconductor industry transitions from 300-mm wafers to panels. PTI is enabling PLP applications that are designed to meet the semiconductor industry’s growing demands to serve AI, high-performance computing (HPC), and chiplet-based architectures.

Underfill has been pivotal in semiconductor packaging since the adoption of flip-chips in the 1990s. As applications have become more demanding, particularly in high-performance CPUs, GPUs, and advanced architectures like flip-chip and 2.5D/3D ICs, the importance of underfilling to enhance mechanical reliability and thermal performance has grown. Since the beginning, Nordson developed innovations for underfill processes as the industry evolved from PC board, substrate, wafer, and now panel applications.

Nordson’s distributor, Jetinn Global Equipment Ltd., supported the advancements discussed in this case study by investing in demonstration equipment and providing expert technical support.

WATCH ON-DEMAND

Belgium France Germany Ireland Italy Japan Singapore South Korea Taiwan United States EMG Webinar 2025_1 Business Executive Technical

Are We There Yet? Metrology and Inspection for Angstrom-Level Manufacturing ​

In the semiconductor industry where we routinely pattern sub-wavelength structures and require atomic-layer precision in our manufacturing processes, it’s easy to assume that we can simply measure everything we’re doing and all the structures we create. In reality, though, metrology and inspection have the challenging task of not just keeping up with device technology but staying far enough ahead that we can actually “see” our results and confirm the progress we’re making.

In this webinar, co-hosted with the Electronics business of Merck KGaA, Darmstadt, Germany; we will explore the metrology and inspection space to learn more about technological advances driving this vital segment of semiconductor manufacturing.

The webinar will feature presentations by Eric Beyne, PhD, Senior Fellow, VP R&D and Director of 3D System Integration Program for imec, and Dario Alliata, PhD, Senior Application Director for Metrology & Inspection at the Electronics business of Merck KGaA, Darmstadt, Germany.

Following the presentations, an interactive Q&A segment will allow attendees a chance to deepen their understanding of how materials innovation and advanced metrology intersect at the leading edge of manufacturing.

Join us to engage with peers and pioneers working at the forefront of materials science and semiconductor innovation!

 

United States

Dario Alliata
Dario Alliata, PhD
Senior Director of Applications
The Electronics business of Merck KGaA, Darmstadt, Germany

The Role & the Challenge of Metrology and Inspection in Advanced Packaging of AI Chips

The massive adoption of social networking and artificial intelligence has pushed the semiconductor industry to develop devices capable of supporting the required infrastructures. Increasingly powerful computer process units (CPU) are used to allow data centers to process trillions of information exchanges, while faster graphic process units (GPU) enable virtual and assisted reality.
Cost leveraging is now reachable with the integration of multiple dies in the same package, each one fabricated to handle specific functionalities with the most cost-effective technology node, which is a form of heterogeneous integration. This session highlights some examples of metrology and inspection solutions aimed at securing the manufacturability of devices for High Computing Power fundamental for AI applications. More in detail, it explores the challenge of the fabrication of chip-to-chip interconnections that are key for the heterogeneous integration of active components with vertical stacking like DRAM for High Bandwidth memories, where process tolerances are increasingly narrow and conditions to measure more and more extremes.

Biography
Dr. Dario Alliata joined Unity-SC, now part of the Electronics business of Merck KGaA, Darmstadt, Germany in the U.S. and Canada. In 2016 as product manager and is now Sr. Director of Applications with focus on Advanced packaging and Specialty substrates & devices.
He worked in the semiconductor industry for more than 25 years, initially in R&D centers and later in equipment makers. He spent his entire career developing process control solutions for securing the manufacturing chain in the semiconductor industry.
He received a MD in Physics from the University of Milan (Italy) and hold a Ph.D. in Physics & Chemistry from the University of Berne (Switzerland).

EB
Eric Beyne, PhD
VP R&D / Program Director 3D System Integration Program / Senior Fellow
imec

Sub-Micron Pitch Scaling of Hybrid Bond Interconnects: Metrology Challenges

Advanced 3D integration technology will increasingly rely on hybrid bonding technology for both wafer-to-wafer and die-to-wafer bonding. This allows for micrometer and sub-micrometer pitch interconnects, resulting in very high 3D interconnect densities, compatible with the back-end-of -line interconnect layers of active logic and memory die. The results are “seamlessly” interconnected die. Off-chip interconnects become equivalent (or better) than on-chip interconnects.
These great system-level benefits however come at some challenges. Small overlay errors or surface imperfections can prevent defects, resulting in yield loss. Critical process, steps, such as CMP, wafer dicing and surface cleaning steps, need to be monitored with higher accuracy to maintain a good process. New parameters, such as wafer shape, distortion, surface profile slopes, and copper pad recess levels need to be measured and continuously monitored. This poses significant challenges to metrology related to hybrid bonding. The presentation will highlight these needs and show some practical solutions.

Biography
Eric Beyne obtained a degree in electrical engineering in 1983 and the Ph.D. in Applied Sciences in 1990, both from the Katholieke Universiteit Leuven, Belgium. Since 1986 he has been with IMEC in Leuven, Belgium where he has worked on advanced packaging and interconnect technologies. Currently, he is imec senior fellow, VP R&D and program director of imec’s 3D System Integration program.

Michael Weigand
Michael Weigand
Senior Application Manager
Brewer Science

Moderator

Biography
I'm a seasoned Senior Application Manager at Brewer Science with over two decades of experience in Semiconductor industry. I lead application teams at Brewer Science Inc, focusing on advanced materials for the semiconductor industry. With a background in Material Science, I enjoy tackling technical challenges, from optimizing critical processes to finding creative ways to characterize materials.

EMG

Sponsored by the Electronics business of Merck KGaA, Darmstadt, Germany 

10:00 am - 11:00 am Off Add to Calendar 2025-09-17 10:00:00 2025-09-17 11:00:00 Are We There Yet? Metrology and Inspection for Angstrom-Level Manufacturing ​ Sponsored by the Electronics business of Merck KGaA, Darmstadt, Germany  United States SEMI.org [email protected] America/Los_Angeles public America/Los_Angeles WATCH NOW
Event format
Promote in calendar
Off