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United States Ion Beam Tech Tile Training
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Marcel Demmler graduated in Physical Engineering in 2007. After graduation, he had a position in the R&D team at a company specializing in ion beam and plasma process technologies. In 2011, he started working as a Sales Director for the US and Japanese markets in that company. Marcel Demmler has been responsible for the worldwide sales and service organization at scia Systems since 2013.

United States

MSIG

High-precision sensors have been rapidly adopted across various industries and applications, including automotive electronics, industrial equipment, and cloud storage.

Among the advanced techniques used to produce high-quality sensors made of complex multi-layer compositions, ion beam and plasma processing stands out due to their precision and efficacy. In this webinar, scia Systems explains the principles and advantages of ion beam and plasma technologies and how they can be applied to produce sophisticated, high-quality sensors.

Key Takeaways:

· Learn how ion beam processing enables sensor production.

· Understand how ion beam etching streamlines the manufacturing of different sensor types, such as TMR, IR, and pyroelectric sensors.

· Discover the benefits of thin film deposition with scia Systems’ coating solutions for bio-sensors.

8:00 am - 9:00 am Off Add to Calendar 2025-04-23 08:00:00 2025-04-23 09:00:00 scia systems webinar High-precision sensors have been rapidly adopted across various industries and applications, including automotive electronics, industrial equipment, and cloud storage.Among the advanced techniques used to produce high-quality sensors made of complex multi-layer compositions, ion beam and plasma processing stands out due to their precision and efficacy. In this webinar, scia Systems explains the principles and advantages of ion beam and plasma technologies and how they can be applied to produce sophisticated, high-quality sensors.Key Takeaways:· Learn how ion beam processing enables sensor production.· Understand how ion beam etching streamlines the manufacturing of different sensor types, such as TMR, IR, and pyroelectric sensors.· Discover the benefits of thin film deposition with scia Systems’ coating solutions for bio-sensors. United States SEMI.org [email protected] America/Los_Angeles public Register here
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DuPont Wins Jeffrey Byers Best Poster Award at 2025 SPIE Advanced Lithography + Patterning Conference
Recognized for Innovative Research in More Sustainable Lithography Solutions

WILMINGTON, Del., Feb. 26, 2025 – DuPont today announced that it has been awarded the Jeffrey Byers Best Poster Award in Patterning Materials and Processes at the 2025 SPIE Advanced Lithography + Patterning conference. Presented during the conference’s opening session on Monday, Feb. 24, the award recognizes DuPont’s research on more sustainable material design for lithography.

The award-winning presentation, titled “Disruptive Non-Fluorinated Photoacid Generators Using Computational Chemistry and Library Design,” introduces a novel class of non-fluorine photoacid generators (PAGs) that can serve as a foundation for product development in sustainable lithography materials. Developed through computational chemistry and synthetic organic methods, these PAGs deliver competitive performance across multiple lithographic technologies, including i-line, KrF, ArF, and extreme ultraviolet (EUV) lithography. The research also addresses environmental and regulatory challenges associated with per- and polyfluoroalkyl substances (PFAS) – substances of concern.

Building on these findings, DuPont recently launched the DuPont™ UV™ 26GNF photoresist, the Company’s first commercial photoresist which substitutes traditional fluorine-containing PAGs with a non-fluorine alternative.

“This recognition is a testament to DuPont’s technical leadership in advancing more sustainable lithography materials,” said Ben Xie, Global R&D Director, Lithography Technologies at DuPont Electronics & Industrial. “Our team’s pioneering work in non-fluorine PAGs demonstrates our commitment to providing innovative solutions that meet the industry’s high performance standards and also help semiconductor fabricators advance their sustainability efforts by reducing substances of concern.”
The Jeffrey Byers Best Poster Award in Patterning Materials and Processes was named in memory of Dr. Jeffrey A. Byers, an award-winning researcher in sustainable chemistry. It recognizes the most outstanding poster presented at the previous year’s conference, selected on criteria including technical originality, relevance, quality of presentation, and quality of the associated paper.

Throughout the 2025 SPIE Advanced Lithography + Patterning conference, Feb. 24–28 in San Jose, California, DuPont is showcasing its latest advancements in sustainable lithography solutions as well as innovation in materials for EUV lithography. For more information about DuPont’s solutions for lithography, please visit the DuPont Electronics & Industrial website.

Caption: DuPont is awarded the Jeffrey Byers Best Poster Award in Patterning Materials and Processes at the 2025 SPIE Advanced Lithography + Patterning conference on Monday, Feb. 24, 2025. Pictured from left: Douglas Guerrero, Conference Chair for Patterning Materials and Processes, and Paul LaBeaume, Technical Manager, DuPont Electronics & Industrial and co-author of the awarded paper.

About DuPont
DuPont (NYSE: DD) is a global innovation leader with technology-based materials and solutions that help transform industries and everyday life. Our employees apply diverse science and expertise to help customers advance their best ideas and deliver essential innovations in key markets including electronics, transportation, construction, water, healthcare and worker safety. More information can be found at www.dupont.com. Investors can access information included on the Investor Relations section of the website at investors.dupont.com.

Registration

Online registration is now closed!

Please register in person at the front desk or contact staff below for virtual access.

PLEASE NOTE

  • In addition, you must be a SEMI Standards Program Member to participate in the meetings.
  • Membership is FREE!
  • Fill out the Application Form to be a Standards Member.
United States standards-500w.jpg Technical

SEMI HQ
673 South Milpitas Blvd
Milpitas, CA 95035
United States

- Standards

Join us for the SEMI Standards Meetings

IN-PERSON + VIRTUAL!

 

SEMICON West moves to October in AZ this year, remember to save the dates for the new Summer meetings schedule! 

 

SEMI Standards will host 11 committees + over 40 task forces engaged in various standardization activities, including:

  • Environmental, Health, and Safety (EH&S)
  • Facilities
  • Gases
  • Information & Control
  • Liquid Chemicals
  • Metrics
  • MEMS/NEMS
  • Physical Interfaces & Carriers
  • Silicon Wafer
  • 3D Packaging & Integration
  • Traceability

Note | Some Technical Committees + Task Forces may meet virtually outside of this Meeting set.

FULL SCHEDULE | (PDF) or (Excel)

All meetings are in Pacific Time.
Subject to change, please check back frequently.
Last updated: June 3, 2025

Off Add to Calendar 2025-06-02 00:00:00 2025-06-05 00:00:00 North America Standards Summer Meetings Join us for the SEMI Standards MeetingsIN-PERSON + VIRTUAL! SEMICON West moves to October in AZ this year, remember to save the dates for the new Summer meetings schedule!  SEMI Standards will host 11 committees + over 40 task forces engaged in various standardization activities, including:Environmental, Health, and Safety (EH&S)FacilitiesGasesInformation & ControlLiquid ChemicalsMetricsMEMS/NEMSPhysical Interfaces & CarriersSilicon Wafer3D Packaging & IntegrationTraceabilityNote | Some Technical Committees + Task Forces may meet virtually outside of this Meeting set.FULL SCHEDULE | (PDF) or (Excel)All meetings are in Pacific Time.Subject to change, please check back frequently.Last updated: June 3, 2025 SEMI HQ 673 South Milpitas Blvd Milpitas, CA 95035 United States SEMI.org [email protected] America/Los_Angeles public

Next Meetings

Save the Date!

Standards Meetings in conjunction with SEMICON West 2025
October 6-9, 2025 @ Phoenix Convention Center, Phoenix, Arizona

Contact

Kevin Nguyen
Manager, International Standards Operations
(EH&S, Silicon Wafer)

Laura Nguyen
Sr. Coordinator, International Standards
(Facilities, Gases, Liquid Chemicals, MEMS/NEMS, Physical Interfaces & Carriers, 3D Packaging & Integration)

Michelle Sun
Coordinator, International Standards
(Information & Control, Metrics, Traceability)

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PDF Solutions, Inc. (Nasdaq: PDFS) today announced it has entered into a definitive agreement to acquire secureWISE, LLC, the most widely used secure, remote connectivity solution in the semiconductor manufacturing equipment industry, from Telit IOT Solutions Inc.

The secureWISE global network enables equipment manufacturers to bring up new equipment faster, provide operational support, and maximize the value derived from the equipment customers’ investments. It is currently used by over 100 equipment vendors to connect and control their tools located in over 190 semiconductor fabs and to manage the exchange of multiple petabytes of data annually.

PDF Solutions empowers semiconductor companies to maximize their manufacturing effectiveness. The PDF Solutions platform breaks down data silos to enable engineers to uncover critical relationships across manufacturing and design, resulting in better process control, product screening, and equipment operations.

As the semiconductor industry becomes more globally distributed, and as advanced devices rely on the integration of multiple chiplets into a single package, more collaboration and integration are required across the semiconductor industry. This collaboration needs to be executed securely with each participant controlling access to its intellectual property.

Today, secureWISE customers have built applications on top of the secureWISE network to deliver equipment analytics. PDF Solutions expects the acquisition to accelerate equipment makers’ ability to derive value from equipment data by enabling them to leverage PDF Solutions’ Exensio analytics software.

Beyond enabling equipment vendors to build equipment analytics at foundries, the acquisition of secureWISE is expected to dramatically expand the capability of PDF Solutions’ secure DEX OSAT network by allowing equipment makers, fab operators, and fabless companies to collaborate to optimize chip manufacturing and test.

“This acquisition extends PDF Solutions analytics for equipment makers and fabless to the factory manufacturing level, which allows them to generate value from AI,” said Dr. John Kibarian, President, CEO and co-founder of PDF Solutions. He continued, “We provide the leading analytics platform for semiconductor manufacturing, and with secureWISE, the PDF Solutions platform will also be able to help members of the semiconductor ecosystem collaborate through a secure, direct connection and control the manufacturing process down to the production equipment.”

Mike Dempsey, Vice President of secureWISE LLC, said, “We believe PDF Solutions is the ideal partner to accelerate secureWISE’s evolution, ensuring we remain at the forefront of industry trends and ahead of our customers’ needs. This acquisition will strengthen our ability to anticipate, pioneer, and integrate a far richer suite of security, collaboration, and analytics capabilities into our platform. As data exchange and collaboration become increasingly relevant to the semiconductor industry, this acquisition will better position secureWISE to deliver maximum long-term benefit to its customers who have invested in our platform.”

Under the terms of the definitive agreement, PDF Solutions will pay a cash amount of $130.0 million, subject to customary purchase price adjustments. The purchase price will be funded by a combination of cash on hand and $70M of new bank debt. The acquisition is subject to certain closing conditions and is expected to close in the first calendar quarter of 2025.

TD Securities (USA) LLC acted as financial advisor and Latham & Watkins LLP acted as legal advisor to PDF Solutions.

Updated Financial Outlook
John Kibarian, CEO and President of PDF Solutions, said, “Assuming the transaction closes in the first quarter of 2025, and with purchase accounting adjustments, we would expect to achieve a full year 2025 revenue growth rate between 21% to 23% on year-over-year basis. Given that, we also expect to achieve 2025 gross margin in line with our corporate gross margin, our target model 20% operating margin, and for EPS to be slightly accretive.”

Conference Call
PDF Solutions will discuss this announcement on a live conference call beginning at 3:00 p.m. Pacific Time / 6:00 p.m. Eastern Time today. To participate in the live call, analysts and investors should pre-register at: https://register.vevent.com/register/BI9abfc7eadb2245c5ba00c59922fe6c87.

Registrants will receive dial-in information and a unique passcode to access the call. We encourage participants to dial into the call ten minutes ahead of the scheduled time. The teleconference will also be webcast simultaneously on the Company’s website at https://ir.pdf.com/webcasts. A replay of the conference call webcast will be available after the call on the Company’s investor relations website. A copy of this press release will also be available on PDF Solutions’ website at News & PR Archives - PDF Solutions following the date of this release.

Forward-Looking Statements
The statements in this press release regarding the expected future financial results, benefits and synergies of the secureWISE acquisition on PDF Solution’s product offerings, and the expected closing of the secureWISE acquisition are forward looking and are subject to future events and circumstances. Actual results could differ materially from those expressed in these forward-looking statements. Risks and uncertainties that could cause results to differ materially include risks associated with: uncertainties with respect to the timing of the closing of the proposed transaction, including when and whether all conditions to closing will be satisfied; the failure of expected benefits from the proposed transaction to be realized or to be realized within the expected time period; uncertainties with respect to the future performance of secureWISE following an acquisition by PDF Solutions; PDF Solution’s ability to integrate secureWISE and its product and service offerings, the cost and schedule of new product development; continued adoption of the PDF Solution’s and secureWISE’s solutions by new and existing customers; the fact that operating costs and business disruption may be greater than expected following the public announcement or consummation of the proposed transaction; potential adverse reactions or changes to business or employee relationships, including those resulting from the public announcement or consummation of the proposed transaction; the incurrence of significant transaction costs related to the proposed transaction; unknown or understated liabilities of secureWISE; and other risks set forth in PDF Solutions’ periodic public filings with the Securities and Exchange Commission, including, without limitation, its Annual Reports on Form 10-K, most recently filed for the year ended December 31, 2023, Quarterly Reports on Form 10-Q, and Current Reports on Form 8-K and amendments to such reports. The forward-looking statements made herein are made as of the date hereof, and PDF Solutions does not assume any obligation to update such statements nor the reasons why actual results could differ materially from those projected in such statements.

About PDF Solutions
PDF Solutions (Nasdaq: PDFS) provides comprehensive data solutions designed to empower organizations across the semiconductor and electronics industry ecosystem to improve the yield and quality of their products and operational efficiency for increased profitability. The Company’s products and services are used by Fortune 500 companies across the semiconductor and electronics ecosystem to achieve smart manufacturing goals by connecting and controlling equipment, collecting data generated during manufacturing and test operations, and performing advanced analytics and machine learning to enable profitable, high-volume manufacturing.

Founded in 1991, PDF Solutions is headquartered in Santa Clara, California, with operations across North America, Europe, and Asia. The Company (directly or through one or more subsidiaries) is an active member of SEMI, INEMI, TPCA, IPC, the OPC Foundation, and DMDII. For the latest news and information about PDF Solutions or to find office locations, visit: https://www.pdf.com.

Headquartered in Santa Clara, Calif., PDF Solutions also operates worldwide in Canada, China, France, Germany, Italy, Japan, Korea, Sweden, and Taiwan. For the Company’s latest news and information, visit https://www.pdf.com.

About secureWISE
The secureWISE platform enables secure and controlled remote connectivity, collaboration and service enablement in the semiconductor industry. The secureWISE suite of products and services is designed to give OEM suppliers role-based, real-time and on-demand access to their equipment that is installed at the production facilities of their customers, to deliver valuable operational insights, mission-critical performance, substantial time and cost savings, and new service revenue opportunities. As the only remote access tool built around the ISMI guidelines, secureWISE is installed in over 90% of the world’s 300mm semiconductor fabs and also numerous solar and chemical plants across the globe. https://www.telit.com/iot-platforms-overview/telit-securewise/

PDF Solutions and the PDF Solutions logo are trademarks or registered trademarks of PDF Solutions, Inc. and/or its subsidiaries in the United States and other countries. Other trademarks used herein are the property of their owners.

–– Breker Verification Systems today confirmed its RISC-V SystemVIP library components and test suite synthesis product portfolio is deployed in more than 15 commercial RISC-V semiconductor design projects, while its RISC-V products are used in several large-scale academic projects.

Large, complex application processor projects that range from data center, automotive and AI accelerator to consumer device applications rely on Breker’s RISC-V CoreAssurance™, SoCReady™ and Cache Coherency SystemVIPs across the RISC-V core and SoC verification stack. Breker executives are heading working groups in the evolving RISC-V International certification program.

“Breker Verification Systems’ products provide significant advantages on top of standard verification solutions, especially for the most challenging verification problems,” affirms Ty Garibay, President of Condor Computing. “Applying these approaches to RISC-V processor design was a natural extension, and leveraging this technology in the development of our high-performance CPU IP is already paying dividends.”

Breker’s test suite synthesis solution and SystemVIP library allow for enhanced verification coverage while significantly reducing test development time for complex scenarios. The verification of processor cores that leverage the RISC-V Open Instruction Set Architecture (ISA) requires testing specialized, unique scenarios. Breker’s RISC-V synthesized SystemVIPs make use of AI Planning Algorithms, cross-test multiplication and concurrent, multi-threaded scheduling provide rigorous testing from randomized instructions to unique coherency, paging and other complex system integration validation.

“MIPS RISC-V cores represent the state-of-the-art in advanced application processor solutions,” notes Steve Mullinnix, Senior Director, Design Verification, MIPS. “Working with Breker, we are able to verify complex, compounded scenarios unique to these devices quickly and efficiently.”

Breker is cooperating with academic institutions including Harvey Mudd College in Claremont, Calif., and Oklahoma University, developers of the Wally open-source processor core, and ETH Zurich in Zurich, Switzerland, that produced the Ariane processor core. Breker has provided application-level tests for these institutions while collaborating on next-generation verification environments.

“Breker is at the forefront of RISC-V verification,” comments David Harris, the Harvey S. Mudd Professor of Engineering Design. “It’s first-rate SystemVIP synthesis platform is a breakthrough verification tool and an effective problem-solver for our RISC-V programs.”

Additionally, executives from Breker are leading two working groups within RISC-V International’s Certification Steering Committee to develop a program to provide a quality stamp based on extensive, independent architectural testing.

“The rate of adoption of our tools is remarkable and supports our belief that test suite synthesis is a must-have tool for every RISC-V design project,” says David Kelf, Breker’s Chief Executive Officer. “Our efforts to build more features will continue as will our willingness to partner with leading project groups and industry organizations helping to cement the RISC-V ISA place across the semiconductor industry.”

Breker’s RISC-V CoreAssurance, SoCReady and SystemVIP
Breker unveiled RISC-V CoreAssurance, SoCReady and SystemVIP in June 2024, along with a complete range of tests for the entire RISC-V core verification stack. Starting with randomized instruction generation and microarchitectural scenarios, SystemVIP includes unique tests that check all integrity levels ensuring the smooth application of the core into an SoC, regardless of architecture, and the evaluation of possible performance and power bottlenecks and functional issues.

The SystemVIP can be extended for custom RISC-V instructions to be fully incorporated into the complete test suite crossed with other tests. It is self-checking and incorporates debug and coverage analysis solutions and can be ported across simulation, emulation, prototyping, post-silicon and virtual platform environments.

Breker’s SystemVIP is used for a variety of complex RISC-V core designs, including system coherency in a multicore SoC integrity test sets, high-coverage core test, power domain switching, hardware security access rules, and automated packet generation.

Breker at DVCon U.S. February 24-27 in San Jose
Breker will exhibit and demonstrate its RISC-V CoreAssurance and SoCReady SystemVIP and Trek Test Suite Synthesis solutions at DVCon U.S. February 24-26 at the DoubleTree Hotel in San Jose, Calif.

It will present a workshop titled “Complex Verification Example: RISC-V MMU Verification of Virtualization and Hypervisor Operation for CPU and SOC platforms” Monday, February 24, from 3:30 p.m. until 5 p.m. in the Oak Room.

To arrange a demonstration or private meeting, send email to [email protected].

About Breker Verification Systems
Breker Verification Systems solves complex semiconductor challenges across the functional verification process from streamlining UVM-based testbench composition to execution for IP block verification, significantly enhancing SoC integration and firmware verification with automated solutions that provide test content portability and reuse. Breker solutions easily layer into existing environments and operate across simulation, emulation and prototyping, and post-silicon execution platforms. Its Trek family is production-proven at leading semiconductor companies worldwide and enables design managers and verification engineers to realize measurable productivity gains, speed coverage closure and easy verification knowledge reuse. As a leader in the development of the Accellera Portable Stimulus Standard (PSS), privately held Breker has a reputation for dramatically reducing verification schedules in advanced development environments. Case studies that feature Altera (now Intel), Analog Devices, Broadcom, IBM and other companies leveraging Breker’s solutions are available on the Breker website.

Engage with Breker at:
Website: www.brekersystems.com
Twitter: @BrekerSystems
LinkedIn: https://www.linkedin.com/company/breker-verification-systems/
Facebook: https://www.facebook.com/BrekerSystems/

Expanded Collaboration Aims to Bridge Talent Gap, Drive Innovation and Growth

 

SUNNYVALE, Calif., February 18, 2025 – Synopsys, Inc. (Nasdaq: SNPS) and the SEMI Foundation today announced the signing of a Memorandum of Understanding (MoU) at Synopsys’ corporate headquarters in Sunnyvale, Calif. to advance workforce development within the semiconductor chip design sector. It’s predicted1 the global industry will need to fill over one million additional semiconductor jobs by 2030, equivalent to 100,000 jobs annually highlighting the crucial need for workforce development programs. Collaborations like this one are essential to bridging the chip design talent gap and shaping the innovators of tomorrow. Together, Synopsys and SEMI Foundation will engage in opportunities to collaborate on education and training programs with academic institutions and industry experts to enhance chip design workforce development both in the United States and internationally. The two organizations will also jointly develop specialized education and training programs designed for K-12 students, academic institutions, and military veterans, providing support and resources across the talent development spectrum.

 (L-R) SEMI Vice President of Global Workforce Development & Initiatives Shari Liss, Synopsys Director of Workforce Development and SEMI Foundation Board of Trustees Member Katy Crist and Synopsys Academic & Research Alliance (SARA) Executive Director Dr. Patrick Haspel signed the Memorandum of Understanding (MoU) on Thursday, Jan 16, 2025 at Synopsys Corporate Headquarters in Sunnyvale, Calif.

 

As a global silicon to systems design leader, Synopsys, through its SARA (Synopsys Academic & Research Alliances) program, has been an active participant in workforce development activities worldwide. SARA empowers the workforce of tomorrow by enabling access to cutting-edge technologies, developing shared programs, and partnering on advanced collaborations to support universities in building a diverse semiconductor workforce ready to invent the technology of the future. This collaboration with the SEMI Foundation will strengthen the pipeline of skilled talent to benefit the global semiconductor ecosystem and align with Synopsys’ goal to be the preferred technology partner-of-choice for workforce development. 
 

"I have been honored to be a part of the SEMI Foundation Board of Trustees for over five years. This partnership has been instrumental in driving forward a shared vision for a diverse and skilled workforce in the microelectronics sector. By leveraging our combined expertise and resources, we aim to make a tangible impact on the industry's ability to attract, develop, retain, and advance an inclusive and skilled workforce," said Katy Crist, Director of Workforce Development at Synopsys and SEMI Foundation Board of Trustees Member.  

 

"Workforce development is critical for driving the semiconductor industry’s continued growth and innovation," said Shari Liss, Vice President, Global Workforce Development & Initiatives at SEMI. "We are excited to announce our strategic partnership with Synopsys to advance education and training initiatives that engage, inform, and inspire the next generation of high-tech talent in the United States and abroad. Launching in 2025, our first program will focus on training students, educators, and military service members transitioning to civilian careers to expand participation in the chip design sector. Through this collaboration, the SEMI Foundation will further its mission to foster economic opportunity and equip semiconductor companies with the skilled talent they need to succeed."

 

Additional Resources

1Deloitte, “The Global Semiconductor Talent Shortage” Report, 2022,

https://www2.deloitte.com/us/en/pages/technology/articles/global-semiconductor-talent-shortage.html


About Synopsys
Catalyzing the era of pervasive intelligence, Synopsys, Inc. (Nasdaq: SNPS) delivers trusted and comprehensive silicon to systems design solutions, from electronic design automation to silicon IP and system verification and validation. We partner closely with semiconductor and systems customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.  Learn more at www.synopsys.com.

 

About SEMI Foundation

The SEMI Foundation’s mission is to support economic opportunity for workers and the sustained growth of the microelectronics industry through creating pathways and opportunities for job seekers and tools and systems for semiconductor companies to attract, develop, retain, and advance a diverse and skilled workforce. Visit the SEMI Foundation online to learn more, and follow the SEMI Foundation on LinkedIn.

 

Editorial Contacts:

 

Cara Walker

Synopsys, Inc.

(650) 584-5000

[email protected]

 

Sherrie Gutierrez

SEMI Foundation

(831) 889-3800

[email protected] 

United States Plasma Etching, ALE, & Rie Training

Course Description

The instructor discusses the applied aspects of plasma-assisted etching from a general point of view. The emphasis is on mechanistic understanding. The etching of Si and its compounds is covered in detail. The chemistries used in the etching of other technology-related materials such as Al, organics, and III-V compounds are summarized. Other topics presented include selectivity, loading, ARDE and feature scale problems, damage, and issues associated with high-density plasma RIE. A section on plasma diagnostics and ion-beam based etching methods is briefly discussed. 

Learning Objectives

  • Understand the fundamentals of dry etching and the basic concepts of plasma etching
  • Understand the physics of rf glow discharges (both high and low density)
  • Understand the surface science aspects of RIE including the role of energetic ions
  • Recognize the factors which influence etching anisotropy
  • Define the steps of plasma-surface chemistry leading to etching

Topics Covered

  • Fluorocarbon plasma etching of Si and its compounds
  • Selectivity, loading effects, and aspect ratio dependent etching
  • Uniformity of etching, damage, feature charging issues, and particles
  • Etching of other materials (Al, organics, III-V compounds, etc)
  • Plasma diagnostics such as optical emission spectroscopy with actinometry, mass spectrometry and laser-induced fluorescence
  • Issues in high density plasma etching, wall effects, and ion beam-based methods
  • Deep Reactive Ion Etching (DRIE)
  • Applications and processing etching using ALE
  • End point detection

Who Should Attend

This course is intended for scientists, technicians and others working with or interested in the dry etching of materials in reactive gas glow discharges, particularly those who do not have extensive experience in the field. 

Instructor

Richard Beaudry

PT International, LLC

Instructor Bio
 

Testimonials

See what previous course participants had to say about this training!

  • "Instructors' Process and Hardware knowledge were impressive."
  • "I finally gained a clear understanding of the RIE process."
  • "The instructor had a very good knowledge of the content."
  • "I had a great time to learn fundamental concepts of plasma etching course from SEMI."

Important Information

Note that only the person who registered will receive a certificate of completion. This virtual training will not be recorded. Attendees must be present to access course knowledge. 

Can't find the training link day of? After you register, you will receive the link to the live training via the email address you provided. In addition, you will receive email reminders about 24 hours in an advance and an hour before with the same link. Please keep these emails on hand to access the trainings on time. If you do not see any confirmation emails, please check your junk/spam folders before contacting SEMI U for support.

United States

- SEMI U

This course discusses the fundamentals of plasma assisted phenomena and reactive ion etching (RIE) processes. The emphasis is on the physical and chemical processes that determine the consequences of a reactive gas plasma/surface interaction. The role of energetic ions as encountered in RIE systems is discussed in detail and the factors which influence anisotropy of etching are highlighted. Plasma-assisted etching equipment is described including capacitively coupled, inductively coupled and wave-generated plasmas sources. 

Pricing
  • Members: $845
  • Non-Members: $945

* For group orders with 10+ attendees, and for Students/Veterans discounted pricing, please contact [email protected].

8:00 am - 12:00 pm Off Add to Calendar 2025-07-23 08:00:00 2025-07-24 12:00:00 Plasma Etching, ALE, & RIE (Virtual Training, US & EU) This course discusses the fundamentals of plasma assisted phenomena and reactive ion etching (RIE) processes. The emphasis is on the physical and chemical processes that determine the consequences of a reactive gas plasma/surface interaction. The role of energetic ions as encountered in RIE systems is discussed in detail and the factors which influence anisotropy of etching are highlighted. Plasma-assisted etching equipment is described including capacitively coupled, inductively coupled and wave-generated plasmas sources. PricingMembers: $845Non-Members: $945* For group orders with 10+ attendees, and for Students/Veterans discounted pricing, please contact [email protected]. United States SEMI.org [email protected] America/Los_Angeles public America/Los_Angeles Sold Out
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SEOUL, South Korea ─ February 19, 2025 ─ SEMICON Korea 2025 opens today in Seoul at the COEX spotlighting major trends shaping the semiconductor industry's future, from artificial intelligence (AI) and advanced packaging to sustainable manufacturing. AI and smart devices are transforming industries and everyday life. As this shift accelerates, the key challenge is establishing a competitive technological “edge” to drive the next wave of innovation.

SEMICON koreaAs the region’s leading microelectronics event, SEMICON Korea 2025 is set to welcome a record 70,000 attendees, with 500 companies presenting cutting-edge semiconductor manufacturing technologies. The event will feature 30 technology and business conferences, bringing together over 200 industry visionaries and experts as speakers, and providing key opportunities for networking and fostering new collaborations.

South Korea’s role in the global semiconductor industry continues to grow in importance, driven by its leading chipmakers—Samsung Electronics and SK hynix—and its robust supply chain of equipment, materials, and components. As semiconductor companies worldwide increasingly collaborate to address technology challenges—such as chip scaling, advanced packaging, new materials, generative AI and other data-intensive applications—South Korea’s strategic position becomes even more vital. SEMICON Korea will serve as a central platform for fostering innovation and forging new partnerships across the global semiconductor ecosystem.

SEMICON Korea 2025 Keynotes

  • Jaihyuk Song, Corporate President and CTO, Samsung: “Semiconductor Innovation for a Better Life”
  • Luc Van den hove, President and CEO, imec: “The Versatile Future of Semiconductor Systems”
  • Bill En, Corporate Vice President Engineering, AMD: “Demand for Power Efficiency in the Age of AI”
  • Ravi Subramanian, Chief Product Management Officer, Product Management and Markets Group, Synopsys: “Powering Innovation in the Era of Pervasive Intelligence”
  • Prabu Raja, President, General Manager, Semiconductor Products Group, Applied Materials: “Accelerating Energy-Efficient Semiconductors through Collaborative Innovation”

Key Highlights of SEMICON Korea 2025

Technology Conferences

  • SEMI Technology Symposium (STS): Industry experts will share advanced technology trends in six semiconductor manufacturing processes:
    • CMP & Cleaning
    • Device Technology
    • Etch
    • Lithography
    • Materials
    • Packaging

Technology & Market Conferences: Key discussions will focus on market trends, sustainability, smart manufacturing, semiconductor testing, metrology and inspection, cybersecurity, and compound power semiconductors. Featured sessions include:

Technology Forums

  • Compound Power Semiconductor Summit: Industry visionaries will present the latest trends and forecasts for SiC, GaN, and Diamond WBG power semiconductors.
  • Cybersecurity Forum: Experts will discuss robust, standards-based cybersecurity frameworks to enhance supply chain security.
  • Market Trends Forum: Leading research institutions and consulting firms will analyze global semiconductor market dynamics.
  • Metrology and Inspection Forum: Industry pioneers will unveil breakthrough innovations in metrology and inspection.
  • Smart Manufacturing Forum: Experts will explore digital twin technology, AI-driven manufacturing and multimodal technologies revolutionizing semiconductor production.
  • Test Forum: Speakers will outline cutting-edge testing technologies required for AI-era semiconductor innovation and advanced packaging solutions.

Business Forums

  • Market Trends Forum: Hear the latest insights on the global economic outlook, including the impact of AI on the semiconductor market, from SEMI, semiconductor research institutions, and consulting firms.
  • U.S Investment Forum: A high-profile discussion on industry policies, CHIPS Act updates, and workforce development initiatives, featuring representatives from the U.S. Department of Commerce and state officials from Arizona, Indiana, New York and Texas.
  • Vietnam Investment Forum: A comprehensive overview of investment prospects in Vietnam, a rising hub for semiconductor production, aimed at facilitating collaborations with Korean companies.
  • Netherlands-Korea Semiconductor R&D Cooperation Seminar: A dedicated platform for fostering partnerships between Dutch technology firms, investors, and Korean enterprises.
  • Supplier Search Program: Targeted networking opportunities to support domestic semiconductor materials, components, and equipment companies expanding into global markets. Industry leaders such as Applied Materials, GlobalFoundries, Kioxia, and Micron will participate in approximately 100 business meetings with Korean companies.

Sustainability Programs

  • Sustainability Forum: Industry specialists will examine the impact of PFAS regulations on semiconductor manufacturing.
  • Semiconductor Climate Consortium (SCC) Forum: An introduction to the Semiconductor Climate Consortium, which was established to reduce carbon emissions in the semiconductor industry, and present strategies for achieving net-zero.

In addition, the Supplier Climate Workshop and Energy Collaborative (EC) Workshop will be held to gather insights from semiconductor companies on sustainability strategies.

Workforce Development Initiatives

To address the growing need for talent in the semiconductor industry, SEMICON Korea 2025 will once again host dedicated workforce development programs.

  • Meet the Expert!: Engineers in the semiconductor supply chain will provide career mentoring for STEM students aspiring to enter the semiconductor industry.
  • Women-in-Technology Program: Female leaders in the semiconductor and high-tech sectors will discuss career paths and strategies for fostering inclusion in the workplace.
  • The Path to Becoming a Semiconductor Equipment Specialist: Students will have  an opportunity to reflect on and explore their career paths, while engaging with global experts in the semiconductor field.
  • Technical Tutorials: University students majoring in STEM and junior engineers will receive fundamental training in the six semiconductor manufacturing processes—lithography, deposition, device, plasma and etching, CMP and cleaning, and packaging.

This year, a special partner program will also take place. In collaboration with imec, the world’s largest semiconductor research institute based in Belgium, ITF (imec Technology Forum) Korea will be held on Tuesday, February 18, at the Grand InterContinental Seoul Parnas Hotel—one day before the official opening of SEMICON Korea 2025.

Full details are available on the SEMICON Korea 2025 website.

About SEMI

SEMI® is the global industry association connecting over 3,000 member companies and 1.5 million professionals worldwide across the semiconductor and electronics design and manufacturing supply chain. We accelerate member collaboration on solutions to top industry challenges through Advocacy, Workforce Development, Sustainability, Supply Chain Management and other programs. Our SEMICON® expositions and events, technology communities, standards and market intelligence help advance our members’ business growth and innovations in design, devices, equipment, materials, services and software, enabling smarter, faster, more secure electronics. Visit www.semi.org, contact a regional office, and connect with SEMI on LinkedIn and X to learn more.  

Association Contacts

Jaegwan Shim/SEMI Korea 
Phone: 82+10.3014.9807
Email: [email protected]  

Sherrie Gutierrez/SEMI Corporate 
Phone: +1.831.889.8900
Email: [email protected]

United States Image Training

Course Description

This course offers a solid foundation in semiconductor manufacturing, from basic concepts to advanced techniques, providing practical insights into the tools, processes, and technologies driving the industry.

Learning Objectives

  • Gain a comprehensive understanding of the semiconductor industry and manufacturing process, design, and eco-system of the semiconductor industry
  • Understand the jargon, tools, and materials used in the design and fabrication of an integrated chip
  • Effectively be able to communicate semiconductor manufacturing concepts with other associates and industry professionals

Course Topics

  • Basic Electronics and Microelectronics: Definitions of essential electronic terms/concepts and introduction to microelectronics and integrated circuits
  • Process Nodes: Process nodes and their impact on device performance and cost
  • Device Physics and Transistor Operation: Principles of device operation and transistor functionality
  • Crystal Growth and Wafer Preparation: Crystal growth techniques and wafer preparation processes
  • Advanced Transistor Technologies: FDSOI, FinFETs, and Gate-All-Around (GAA) transistors and their impact on device performance
  • Circuit Design and Layout: Introduction to circuit design, layout techniques, and tools
  • Wafer Processing:
    • Mask Making and Lithography: Techniques and materials used in mask making and various lithographic methods (DUV, Immersion, EUV)
    • Clean Room Environments: Importance of clean rooms in semiconductor manufacturing and contamination issues
    • Etching and Cleaning Processes: Plasma and wet etching processes
    • Ion Implantation and Diffusion Techniques: Methods for doping and controlling diffusion in semiconductor fabrication
    • Deposition Techniques: RTP, CVD, ALD, and ALE techniques and their effect on device performance
    • Electroplating and Sputtering: Metal deposition techniques used in manufacturing
    • Packaging and Testing: Techniques such as wire bonding, die stacking, flip chip, and chiplets packaging, semiconductor testing processes
    • Metrology and Measurement Tools: Tools and methods used for precision measurement in semiconductor manufacturing
  • Semiconductor Industry Ecosystem: The major players in the industry 

Who Should Attend

Anyone interested in understanding semiconductor manufacturing, including new employees, professionals in related industries, and those seeking to broaden their knowledge of the field.

 

Instructor

Denny Frye 

PT International, LLC

Instructor Bio

Testimonials 

See what course participants had to say about this course!

  • "The expansive width of coverage with sufficient depth; well curated, relevant information with live references, and the open style of delivery which made the course more of a sharing than a lecture, was enjoyable."
  • "Denny's knowledge and ability to explain things in simplified ways was awesome!"
  • "I really enjoyed going over the topics and watching the in-depth videos. I also liked how we received the slide information prior to the class."
  • "The range of topics was perfect for an intro course."
  • "Denny did a great job explaining complex topics. The opportunity to ask questions directly was beneficial for the entire class. If a question couldn't be answered immediately, it was addressed by the next break at the latest."
  • "Thank you very much for the informative course. I appreciate the in-depth and in-detail insight in all aspects of Semiconductor Manufacturing!"

Important Information

Note that only the person who registered will receive a certificate of completion. This virtual training will not be recorded. Attendees must be present to access course knowledge. 

Can't find the training link day of? After you register, you will receive the link to the live training via the email address you provided. In addition, you will receive email reminders about 24 hours in an advance and an hour before with the same link. Please keep these emails on hand to access the trainings on time. If you do not see any confirmation emails, please check your junk/spam folders before contacting SEMI U for support.

United States

- SEMI U

Gain a comprehensive understanding of the semiconductor industry and the integrated circuit (IC) manufacturing process. This course is designed for new personnel in the field or anyone seeking a well-rounded knowledge of the tools, materials, and terminology used in semiconductor manufacturing.

Pricing
  • Members: $995
  • Non-Members: $1,095

* For group orders with 10+ attendees, and for Students/Veterans discounted pricing, please contact [email protected].

7:30 am - 3:00 pm Off Add to Calendar 2025-08-26 07:30:00 2025-08-27 15:00:00 Overview of Semiconductor Manufacturing (Virtual Training, Americas) Gain a comprehensive understanding of the semiconductor industry and the integrated circuit (IC) manufacturing process. This course is designed for new personnel in the field or anyone seeking a well-rounded knowledge of the tools, materials, and terminology used in semiconductor manufacturing.PricingMembers: $995Non-Members: $1,095* For group orders with 10+ attendees, and for Students/Veterans discounted pricing, please contact [email protected]. United States SEMI.org [email protected] America/Los_Angeles public America/Los_Angeles Sold Out
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WILMINGTON, Del., Feb. 12, 2025 – DuPont today announced its participation in the 2025 SPIE Advanced Lithography + Patterning conference, taking place Feb. 24–28 in San Jose, California. DuPont will showcase its latest innovations through technical presentations focused on the development of photoresists for extreme ultraviolet (EUV) lithography and advancing sustainability in the design of lithographic materials.

Advanced Solutions for EUV Lithography

DuPont technical experts will present multiple sessions on advancements in materials for EUV lithography on topics such as improving resolution, line edge roughness, and sensitivity through advanced material design. These sessions reflect learnings from the development of the new DuPont™ EON™ EUV photoresist platform. DuPont will also share from its work in materials development for next-generation EUV lithography, using novel photoresist compositions to achieve increased tunability and performance for increasingly complex technology needs.

“EUV lithography is driving the future of semiconductor manufacturing, making incredibly powerful chips possible for high performance computing in applications like 5G connectivity, AI tools, and autonomous vehicles,” said Randal King, Vice President of R&D/Technology, DuPont Electronics & Industrial. “DuPont is committed to advancing innovation in lithography materials to meet the needs of our customers’ exciting and fast-moving technology roadmaps.”

Sustainability-Driven Innovation in Lithographic Materials

Another key highlight of DuPont’s participation will be presentations on developing more sustainable lithography solutions, including the launch of a new offering for KrF lithography, DuPont™ UV™ 26GNF photoresist. DuPont™ UV™ 26GNF is the company’s first commercial photoresist offering which substitutes traditional fluorine-containing photoacid generators (PAGs) with a non-fluorinated alternative. DuPont™ UV™ 26GNF photoresist can help fabricators advance sustainability goals, addressing environmental and regulatory challenges associated with per- and polyfluoroalkyl (PFAS) – substances of concern.

“Our newest addition to the DuPont™ UV™ photoresist family – UV™ 26GNF – represents a significant advancement in delivering sustainability-first innovations for the semiconductor industry,” said Drew Chambers, Global Business Director, Lithography Technologies, DuPont Electronics & Industrial. “We’re finding fabricators increasingly want to incorporate more sustainable lithography materials in their processes, while continuing to meet stringent performance targets, and we’re proud to offer DuPont™ UV™ 26GNF photoresist in support of those goals.”

DuPont experts will also highlight progress in designing and synthesizing non-PFAS PAG solutions, which represent an important step toward developing more sustainable photoresist materials across multiple lithographic technologies.

DuPont’s presentations are part of the Advances in Patterning Materials and Processes Conference. To learn more about DuPont’s offerings for lithography, including the new DuPont™ EON™ photoresists for EUV lithography and DuPont™ UV™ 26GNF KrF photoresist, set up a meeting with a DuPont representative at the conference or visit the DuPont Electronics & Industrial website.

About DuPont
DuPont (NYSE: DD) is a global innovation leader with technology-based materials and solutions that help transform industries and everyday life. Our employees apply diverse science and expertise to help customers advance their best ideas and deliver essential innovations in key markets including electronics, transportation, construction, water, healthcare and worker safety. More information can be found at www.dupont.com. Investors can access information included on the Investor Relations section of the website at investors.dupont.com.