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During the workshop recording, you will hear perspectives from the key stakeholder segments and develop a greater understanding of the overall efforts and progress of the task force.

The workshop is focused on diagnosing and improving SEMI F47, Specification for Semiconductor Processing Equipment Voltage Sag Immunity, widely adopted across the industry, the governing standard that defines voltage sag test levels and requirements for semiconductor tools.

Since the implementation of SEMI F47, the vulnerability of semiconductor manufacturing to single-phase and two-phase voltage sags has improved greatly. However, semiconductor manufacturers continue to experience significant product loss and downtime due to voltage sag events.

Given the ongoing issues with semiconductor plant downtime, a new SEMI Voltage Sag Immunity Task Force was formed to take a fresh look at the issue. The workshop and the task force:

  • Reviews the characteristics of the power quality events that cause downtime.
  • Takes a new look at the sensitivities in the process equipment.
  • Determines any potential adjustments to equipment design, facility design, utility systems, or SEMI Standards to further reduce voltage sag induced losses by the semiconductor industry.

Speaker Biographies

United States

10:00 am - 10:05 am
James Amano
James Amano
Sr. Director, Standards
SEMI

Welcome

10:05 am - 10:25 am
Mark Stephens EPRI
Mark Stephens
Principal Project Manager & Leader, Voltage Sag Immunity Task Force
EPRI

Introduction to the SEMI Voltage Sag Immunity Task Force Effort

A review of the key objectives of the voltage sag task force will be discussed along with the characteristics of the power quality events that are still causing semiconductor plant process downtime. A new look at the sensitivities in the tooling and process equipment is required to determine any potential adjustments to equipment design, facility design, utility systems or standards to further reduce voltage sag induced losses by the semiconductor industry. This important work will help utilities, semiconductor manufacturers, and tool equipment providers to better understand the tolerance and susceptibility of today’s generation of semiconductor processing tools and then to develop effective strategies to improve uptime and lower product losses due not only to single-phase (Type I) and two-phase (Type II) voltage sag events but for three-phase (Type III) events as well.

10:25 am - 10:50 am
Clay Burns
Clayton Burns
Principal Engineer
National Grid

Regional Voltage Sags- Importance of Addressing Three-Phase Voltage Sags in SEMI F47

A review of voltage sags at a National Grid substation which were produced by two lightning-caused three-phase transmission faults at locations fairly remote to the substation.  This will show the regional effect of transmission level faults on voltage.  The voltage sags will be compared to the existing SEMI-F47 standard and the accepted sag definition.  Additionally, a proposed regional voltage sag study will be considered in light of the changing make-up of the future electric system and the influx of large inverter-based resources.

10:50 am - 11:15 am
Ed McGann
Ed McGann
Manager of Engineering
VELCO

Utility Dynamic VAR device fault response, fault mitigation techniques, and power quality measures addressed with protection design

Co- presenters:
Greg Rieder, GlobalFoundries
Josh Burroughs, VELCO
John Fiske, VELCO

VELCO recently conducted a refurbishment of its STATCOM facility as part of a planned controls system upgrade. The system planning need for this facility is to provide area voltage support during transmission system contingencies. The refurbishment project team recognized the benefits of the STATCOM’s ability to provide voltage support during system faults and specified fault performance requirements in the vendor specifications. This presentation will discuss those performance requirements, review pre and post project upgrade system fault record’s and review project lessons learned. The second half of the presentation will cover utility fault mitigation design strategies for substation and transmission line assets as well as protective relaying techniques to improve power quality

11:15 am - 11:50 am
Michael Noth Austin Energy
Michael Noth
Power System Managing Engineer
Austin Energy

Seeing it from both sides: The importance of Power Quality Metering at the utility and inside the Fab Distribution System.

In this presentation we will discuss the importance of having power quality-based metering on both sides of the point of connection and other parts of the distribution system.  Mike will share some examples and stories of how important that can be.

11:50 am - 12:15 pm
Tony Sabin DAn Hunt
Dan Sabin & Tony Hunt
Schneider Electric

Waveform captures of voltage sag events can be automatically analyzed by software to determine their source and impact

This presentation will summarize efforts to categorize events automatically that exceed SEMI F47 limits, and to determine the source of those disturbances. It will also present recent efforts to analyze the impact of voltage sags automatically on electrical loads. This research has resulted in automatic algorithms to determine which voltage sags caused downtime and which ones did not. Combining all of this information together provides a means to more precisely and effectively diagnose, manage, and mitigate voltage sag disturbances.

12:15 pm - 12:25 pm
Christopher "Dale" Moffitt
Electrical Systems Engineering
HP

Power Quality and Monitoring, What Does the Data Tell Us?

Power Quality (PQ) has a long and diverse history dating back to the first power grids in the United States. Impacts and concerns about PQ events have evolved and will continue to evolve as our usage of electricity changes. Recent natural disasters have highlighted the importance of a robust power grid and the changing landscape of power generation presents new PQ challenges. As power consumers, a key element in any PQ strategy is adequate power monitoring. This provides the data that can drive conversation with the utility, discover opportunities in our infrastructure and deliver to our facilities the power quality necessary to sustain our businesses.

12:25 pm - 12:50 pm
Willem Meijs ASML
Willem Meijs & Giel Croonen
Low Voltage expert in electrical engineering on supply distribution system for machines
ASML

SEMI F47 and Power Quality Perspectives and Considerations from a Tool OEM

This presentation will address power quality perspectives and consideration from the point of a lithographic tools manufacture. Effect of different test methods on the sag immunity, test strategy on systems, sub-systems and components. How to divide a large installation up in to testable units and maintaining performance integrity. 3 phase type III test generator topology and the impact on harmonic emission and immunity in relation to voltage sag immunity.

12:50 pm - 1:15 pm
Josh Pankratz Advanced Energy
Josh Pankratz
Director of Engineering
Advanced Energy, Inc.

Power Supply Considerations and Standards for Voltage Sag Ride Through

Disturbances in utility power during semiconductor manufacturing can result in loss of revenue, productivity, production yields, and product quality. Focus on power quality continues to grow as new fabs are built in developing regions, which historically suffer from poor infrastructure. Highly automated fabs have driven a demand for systems that can ride through power glitches without shutting down tools and production lines. This presentation examines how power quality, most typically resulting in voltage sag events, affects semiconductor manufacturing and how industry standards and guidelines for tool immunity to those events affect the design of power supplies.

1:15 pm - 1:40 pm
Steve Lewis, Lam Research, square
Steve Lewis
Lam Research

Round Table Discussion & Q&A

1:40 pm - 1:55 pm
Mark Stephens EPRI
Mark Stephens
Principal Project Manager
EPRI

Next Steps for SEMI Voltage Sag Immunity Task Force

Based on the initial findings from utility and fab power quality data, the task force is poised to move forward to re-evaluate semiconductor tools against voltage sag additional characteristics that are indicative of measured events still causing downtime. Utilities, semiconductor fabs and equipment OEMs will be invited to actively participate in this effort to obtain the required test data.

1:55 pm - 2:00 pm

Closing Remarks & Adjourn

James Amano, SEMI

CAST FlexTech FOA ITL MSIG SCIS SE&A Standards EPRI and SEMI logos

SEMI & EPRI invite you to view a workshop held on April 21, 2021, to hear perspectives from all stakeholders on a persistent and difficult issue in microelectronics manufacturing - uncertain power quality. As work on SEMI Standard F47, the Specification for Semiconductor Processing Voltage Sag Immunity, continues this is the opportunity to hear from distinct parts of the supply chain. 

10:00 am - 2:00 pm Off Add to Calendar 2021-04-21 10:00:00 2021-04-21 14:00:00 Voltage Sag Workshop for Manufacturing Fabs SEMI & EPRI invite you to view a workshop held on April 21, 2021, to hear perspectives from all stakeholders on a persistent and difficult issue in microelectronics manufacturing - uncertain power quality. As work on SEMI Standard F47, the Specification for Semiconductor Processing Voltage Sag Immunity, continues this is the opportunity to hear from distinct parts of the supply chain.  United States SEMI.org [email protected] America/Los_Angeles public America/Los_Angeles
Event format

The Electronic System Design Alliance (ESD Alliance) and the IEEE Council on Electronic Design Automation (CEDA), sponsors of the Phil Kaufman Award for Distinguished Contributions to Electronic System Design, today announced the Phil Kaufman Hall of Fame.
This new award posthumously recognizes individuals who made significant and noteworthy contributions through creativity, entrepreneurism and innovation to the electronic system design industry and were not recipients of the Phil Kaufman Award. Deceased members of the community are not eligible to receive the Phil Kaufman Award, a policy set by the IEEE.

“Many individuals made significant contributions to the semiconductor design industry and helped it grow to where it is today, underpinning the entire global semiconductor and electronic products markets,” says Bob Smith, executive director of the ESD Alliance. “Unfortunately, many of these contributors died but should be recognized for their efforts that were instrumental in shaping our community. The Phil Kaufman Hall of Fame is intended to change that.”

Selections for entry into the inaugural Phil Kaufman Hall of Fame will be determined through a nomination process. Nominations will be reviewed by the ESD Alliance and IEEE CEDA Kaufman Award review committees and approved nominees will be honored for their contributions and achievements in 2021. The nomination period runs from now through Friday, March 26. The link to the nomination form can be found here.

Inductees will be announced in early April. A special Phil Kaufman Hall of Fame page on the ESD Alliance and IEEE CEDA websites will host their photos, citations and tributes.

The long-standing and prestigious Phil Kaufman Award honors individuals who have had a demonstrable impact on the field of electronic system design through technology innovations, education/mentoring, or business or industry leadership. It was established as a tribute to Phil Kaufman, the late industry pioneer who turned innovative technologies into commercial businesses that have benefited electronic designers.

About the IEEE Council on Electronic Design Automation (CEDA)
The IEEE Council on Electronic Design Automation (CEDA) provides a focal point for EDA activities spread across seven IEEE societies (Antennas and Propagation, Circuits and Systems, Computer, Electron Devices, Electronics Packaging, Microwave Theory and Techniques, and Solid-State Circuits). The Council sponsors or co-sponsors over a dozen key EDA conferences including: the Design Automation Conference (DAC), Asia and South Pacific Design Automation Conference (ASP-DAC), International Conference on Computer-Aided Design (ICCAD), Design Automation and Test in Europe (DATE), and events at Embedded Systems Week (ESWEEK). The Council also publishes IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems (TCAD), IEEE Design & Test (D&T), and IEEE Embedded Systems Letters (ESL). The Council boasts a prestigious awards program in order to promote the recognition of leading EDA professionals, which includes the A. Richard Newton, Phil Kaufman, and Ernest S. Kuh Early Career Awards. The Council welcomes new volunteers and local chapters.

Stay in touch with IEEE CEDA:
Website: www.ieee-ceda.org
LinkedIn: https://www.linkedin.com/groups/8343531
Facebook: https://www.facebook.com/ieeeceda/
Twitter: https://twitter.com/IEEECEDA

About the Electronic System Design Alliance
The Electronic System Design (ESD) Alliance, a SEMI Technology Community representing members in the electronic system and semiconductor design ecosystem, is a community that addresses technical, marketing, economic and legislative issues affecting the entire industry. It acts as the central voice to communicate and promote the value of the semiconductor design ecosystem as a vital component of the global electronics industry.

Follow the ESD Alliance:
www.esd-alliance.org
ESD Alliance Bridging the Frontier blog
Twitter: @ESDAlliance
LinkedIn
Facebook

ClassOne Technology, global supplier of high-performance semiconductor electroplating and surface preparation systems, announced the sale of its Solstice® S8 system to South Korean chip manufacturer, Point Engineering Co. The eight-chambered Solstice plating tool will be installed at Point Engineering’s manufacturing facility in Asan City, South Korea. The announcement was made by ClassOne‘s CEO, Byron Exarcos, and PEC‘s CEO, Bum-Mo Ahn.

"Our products call for unique manufacturing approaches,” said Bum-Mo. “In addition to copper, we require plating of palladium cobalt alloy into highly variant features; and this plating is done on a proprietary substrate. We needed a volume-manufacturing platform that has the necessary flexibility without sacrificing reliability. The Solstice S8 covers these needs very well, and it also has a compact footprint to conserve fab space."

Exarcos pointed out that Point Engineering's new Solstice configuration includes a CopperMax™ processing chamber, a ClassOne-proprietary feature specifically designed to optimize copper plating. The chamber enables consistent high-quality, high-rate copper plating, while maximizing uptime and dramatically reducing bottom-line operating costs.

“Point Engineering has gained considerable respect in the industry for its semiconductor parts, which frequently go into probe pins and micro power inductors," said Exarcos. “In today’s semiconductor industry, we’re seeing that new product categories often drive the need for novel approaches in manufacturing. Point Engineering’s groundbreaking new products demand a process-experienced equipment provider and a flexible platform. We’re gratified that Point Engineering has chosen ClassOne and Solstice to partner with them on their next-generation products.”

The Solstice S8 is an 8-chambered system designed and built by ClassOne for high-performance, fully-automated electroplating and surface preparation, specifically for ≤200mm semiconductor wafer processing. The Solstice series also includes the S4, which provides up to four processing chambers, and the LT, with up to three chambers. In addition to electroplating, Solstice systems also provide Plating-Plus™ surface preparation capabilities, including wafer cleaning, high-pressure metal lift-off, resist strip, UBM etch and more. This multi-processing flexibility allows users to streamline wafer production and increase cost efficiencies by reducing the number of different processing tools required in the fab.

United States
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Online, Pacific Time
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Standards

Traceability North America TC Chapter Meeting 

Date: Wednesday, February 24, 2021

Time: 10:00 AM - 12:30 PM Pacific 

via Virtual Meeting 

 

AGENDA 

(subject to change) 

Last updated: February 23, 2021

 

NOTE: 

Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend. 

If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today! 

Questions? Contact your local staff coordinator: Click here 

Off Add to Calendar 2021-02-24 00:00:00 2021-02-24 00:00:00 Traceability North America TC Chapter Meeting Traceability North America TC Chapter Meeting  Date: Wednesday, February 24, 2021 Time: 10:00 AM - 12:30 PM Pacific  via Virtual Meeting    AGENDA  (subject to change)  Last updated: February 23, 2021   NOTE:  Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.  If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!  Questions? Contact your local staff coordinator: Click here  Online, Pacific Time United States SEMI.org [email protected] America/Los_Angeles public
United States Standards%20.jpg

Online, Pacific Time
United States

Standards

Facilities & Gases Joint

North America TC Chapter 

Winter Meeting 2021

Date: Monday, February 22, 2021

Time: 09:00-12:00 Noon Pacific 

via Virtual Meeting

 

AGENDA

(subject to change) 

Last updated: February 19, 2021 

 

NOTE: 

Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend. 

If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today! 

Questions? Contact your local staff coordinator: Click here 

 

9:00 am - 12:00 pm Off Add to Calendar 2021-02-22 09:00:00 2021-02-22 12:00:00 Facilities & Gases Joint North America TC Chapter Winter Meeting 2021 Facilities & Gases Joint North America TC Chapter  Winter Meeting 2021 Date: Monday, February 22, 2021 Time: 09:00-12:00 Noon Pacific  via Virtual Meeting   AGENDA (subject to change)  Last updated: February 19, 2021    NOTE:  Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.  If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!  Questions? Contact your local staff coordinator: Click here    Online, Pacific Time United States SEMI.org [email protected] America/Los_Angeles public

Villach, Austria, 20 Jan 2021 — mechatronic systemtechnik, a leading global supplier of automation equipment for semiconductor wafer handling, today announces the availability of the mWL.cs mechatronic calotte loader. A fully automated stand-alone system for transferring wafers between cassettes and calottes, the mWL.cs provides integrated device manufacturers (IDMs) an opportunity to increase yield and improve process traceability at a high throughput.

Evaporation process tools often utilize spherical carriers and rings to meet uniformity and defectivity targets. However, the design of these tools has made it challenging to introduce automated wafer handling in this step of the manufacturing process. IDMs invariably default to manual wafer loading, which has resulted in yield degradation and an increased risk for misprocessing.

“Automating the wafer loading and unloading system for evaporation type metal deposition is a step that bears much potential,” shared Stefan Detterbeck, Sales Director. “By eliminating human error from the equation, our system enables manufacturers to achieve higher yield and reduce damage to wafers. Enhanced process traceability also supports quality improvement measures to meet the conformity requirements of critical customer industries.”

Key features of the mWL.cs mechatronic calotte loader include:
 Superior handling accuracy and repeatability — hand-off position measurement and auto-teaching capabilities (About mechatronic systemtechnik
mechatronic systemtechnik, headquartered in Villach, Austria, is a leading global supplier of automation equipment for semiconductor wafer handling. Founded in 1998, the company specializes in addressing the industry’s needs for reliable, safe, and fully automated handling of non-standard substrates — including stacked, thin, or warped wafers, and also eWLP, MEMS, TAIKO, bumped, and film frames. Through a modular approach, mechatronic offers its customers cost-efficient handling systems that feature its proprietary technology. These solutions are capable of accommodating a wide range of substrate types and their specific characteristics. Major OEMs and fabrication plants across the globe rely on mechatronic’s unique solutions for some of their most complex wafer handling needs.

For more information, please visit www.mechatronic.at or connect with us on social media:

LinkedIn: www.linkedin.com/company/mechatronic-systemtechnik
YouTube: www.youtube.com/user/MechatronicAustria

mechatronic systemtechnik is a subsidiary of Accuron Industrial Technologies.

Editorial Contact:

Ms Gracine Wee | e: [email protected] | t: +65 6220 4787

Wilmington, Mass., December 16, 2020 – Onto Innovation Inc. (NYSE: ONTO) today announced the first customer acceptance and purchase of its new product, the Aspect® System, at one of the top three memory manufacturers of leading-edge 3D-NAND devices. After successful factory demonstrations, additional Aspect systems are shipping this quarter and in the first quarter of 2021 for evaluations at leading 3D-NAND manufacturers. All of these customers are expected to utilize the high-speed capabilities of the Aspect System to accurately measure extremely deep, high aspect ratio channel holes used to connect over 128 layers and support development and production of customers’ next generation 174 - 192 layer stacked-pair devices. The Company expects additional applications to emerge as this revolutionary infrared critical dimension (IRCD) technology is moved into production environments.

“In 3D-NAND devices the high aspect ratio etch steps are the most critical process steps for performance and yield,” said Kevin Heidrich, senior vice president of product marketing at Onto Innovation. “The highest capital intensity in advanced 3D-NAND is for these critical etchers, with hundreds of etch chambers in a line. Leveraging ultra-bright source technology and a proprietary optical design, the Aspect System will ensure precise control of these critical steps across the fleet of etch tools at high volume production throughput.”

Heidrich continued, “Compared to traditional optical critical dimension (OCD) technology, the IRCD system exploits the unique optical properties of common semiconductor fab materials in the mid-infrared range to enable high fidelity measurements of these high aspect ratio features. We are engaged with customers to improve productivity and yield of 128 pair devices and accelerate the development of next generation 192 pair devices ramping next year.” 

The Aspect System is the industry’s first in-line solution for metrology of high aspect ratio features at high-volume manufacturing speeds. When combined with Onto Innovation’s AI-Diffract Software, the Aspect System provides high fidelity profile measurements enabling critical process control with speeds approximately 10 times faster than X-ray diffraction systems typically used in R&D lab applications. The Aspect System provides unique sensitivity across 3D-NAND manufacturing processes for control of key etch, deposition, and cleaning steps that are critical to next generation 3D-NAND devices.

Typical 3D-NAND wafers contain hundreds of millions of channel holes that are approximately 100nm in diameter and up to 8,000nm deep (80:1 aspect ratio). The Aspect System can measure an array of holes in a single measurement, which allows a greater sampling size across the entire wafer at production throughputs, making the Aspect System a highly beneficial inline metrology solution. The Aspect System works as part of Onto Innovation’s ecosystem of total process control solutions, leveraging the capability of the new AI-Diffract analysis suite.

About Onto Innovation Inc.

Onto Innovation is a leader in process control, combining global scale with an expanded portfolio of leading-edge technologies that include: Un-patterned wafer quality; 3D metrology spanning chip features from nanometer scale transistors to large die interconnects; macro defect inspection of wafers and packages; metal interconnect composition; factory analytics; and lithography for advanced semiconductor packaging. Our breadth of offerings across the entire semiconductor value chain helps our customers solve their most difficult yield, device performance, quality, and reliability issues. Onto Innovation strives to optimize customers’ critical path of progress by making them smarter, faster and more efficient. Headquartered in Wilmington, Massachusetts, Onto Innovation supports customers with a worldwide sales and service organization. Additional information can be found at www.ontoinnovation.com.

 

Safe Harbor Statement

This press release contains forward-looking statements within the meaning of the Private Securities Litigation Reform Act of 1995 (the “Act”) which include: Onto Innovation’s business momentum and future growth; the benefit to customers of Onto Innovation’s products; Onto Innovation’s ability to both deliver products and services consistent with our customers’ demands and expectations and strengthen its market position; as well as other matters that are not purely historical data. Onto Innovation wishes to take advantage of the “safe harbor” provided for by the Act and cautions that actual results may differ materially from those projected as a result of various factors, including risks and uncertainties, many of which are beyond Onto Innovation’s control. Such factors include, but are not limited to, the length, severity and potential business impact of the COVID-19 pandemic, the Company’s ability to leverage its resources to improve its position in its core markets; its ability to weather difficult economic environments; its ability to open new market opportunities and target high-margin markets; the strength/weakness of the back-end and/or front-end semiconductor market segments; fluctuations in customer capital spending and any potential impact as a result of the novel coronavirus situation. Additional information and considerations regarding the risks faced by Onto Innovation are available in Onto Innovation’s Form 10-K report for the year ended December 31, 2019 and other lings with the Securities and Exchange Commission. As the forward-looking statements are based on Onto Innovation’s current expectations, the Company cannot guarantee any related future results, levels of activity, performance or achievements. Onto Innovation does not assume any obligation to update the forward-looking information contained in this press release.

###

Source: Onto Innovation Inc.

Contacts:

Michael Sheaffer, +1 978.253.6273

[email protected]

Product News: Onto Innovation Announces New Inspection Platform for Leading-Edge Process Control and Device Reliability

Onto Innovation’s latest inspection advances have resulted in multiple orders from a top 3 OSAT and a top 3 image sensor manufacturer

 

Wilmington, Mass., January 12, 2021 – Onto Innovation Inc. (NYSE: ONTO) today announced the availability of its new Dragonfly® G3 inspection platform designed to meet the most advanced 2D and 3D sensitivity requirements for advanced packaging and specialty device manufacturers. The first Dragonfly G3 system was delivered to a leading OSAT partner in the fourth quarter of 2020. Orders received from a leading CMOS image sensor (CIS) manufacturer will be shipped in the first quarter of 2021 along with additional evaluation units to logic and memory customers.

 

The Dragonfly G3 platform includes a newly designed optical system with sub-micron resolution, greatly improving 2D defect detection capability in either bright field, dark field or Clearfind® illumination modes. In addition to greater sensitivity, the system scans more than 30% faster than the previous platform. It also utilizes a redesigned 3D metrology system called the LT-200, using a revolutionary dual head design that improves the 3D bump measurement throughput up to 50%. Onto Innovation software further differentiates this solution with Discover® Defect software, which provides a process control suite in real time for an expanding range of complex applications in 5G, high-performance computing, and complex DRAM packages.

Dr. Ju Jin, vice president and general manager of Onto Innovation’s inspection business said, “This new suite of products provides our leading-edge customers with the technology they need to develop and produce high performance products in two rapidly growing markets: high-end specialty devices; and advanced system-in-packages also referred to as chiplets. In these markets we have seen rapid reductions in feature sizes.  These reductions require more sensitive tools providing repeatable and accurate data.

“The growing specialty device market, which includes next-generation power devices, RF filters, amplifiers, CIS and lidar sensors, now requires process control equipment beyond the capabilities of legacy systems in order to detect smaller and new defect types,” Jin continued. “The capabilities of the new Dragonfly platform were an important factor in our recent win at a second high-end CIS manufacturer. The incumbent tools were unable to see these low contrast defects of interest on critical layers. Our new optical resolution demonstrated that it was able to detect these defects repeatably at high volume manufacturing speed to improve yield.”

Kevin Heidrich, senior vice president of marketing added, “The advanced packaging market is exploding with a wide variety of packaging technologies and architectures. Manufacturers now require a single comprehensive system, that can handle 2D and 3D inspection and detect flaws that may cause early life failure. Our sub-micron sensitivity is critical for complex packaging designs requiring redistribution lines (RDL) approaching 1µm design rules. The Dragonfly G3 system is also enhanced by updated Clearfind technology.  With new optics and advanced image processing algorithms, the new version of Clearfind can find a greater range of photoresist and chemical residues at faster speedsClearfind technology continues to expand in the market with more IDMs, foundries and OSATS adopting it to control their fan-out and pad-to-pad bonding processes. This exclusive technology is only available from Onto Innovation and is becoming inevitable for chip reliability, not just yield control.” 

Kevin continued, “In addition to faster and more accurate data acquisitions, customers want to make real time and data-driven decisions. Our release of TrueADC® AI, which includes our proprietary multi-engine deep learning approach with the Dragonfly G3 platform, provides a complete solution for our customers. This solution has improved upon the rate of misclassifications by 30-50% while still outperforming manual classification rates by over 400%. This solution results in higher quality yield, and less scrap, complementing factory environmental missions around the world.”

With its increased scale, Onto Innovation is supporting customers with timely solutions to achieve their leading-edge product development and production. By working collaboratively with our customers, the new Dragonfly G3 inspection platform has already demonstrated it meets current and near future requirements for both 2D inspection and 3D metrology.


About Onto Innovation Inc.

Onto Innovation is a leader in process control, combining global scale with an expanded portfolio of leading-edge technologies that include: Un-patterned wafer quality; 3D metrology spanning chip features from nanometer scale transistors to large die interconnects; macro defect inspection of wafers and packages; elemental layer composition; overlay metrology; factory analytics; and lithography for advanced semiconductor packaging. Our breadth of offerings across the entire semiconductor value chain helps our customers solve their most difficult yield, device performance, quality, and reliability issues. Onto Innovation strives to optimize customers’ critical path of progress by making them smarter, faster and more efficient. Headquartered in Wilmington, Massachusetts, Onto Innovation supports customers with a worldwide sales and service organization. Additional information can be found at www.ontoinnovation.com.

 

Safe Harbor Statement

This press release contains forward-looking statements within the meaning of the Private Securities Litigation Reform Act of 1995 (the “Act”) which include: Onto Innovation’s business momentum and future growth; the benefit to customers of Onto Innovation’s products; Onto Innovation’s ability to both deliver products and services consistent with our customers’ demands and expectations and strengthen its market position; as well as other matters that are not purely historical data. Onto Innovation wishes to take advantage of the “safe harbor” provided for by the Act and cautions that actual results may differ materially from those projected as a result of various factors, including risks and uncertainties, many of which are beyond Onto Innovation’s control. Such factors include, but are not limited to, the length, severity and potential business impact of the COVID-19 pandemic, the Company’s ability to leverage its resources to improve its position in its core markets; its ability to weather difficult economic environments; its ability to open new market opportunities and target high-margin markets; the strength/weakness of the back-end and/or front-end semiconductor market segments; fluctuations in customer capital spending and any potential impact as a result of the novel coronavirus situation. Additional information and considerations regarding the risks faced by Onto Innovation are available in Onto Innovation’s Form 10-K report for the year ended December 31, 2019 and other filings with the Securities and Exchange Commission. As the forward-looking statements are based on Onto Innovation’s current expectations, the Company cannot guarantee any related future results, levels of activity, performance or achievements. Onto Innovation does not assume any obligation to update the forward-looking information contained in this press release.

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Online, Pacific Time
United States

- Standards

Liquid Chemicals

North America TC Chapter 

Winter Meeting 2021

Date: February 17-18, 2021

Time: 10:00-11:30 AM Pacific 

via Virtual Meeting

 

AGENDA

(subject to change) 

Last updated: January 15, 2021 

 

NOTE: 

Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend. 

If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today! 

Questions? Contact your local staff coordinator: Click here 

 

10:00 am - 11:30 am Off Add to Calendar 2021-02-17 10:00:00 2021-02-18 11:30:00 Liquid Chemicals North America TC Chapter Winter Meeting 2021 Liquid Chemicals North America TC Chapter  Winter Meeting 2021 Date: February 17-18, 2021 Time: 10:00-11:30 AM Pacific  via Virtual Meeting   AGENDA Day 1: Wednesday, February 17 Day 2: Thursday, February 18 (subject to change)  Last updated: January 15, 2021    NOTE:  Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.  If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!  Questions? Contact your local staff coordinator: Click here    Online, Pacific Time United States SEMI.org [email protected] America/Los_Angeles public