Course Description
This course offers a solid foundation in semiconductor manufacturing, from basic concepts to advanced techniques, providing practical insights into the tools, processes, and technologies driving the industry.
Learning Objectives
- Gain a comprehensive understanding of the semiconductor industry and manufacturing process, design, and eco-system of the semiconductor industry
- Understand the jargon, tools, and materials used in the design and fabrication of an integrated chip
- Effectively be able to communicate semiconductor manufacturing concepts with other associates and industry professionals
Course Topics
- Basic Electronics and Microelectronics: Definitions of essential electronic terms/concepts and introduction to microelectronics and integrated circuits
- Process Nodes: Process nodes and their impact on device performance and cost
- Device Physics and Transistor Operation: Principles of device operation and transistor functionality
- Crystal Growth and Wafer Preparation: Crystal growth techniques and wafer preparation processes
- Advanced Transistor Technologies: FDSOI, FinFETs, and Gate-All-Around (GAA) transistors and their impact on device performance
- Circuit Design and Layout: Introduction to circuit design, layout techniques, and tools
- Wafer Processing:
- Mask Making and Lithography: Techniques and materials used in mask making and various lithographic methods (DUV, Immersion, EUV)
- Clean Room Environments: Importance of clean rooms in semiconductor manufacturing and contamination issues
- Etching and Cleaning Processes: Plasma and wet etching processes
- Ion Implantation and Diffusion Techniques: Methods for doping and controlling diffusion in semiconductor fabrication
- Deposition Techniques: RTP, CVD, ALD, and ALE techniques and their effect on device performance
- Electroplating and Sputtering: Metal deposition techniques used in manufacturing
- Packaging and Testing: Techniques such as wire bonding, die stacking, flip chip, and chiplets packaging, semiconductor testing processes
- Metrology and Measurement Tools: Tools and methods used for precision measurement in semiconductor manufacturing
- Semiconductor Industry Ecosystem: The major players in the industry
Who Should Attend
Anyone interested in understanding semiconductor manufacturing, including new employees, professionals in related industries, and those seeking to broaden their knowledge of the field.
Instructor
Denny Frye
PT International, LLC
Important Information
Note that only the person who registered will receive a certificate of completion. This virtual training will not be recorded. Attendees must be present to access course knowledge.
Can't find the training link day of? After you register, you will receive the link to the live training via the email address you provided. In addition, you will receive email reminders about 24 hours in an advance and an hour before with the same link. Please keep these emails on hand to access the trainings on time. If you do not see any confirmation emails, please check your junk/spam folders before contacting SEMI U for support.
Singapore
- SEMI UGain a comprehensive understanding of the semiconductor industry and the integrated circuit (IC) manufacturing process. This course is designed for new personnel in the field or anyone seeking a well-rounded knowledge of the tools, materials, and terminology used in semiconductor manufacturing.
Pricing
- Members: $895
- Non-Members: $995
* For group orders with 10+ attendees, and for Students/Veterans discounted pricing, please contact [email protected].
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Course Description
The first part of the course provides a brief overview of semiconductor design and fabrication steps, encompassing IC design techniques, all wafer processing steps, assembly, and packaging. It delves into semiconductor jargon in laypeople terms, and various substrate types such as Si, SiGe, FDSOI, GaAs, SiC, GaN. Additionally, it discusses different types of transistors like pMOS, nMOS, Bipolar, BiCMOS, CMOS, FinFets, and GAA and their evolution and what applications they are used in.
The second part of the course focuses on semiconductor business aspects such as silicon economics, wafer processing costs, semiconductor revenue forecasts, driving forces in the industry, top semiconductor IDMs, market competitors based on market share, OEMs, foundries, top tool vendors, and Fabless companies. Addresses the fastest-growing semiconductor markets based on geographic locations and applications, identifies semiconductor competitors/customers, and discusses major semiconductor markets like Automotive, PC, Mobile, Memory, Wireless, Cell phones, Consumer, Gaming, AI, IoT, Digital TV, Radio, Automotive, MEMS, and Emerging Technology & Impact on Industry.
Learning Objectives
- Understand the fundamental principles and theories semiconductor technology.
- Communicate with other associates and understand wafer processing steps.
- Understand semiconductor business aspects such as silicon economics, wafer processing costs, semiconductor revenue forecasts, driving forces in the industry, top semiconductor IDMs, market competitors based on market share, OEMs, foundries, top tool vendors, and Fabless companies.
- Review the semiconductor eco-system as it relates to design and fabrication of a semiconductor device.
- Gain knowledge of major semiconductor markets like Automotive, PC, Mobile, Memory, Wireless, Cell phones, Consumer, Gaming, AI, IoT, Automotive, MEMS, and Emerging Technology & Impact on Industry.
- Demonstrate effective communication skills through written reports, presentations, and discussions related to semiconductor subjects.
- Collaborate effectively with peers in group projects or discussions regarding semiconductor subjects.
- Analyze and evaluate research literature in semiconductor technology.
- Develop critical thinking and problem-solving skills applicable to semiconductor technology.
Who Should Attend
This course is suitable for anyone seeking a better understanding of the semiconductor industry, market leaders, terminology, business, and the semiconductor ecosystem.
Instructor
Denny Frye
PT International, LLC
Important Information
Note that only the person who registered will receive a certificate of completion. This virtual training will not be recorded. Attendees must be present to access course knowledge.
Can't find the training link day of? After you register, you will receive the link to the live training via the email address you provided. In addition, you will receive email reminders about 24 hours in an advance and an hour before with the same link. Please keep these emails on hand to access the trainings on time. If you do not see any confirmation emails, please check your junk/spam folders before contacting SEMI U for support.
Singapore
SEMI UEmbark on a journey through semiconductor design, manufacturing, and business in this illuminating course. Explore IC design techniques, transistor evolution, and market dynamics. Delve into substrate types and industry economics, discovering the fastest-growing markets and key players shaping the semiconductor landscape.
Pricing
- Members: $745
- Non-Members: $845
* For group orders with 10+ attendees, and for Students/Veterans discounted pricing, please contact [email protected].
Event format
Promote in calendar
Off
Press Release: Kurt J. Lesker Company Announces Groundbreaking Report in an ALD first!
Jefferson Hills, PA – January 8th, 2024 – Kurt J. Lesker Company is proud to announce the successful publication of our latest Atomic Layer Deposition (ALD) technology in JVSTA. This groundbreaking innovation, featuring our patented Precursor Focusing Technique (PFT) and Ultra-High Purity (UHP) process capability, marks a significant milestone in our commitment to advancing next-generation applications.
The new ALD research and development (R&D) represents the first successful demonstration of scandium nitride (ScN) deposition using plasma-enhanced atomic layer deposition (PEALD) on silicon, sapphire, and magnesium oxide substrates under UHP conditions. This innovative process utilizes a new scandium precursor, bis(ethylcyclopentadienyl)scandium-chloride [ClSc(EtCp)2], combined with N2-H2 plasma species, allowing for the deposition of conformal, high-quality ScN films at relatively low temperatures (200−300°C).
"We are thrilled by the prospects of this breakthrough, which underscores our dedication to innovation and excellence in the field of ALD," said Kurt Lesker IV. "This achievement is a testament to the hard work and expertise of our team, and we look forward to leveraging this technology to drive sustainable business growth."
The ScN films produced by this process exhibit high crystalline quality and excellent electrical properties, with high mobility and low resistivity. This makes them suitable for advanced electronic applications, including thermoelectric applications and as an interlayer for epitaxial gallium nitride (GaN) growth. The ability to conformally coat high aspect ratio (HAR) structures is particularly valuable for applications in 3D embedded memory and piezoelectric microelectromechanical systems (piezoMEMS).
The new ALD breakthrough positions Kurt J. Lesker Company as a leader in the ALD market, providing a significant competitive edge. KJLC’s unique UHP technology equips researchers to meet the challenges of next generation 3D nanotechnology.
The new ALD publication, in JVSTA, will be featured on www.lesker.com and stay tuned for more updates as we continue to push the boundaries of ALD technology.
For more information, please visit our website or contact our marketing team.
Pioneering Digital Manufacturing Technology Will Revolutionize Semiconductor Packaging, Display Manufacturing, and Consumer Electronics
Las Vegas, US, January 8, 2025 – SCRONA AG, a leader in microfabrication technologies and the proud holder of a World Record for the smallest printed color picture, has unveiled its revolutionary 128-nozzle electrohydrodynamic (EHD) printhead at CES 2025. This groundbreaking innovation achieves a three-digit nozzle count in digital EHD technology for the first time, marking a major milestone that transforms EHD printing into a mass-production-ready solution.
Launching with a newly developed print engine for seamless integration into production tools by the end of Q1 2025, the 128-nozzle printhead is poised to revolutionize high-precision manufacturing across industries. "The rapid development from 8 to 48 and now to 128 nozzles in such a short time is a testament to the scalability of our MEMS-based EHD Gen-3 platform and execution of our team," said Dr. Patrick Galliker, CTO and Co-Founder of SCRONA.
A Leap in Digital Manufacturing for Key Industries
The SCRONA 128-nozzle printhead brings unprecedented precision, material flexibility, and scalability to industries such as semiconductor advanced packaging, display manufacturing, and consumer electronics. Key benefits and applications include:
1. Semiconductor Manufacturing:
- Revolutionary die-attach applications, dispensing ultra-small adhesive volumes with unparalleled accuracy.
- High-resolution printing of conductive interconnects, vital for advanced AI chiplets and chip manufacturing innovations.
2. Display Technology:
- Unmatched precision in applying quantum dots and color filters for next-generation micro-LED and OLED displays, enabling vibrant, energy-efficient screens.
- High-accuracy printing of adhesives and sealants for display packaging, facilitating thinner and flexible substrates.
3. Versatility Across Sectors:
- Enhanced printing capabilities for consumer electronics, defense, and life sciences, with the ability to print on curved or challenging substrates.
- A versatile solution surpassing the limitations of traditional inkjet and screen printing technologies.
Accelerating Mass Production Ready for EHD Technology
The introduction of the 128-nozzle printhead represents a paradigm shift in production technology, setting a new benchmark for accuracy, speed, and material flexibility. This innovation addresses the long-standing challenges of scaling EHD technology to meet the rigorous demands of high-volume manufacturing. "We are thrilled to unveil our 128-nozzle EHD printhead at CES 2025," said Dr. Patrick Heissler, CEO, SCRONA AG. "This breakthrough paves the way for manufacturers to achieve greater performance, miniaturization, and efficiency in production processes while unlocking new opportunities for innovation in advanced technologies."
About Scrona AG
Scrona is a spin-off from ETH Zurich, one of the top 10 global research universities. Scrona has developed the industry's first multi-nozzle printing platform that can digitally print with sub-micron precision, on any material and at scale. Its patented electrostatic printing technology is transforming manufacturing processes in the field of semiconductors, displays and many other products. It is enabling new designs not feasible for implementation with today’s processes while significantly reducing material, energy and water consumption.
Learn more at www.Scrona.com
From January 1, 2025 Heraeus is combining the high-performance materials expertise of Heraeus Conamic and Heraeus Comvance into a new operating company: Heraeus Covantics. The merged business will be led by a new management team. The legal entities will remain the same.
With the new operating company, Heraeus is further expanding its technology leadership in the manufacturing and processing of high-purity quartz, fused silica, and other high-end materials such as ceramics and innovative composites.
“We are creating a global powerhouse in which we drive innovation and exploit technological synergies,” explain Christoph Fark, Michael Werth and Nikolas Pojezny, Managing Directors of Heraeus Covantics. ”The new structure more closely aligns our combined capabilities and competencies with market requirements and customer needs. This enables our customers to strengthen their competitive advantage.”
Heraeus Covantics manufactures semi-finished products, complex system components and custom-tailored solutions made of quartz glass, fused silica and ceramic materials. They are used in the data transmission and telecommunication industry, the production of specialty optical fibers for industrial and medical applications, semiconductor manufacturing and optical applications among others.
About Heraeus
Heraeus is a family-owned global technology group headquartered in Hanau, Germany. The company’s roots go back to a family pharmacy started in 1660. With its expertise and resources, Heraeus has been making meaningful contributions over generations and is committed to do so in the future. Today, the group bundles diverse activities in four Business Platforms: Metals and Recycling, Healthcare, Semiconductor and Electronics, as well as Industrials. Customers benefit from innovative technologies and solutions based on broad materials knowledge and technological leadership. In the 2023 financial year, the group generated revenues of €25.6 billion (US$27.7 billion*) with approximately 16,400 employees in 40 countries. Heraeus is one of the top 10 family-owned companies in Germany.
About Heraeus Covantics
Heraeus Covantics is a technology leader specializing in the manufacturing and processing of the industry’s highest purity quartz, fused silica and other high-end materials such as ceramics and composites. With locations in Europe, USA and Asia, Heraeus Covantics manufactures semi-finished products, complex system components and custom-tailored solutions made of quartz glass, fused silica and ceramic materials. They are used in the data transmission and telecommunication industry, the production of specialty optical fibers for industrial and medical applications, semiconductor manufacturing and optical applications among others.
Innexis delivers a set of products and capabilities to address demand for shift-left software development in the IC development process
With more demanding software workloads, it is critical to facilitate the development and execution of realistic workloads early in the design phase to shorten overall development time and identify hardware and software defects earlier
Siemens Digital Industries Software announced today the Innexis product suite, a complement to its industry leading Veloce™ hardware-assisted verification and validation system.
Building on the success and rapid adoption of Veloce, Siemens’ Innexis product suite delivers a set of capabilities to address customer demand for shift-left software in the early phases of IC development. These products include a hardware/software development flow from virtual to hybrid to full RTL, an architecture native virtual platform for early high-speed software development and a simulation backplane that enables the development of digital twins in Siemens’ PAVE360™ software for software-defined vehicles and other complex systems.
“The complexity of integrated circuits (IC) is increasing exponentially, designers need more efficient methodologies to meet industry demands. Veloce has seen rapid adoption by industry leaders to help solve this critical bottleneck. The Innexis product suite extends workflow improvements from Veloce to help our customers shift left their IC development and debug cycle,” said Jean-Marie Brunet, vice president and general manager, Hardware-Assisted Verification, Siemens Digital Industries Software. “This enables IC design to begin months before final RTL, all while using a common software workload across the development process.”
Adoption of a shift-left approach for software development and IP verification processes is now mandatory. As chip designs become increasingly complex due to more demanding software workloads, it is critical to enable the development and execution of realistic workloads early in the design phase. A proactive shift-left software approach helps mitigate the risk of identifying issues late in the development cycle.
“The implementation of Innexis in our development process has significantly enhanced software and system validation performance, thereby improving the efficiency of our teams and projects. By enabling heterogeneous component modeling within virtual platforms, it allows us to create realistic high-speed models of System on Chips (SoCs),” said Ari Hautala, Principal System Architect, Nokia Mobile Networks. “Furthermore, the integration of these high-speed virtual platforms with RTL IP on Veloce emulators facilitates superior overall performance while still permitting precise cycle-accurate performance and power analysis on RTL model components. Additionally, Innexis offers exceptional visibility and debuggability for the SoC design, along with the capability to integrate and execute a large number of complex test cases effectively.”
Currently, the Innexis product suite consists of:
Innexis Developer Pro: Innexis Developer Pro software provides a connected development flow from virtual to hybrid to full RTL. This provides a comprehensive environment for accelerating the creation of complex SoC design supporting a wide range of use-cases including seamless hardware-software co-development, co-validation, and pre-silicon cycle accurate analysis and validation. Innexis Developer Pro supports the modelling of complex SoC’s with heterogeneous cores and custom SystemC model components. In addition, it provides the ability to run in both virtual plus RTL hybrid mode for high performance execution, and then at a time of interest switch to full RTL emulation enabling high accuracy analysis of the full SoC when required.
Innexis Architecture Native Acceleration (ANA): Innexis Architecture Native Acceleration software is a cloud- based high-speed virtual platform. By running natively on Arm based servers the software workloads run at much higher speeds than on typical instruction set simulation based virtual platforms. Cloud hosting also provides scalable compute resources and simple browser-based access and tools. Innexis Architecture Native Acceleration can also run on local Arm based servers if preferred. In both cases it enables early software development and testing, and early software defect identification.
Innexis Virtual System Interconnect: Innexis Virtual System Interconnect software facilitates the creation and simulation of comprehensive system level digital twin platforms by seamlessly connecting multi-behavioral virtual and physical subsystems, supporting a variety of communication protocols. Innexis Virtual System Interconnect behavioral models can include Innexis Developer Pro or Innexis Architecture Native Acceleration SoC models, supporting system-level shift-left software development and RTL verification.
To learn more about Siemens’ Innexis product suite and how it addresses the demand for shift-left software development in the integrated circuit development process, visit: www.siemens.com/innexis
About Siemens
Siemens Digital Industries Software helps organizations of all sizes digitally transform using software, hardware and services from the Siemens Xcelerator business platform. Siemens' software and the comprehensive digital twin enable companies to optimize their design, engineering and manufacturing processes to turn today's ideas into the sustainable products of the future. From chips to entire systems, from product to process, across all industries. Siemens Digital Industries Software – Accelerating transformation.
Note: A list of relevant Siemens trademarks can be found here. Other trademarks belong to their respective owners.
Heidelberg Instruments Reports Major Orders for the VPG+ 1400 FPD Volume Pattern Generator from Leading Asian Photomask Manufacturers
Heidelberg, Germany – Heidelberg Instruments has secured two major orders for its VPG+ 1400 FPD Volume Pattern Generator from leading photomask manufacturers in Asia, with a total order value between EUR 9 million and EUR 10 million. Deliveries are scheduled for 2025.
“These significant order intakes mark major milestones for the company, reinforcing our market position and driving further innovation and growth in the display technology sector”, says Alexander Forozan, VP of Global Sales and Business Development.
The VPG+ 1400 is Heidelberg Instruments’ largest system, specifically designed for large-format photomask patterning in the flat panel display (FPD) industry. It supports mask sizes up to 1400 x 1400 mm², making it ideal for various flat panel display generations (G4 to G8). The VPG+ 1400 sets a new standard for high-throughput photomask production, offering the precision and scalability required for large displays. Additionally, it delivers the accuracy needed to produce large-area halftone photomasks for flat panel displays.
Equipped with advanced metrology and alignment features, including Cognex AI-based image recognition, the system ensures precise alignment for multilayered masks. Its linear and nonlinear coordinate corrections further enable precise overlay across tools.
By addressing the diverse exposure needs of customers, Heidelberg Instruments' large-area VPG+ Volume Pattern Generators have proven to be valuable assets in display photomask production lines.
Further information: https://heidelberg-instruments.com/product/vpg-1400-fpd/
Innovative plug-and-play device helps conduct comprehensive equipment compliance tests for automatic carrier delivery in automated fabs
SEMICON Europa, Munich, Germany, November 12, 2024 – Agileo Automation, a leading provider of control and connectivity solutions for global semiconductor equipment manufacturers, today launches the E84 PIO Box at Booth #C2848. This handheld device offers a new lightweight interface for fab staff to test semiconductor equipment software for compliance with SEMI’s E84 and GEM300 standards suite for automatic carrier delivery. It improves the readability, identification, and validation of E84 signal exchanges and functional aspects in cleanrooms or workshops. Integrated with Agileo Automation’s Speech Scenario software that emulates the fab host and validates the SECS/GEM interface with predefined test scenarios, the E84 PIO Box can easily emulate automated carrier delivery systems such as overhead hoist transport or automated guided vehicles. It is able to detect non-compliance and other functional issues thanks to its close alignment with SEMI’s E84 standard. The device features a DB25 connector for easy integration with E84 passive systems such as a load port and connects directly to a PC via a single USB cable for both data and power supply.
“In highly automated fabs, even minor carrier delivery issues can lead to costly downtime. Our E84 PIO Box is designed to rigorously validate nominal and error cases, ensuring seamless operations and fast recovery, benefiting both equipment manufacturers and facilities alike,” explains Marc Engel, CEO of Agileo Automation. “Early adopters have seen significant improvements in overall equipment software quality and now approach each software update with greater confidence, backed by consistent testing results.”
About Agileo Automation
Since its inception in 2010 in Poitiers, France, Agileo Automation has empowered global semiconductor equipment manufacturers to optimize their production machines with control, communication, data acquisition, and testing solutions, enabling their deployment in large-scale fabs worldwide. At the heart of Industry 4.0, Agileo’s A²ECF-SEMI framework provides a robust foundation for developing equipment controller software, leveraging the SEMI SECS/GEM and GEM300 standard suites. As a member of SEMI and the OPC Foundation, Agileo is a key contributor to the development and integration of industry standards such as SEMI standards and OPC Unified Architecture (OPC-UA). For more information, please visit our web site or follow us on LinkedIn.
PDF Solutions, Inc. (Nasdaq: PDFS), a leading provider of comprehensive data solutions for the semiconductor ecosystem, today announces the list of industry leaders speaking at its AI Executive Conference to be held on December 12th, 2024, in San Francisco, CA.
This event features keynotes, presentations, panels and demonstrations offering insights into the power of AI to transform semiconductor design and manufacturing. It includes talks on the state of art and best practices to design, deploy, scale and manage AI/ML solutions across the global semiconductor industry from PDF Solutions executives, other industry thought leaders, solutions experts and partners and users.
Three keynote presentations will look at how AI is currently being deployed in semiconductor manufacturing. Aziz Safa, Vice President and General Manager at Intel, will describe “How Analytics and AI are helping to transform a leading semiconductor company.” Smitha Mathews from ADI will discuss how semiconductor companies can “Get ready for AI” and the lessons learned from a real-life deployment. John Kibarian, PDF Solutions’ CEO will explain how AI is the next evolution of PDF Solutions portfolio.
Confirmed speakers include:
Aziz Safa Intel, VP and GM Analytics and Automation
Smitha Mathews Analog Devices, Senior Manager, Data & Analytics Strategy
Mike Campbell Qualcomm, Senior VP Engineering
Shyam Gooty Microsoft, Senior Director Product Engineering
Jean Philippe Fricker Cerebras, Founder and Chief System Architect
Anton Devilliers TEL, VP RnD
Jayant D’Souza Siemens, Principal Technical Product Manager
Marc Hunter Siemens, Director Product Management
Ken Butler Advantest, Senior Director Applications Marketing
Eli Roth Teradyne, Product Manager
Sunil Gandhi SAP, Sr Director Industry Executive, High Tech
Jason Schnitzer Yurts, CTO
Steve Mahoney Yurts, VP Product Management
Handel Jones International Business Strategies (IBS), founder and CEO.
PDF Solutions AI Executive Conference
Agenda and Registration:
https://go.pdf.com/AI-Conference-2024
Date: December 12, 2024
Following the 70th Annual IEEE International Electron Devices Meeting.
Location: St. Regis Hotel 125 3rd St San Francisco, CA 94103
About PDF Solutions
PDF Solutions (NASDAQ: PDFS) provides comprehensive data solutions designed to empower organizations across the semiconductor ecosystem to improve the yield and quality of their products and operational efficiency for increased profitability. The Company’s products and services are used by Fortune 500 companies across the semiconductor ecosystem to achieve smart manufacturing goals by connecting and controlling equipment, collecting data generated during manufacturing and test operations, and performing advanced analytics and machine learning to enable profitable, high-volume manufacturing.
Founded in 1991, PDF Solutions is headquartered in Santa Clara, California, with operations across North America, Europe, and Asia. The Company (directly or through one or more subsidiaries) is an active member of SEMI, INEMI, TPCA, IPC, the OPC Foundation, and DMDII. For the latest news and information about PDF Solutions or to find office locations, visit https://www.pdf.com/.
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