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Semiconductor industry leader takes the helm to accelerate Beneq’s next phase of growth in atomic layer deposition

Espoo, Finland, 8 May, 2026 – Beneq Oy, the home of atomic layer deposition (ALD), today announced the appointment of Dr. Jason Harrison as Chief Executive Officer. Dr. Harrison succeeds Dr. Tommi Vainio and will lead Beneq into its next phase of growth across semiconductor, optical, and emerging technology markets.

A Strategic Leadership Transition
Beneq enters its next phase of growth from a position of strong commercial momentum. Recent milestones include the qualification of the Beneq Transform® cluster tool for volume production of GaN power and RF filter devices; the introduction of Beneq Transmute™ and Beneq Transform® XP, both engineered for high-volume manufacturing (HVM) of specialty semiconductors; growing adoption of the P-Series for coating critical chamber parts in advanced node devices; and selection of the C2R™ for AR waveguide production in next-generation XR optics.

Against this backdrop, the Board of Directors has determined that the time is right to align executive leadership with the company's evolving strategic priorities. As part of this transition, Dr. Tommi Vainio has decided to step down as CEO to pursue other opportunities. The Board of Directors extends its sincere thanks to Tommi, whose leadership advanced Beneq's technology platform, strengthened its market position in thin film deposition, and guided the company through important stages of its development.

A Proven Leader for a Scaling ALD Business
Dr. Harrison brings extensive global experience across the semiconductor and advanced technology sectors. He holds a Ph.D. in Quantum Chemistry and has built a distinguished career spanning device manufacturing, process development, and equipment solutions, with senior leadership roles at Intel, Lam Research, Veeco, and Applied Materials covering research and development, new product introduction, global account management, and business unit leadership. This combination of technical depth and commercial acumen positions him to scale Beneq’s commercial execution and growth across its global customer base.

Looking Ahead
Under Jason’s leadership, Beneq will accelerate strategic execution across its expanding portfolio, deepen customer engagement across North America, Asia, and Europe, and continue investing in innovative ALD solutions from R&D to HVM to deliver long-term value to customers, employees, and stakeholders.

Dr. Patrick Rabinzohn, Member of the Board of Directors, Beneq, said: “Jason brings the technical depth, the business and account management experience, and the global perspective Beneq needs at this stage of its growth. His academic background and compelling track record across the semiconductor industry positions Jason to build on the momentum the company generated especially.”

Dr. Jason Harrison, Chief Executive Officer, Beneq, added: “Beneq has a strong technology foundation, a talented team, and a growing pipeline of customers in some of the most important markets in semiconductors and optics. I look forward to working with the team to accelerate execution and deliver on the trust our customers place in us.”

About Beneq
Beneq pioneered industrial production of Atomic Layer Deposition (ALD) with the introduction of the first commercial ALD equipment in 1984. Today, Beneq advances ALD adoption and validation with a portfolio that includes the Beneq Transform®, Transform XP, Transform 300, and Transmute™ for specialty semiconductor device fabrication; TFS 200 and TFS 500 for R&D; the P400A, P800, and P1500 batch systems for coating critical semiconductor chamber components and complex part geometries; and spatial ALD platforms such as the C2R™ and roll-to-roll processing equipment. Headquartered in Espoo, Finland, Beneq enables ALD integration from lab to fab for semiconductors, optics, and functional coatings.

Press Contacts
Lie Luo
Head of Marketing
[email protected]

ROSENHEIM, Germany / KUALA LUMPUR, 5 May 2026 — esmo group (esmo), a leading global full-service systems integrator, developer, and supplier of advanced automation solutions for the semiconductor test industry, today announces the debut of its X-change Cart. A dedicated, semi-automated Device Interface Board (DIB) exchange system that enables a complete load board changeover by a single operator in under one minute, the X-change Cart addresses the safety, efficiency, and reliability challenges associated with manual board handling on the semiconductor test floor.

In high-mix semiconductor test environments, load board changeovers are a frequent and operationally significant activity. The reliance on manual handling has long presented challenges around changeover time, operator safety, and the risk of damage to high-value boards.

“Across test floors, we kept seeing the same pattern,” said Josef Weinberger, Head of Business Unit, esmo semicon. “Board changeovers were slow, physically demanding, and too dependent on individual technique. In tight spaces, that's where mistakes happen and time is lost. That observation drove us to build a dedicated solution that makes changeovers fast, repeatable, and manageable by a single operator in under a minute.”

Engineered for the Modern Test Floor

The X-change Cart removes the physical demands and variability of manual board handling from the equation entirely. Through a structured, HMI-controlled process, a single operator can lock, rotate, and transfer a board to the tester within a minute. The ability to carry two boards in a single trip makes that timescale achievable in practice. Thoughtful design details, including a ±180° rotation at the locking mechanism and a ±90° tower swivel, address the real-world constraints of a busy test floor.

Broad compatibility with leading ATE platforms (e.g. Teradyne, Advantest, SPEA and more) facilitates integration into existing multi-vendor environments without reconfiguration, allowing OSATs and IDMs to realise multiple benefits without disruption to their current setup.

For facilities with longer-term automation objectives, an optional configuration allows the interface tower to be mounted onto a customized AGV or AMR, providing a practical upgrade path toward autonomous test floor operations. The modular design further allows additional features to be incorporated as operational requirements evolve.

Weinberger added, “Reliability in production comes down to the details. The gripper head is engineered to perform consistently under real production conditions, with ESD-safe construction ensuring the board is protected at every point of contact. That level of engineering discipline is what makes the difference on a real production floor.”

X-change Cart Key Features

  • Modular DIB exchange system for reliable, error-free board loading and unloading
  • One-person operation — complete board change in under one minute
  • Transports two load boards simultaneously for rapid exchange
  • Full multi-axis rotation: ±180° at locking mechanism | ±180° Y-axis | ±90° Z-axis
  • Compatible with leading ATE platforms — Teradyne, Advantest, SPEA and more
  • Interfaces with test head, prober, DIB-loader, storage rack, and maintenance workbench
  • Tower swivels ±90° for use in narrow corridors and constrained test floor layouts
  • Integrated Human-Machine Interface (HMI), sensor detection, safety hand-brake, and modular battery
  • Optional: fully automated configuration mountable on AGV or AMR

The X-change Cart will be available for live demonstration at the esmo booth throughout SEMICON Southeast Asia 2026. Visit esmo at Booth 2145, Hall 8, Level 2, MITEC Kuala Lumpur from 5–7 May 2026, or contact [email protected] to arrange a meeting or request further information.

Kuala Lumpur, Malaysia, 29 April 2026 – DAS Environmental Experts presents its latest sustainable technologies at SEMICON SEA 2026 (May 5–7, MITEC, Booth 1174). The focus is on closing resource loops in semiconductor manufacturing through integrated waste gas and water treatment.

Integrated environmental technologies for next-generation fabs

DAS Environmental Experts demonstrates how point-of-use waste gas treatment can be seamlessly combined with advanced water recycling to create an integrated solution. This approach reduces both resource consumption and emissions, actively supporting closed-loop concepts for water and materials.

By strategically linking waste gas and wastewater management, the company enables measurable efficiency and sustainability gains directly at the source. DAS Environmental Experts provides a comprehensive range of point-of-use (POU) and end-of-pipe solutions, all tailored to specific customer requirements. This holistic strategy reflects the growing industry imperative for integrated waste and water management in modern semiconductor fabs.

Reliable waste gas treatment: LARCH PLUS DUO

The LARCH PLUS DUO is engineered for maximum operational reliability. This burn-dry system is specifically designed to treat waste gases from MOCVD processes for LEDs, μLEDs and GaN, as well as from EUV processes, directly at the point of use.

It combines two fully independent units running in parallel. Intelligent piping and internal data exchange provide full redundancy and ensure continuous operation, even during maintenance or in the event of a malfunction on one side.

The system operates without fresh water, generates no wastewater, and minimizes environmental impact with zero CO₂ emissions and low NOx emissions.

Resource Recovery & Water Recycling

The company also highlights solutions for material recovery and water reuse. By treating wastewater from grinding and abatement processes, valuable materials like gallium, germanium, and copper are recovered. The modular design allows easy integration into existing fabs and supports retrofit applications, helping operators improve environmental performance while reducing dependency on primary raw materials.

Expert presentation

As part of the conference program, Falk Allmrodt (Key Account Manager) will present "Raising CF₄ Abatement Efficiency Standards in Semiconductor Manufacturing: Beyond Industry Benchmarks" on Thursday, May 7, at 14:55 hrs (Novel 1, Level 1A).

The team welcomes visitors at Booth 1174 to discuss innovative paths to sustainable manufacturing.

About DAS Environmental Experts
DAS Environmental Experts (DAS EE) is a leading international provider of comprehensive environmental technology solutions in the fields of waste gas and water treatment. Founded in Dresden, Germany, in 1991, the company supports industrial enterprises worldwide in safely treating emissions, using resources efficiently and reliably complying with environmental standards.

With 950+ employees and locations in nine countries, the DAS Group combines global expertise with local presence. These solutions, developed and manufactured in Germany, stand for the highest quality and technological innovation.

As one of the top three companies in waste gas treatment, DAS EE offers the semiconductor industry unique, integrated solutions combining waste gas and wastewater treatment.

The company’s portfolio encompasses plants, system solutions and services across the entire process chain—from planning and implementation through to operation. Enhanced by digital solutions, the technologies ensure maximum efficiency and reliable operations.

Its customers include companies from the semiconductor, LED, solar, chemical, pharmaceutical, cosmetics and food industries. The range of services is complemented by Innovation and Support Centers (ISC) in Dresden, Taiwan and the USA.

SEMI Members:  $75

Use your corporate email address during log in to be recognized as a SEMI Member.

Non-Members:  $149

Students:  Free

Contact Basak Ulutas Ozturkler ([email protected]) with a picture of your student ID to receive your discount code.

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This comprehensive course will cover the underlying fundamentals, the interrelationship between materials and processes, and the hardware used in printed electronics.  The masterclass will also explore how printed electronics can be applied currently in example applications including practical aspects of the technology, its highlights and challenges and scalability.  We will also explore emerging new technologies at the cutting edge of FHE, semiconductor packaging, photonics and quantum materials.  Throughout the course there will be opportunities for Q/A and discussions and case studies based on participant's interest.

ABOUT THE SPEAKER

J. Devin MacKenzie, PhD
Dr. Devin MacKenzie is the Washington Research Foundation Professor and an Assoc. Prof. of Materials Science and Engineering and Mechanical Engineering at UW. He is also the Technical Director of the Washington Clean Energy Testbeds, a lab that provides open-access to world-class advanced manufacturing and characterization tools for printed optoelectronics, sensors and energy device research and scale-up. Devin also has 25 years of entrepreneurial experience in sustainable materials and manufacturing of semiconductors, optoelectronics and energy devices. Prior to UW he was CEO and co-founder of printed battery company, Imprint Energy (acquired CCL/Avery), Previously, as the CTO of Add-Vision, Inc. (acquired Sumitomo Chemical), Dr. MacKenzie led R&D for roll-to-roll printed flexible OLEDs at Add-Vision with licensing in Europe and Asia. Prior to Add-Vision, he led printed silicon RF device and product engineering at Kovio, Inc. a Si Valley MIT spin-out (acquired Thin Film Electronics). Dr. MacKenzie also co-founded, Plastic Logic, from Cambridge University as a postdoc and subsequently a visiting scientist in Physics at the Cavendish Laboratory. Prior to that he worked at Bell Labs and NASA. Dr. MacKenzie has authored over 240 publications and patents that have been licensed globally and has been cited over 12,900 times in fields ranging from rare earth-doped nitrides to quantum materials. He holds Ph.D, MS, and undergraduate degrees in Materials Science and Engineering from the University of Florida and the Massachusetts Institute of Technology.

United States

J. Devin MacKenzie
J. Devin MacKenzie, PhD
Washington Research Foundation Professor of Clean Energy, Associate Professor
University of Washington
Gity Samadi
Moderator
Gity Samadi, PhD
Sr. Director, R&D Programs
SEMI
NBMC Smart MedTech FlexTech

Join us for a comprehensive Master Class with Dr. Devin MacKenzie, as he dives into the fundamentals and real-world applications of printed and flexible hybrid electronics (FHE). This session will explore the critical interrelationship between materials, processes, and hardware used in printed electronics, providing a strong foundation for understanding how these systems are designed and manufactured.

Participants will gain insight into current applications of printed electronics, along with practical considerations such as performance, scalability, and manufacturing challenges. The course will also highlight emerging technologies at the forefront of innovation, including advances in FHE, semiconductor packaging, photonics, and quantum materials

10:00 am - 12:00 pm Off Add to Calendar 2026-09-30 10:00:00 2026-09-30 12:00:00 FEMC#31 Advancing Printed Electronics Technology: From Macroelectronics to Quantum Devices Join us for a comprehensive Master Class with Dr. Devin MacKenzie, as he dives into the fundamentals and real-world applications of printed and flexible hybrid electronics (FHE). This session will explore the critical interrelationship between materials, processes, and hardware used in printed electronics, providing a strong foundation for understanding how these systems are designed and manufactured.Participants will gain insight into current applications of printed electronics, along with practical considerations such as performance, scalability, and manufacturing challenges. The course will also highlight emerging technologies at the forefront of innovation, including advances in FHE, semiconductor packaging, photonics, and quantum materials United States SEMI.org [email protected] America/Los_Angeles public America/Los_Angeles REGISTER NOW
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China Japan Taiwan South Korea Belgium France Germany Ireland Italy Russia India Malaysia Singapore Vietnam Inside_Fab Training

Course Description 

This course provides a comprehensive introduction to semiconductor manufacturing, guiding participants through the complete journey from silicon fundamentals to chip fabrication and packaging. Designed for professionals new to the semiconductor industry, the course explains key concepts, terminology, devices, and manufacturing processes used in modern fabs. 

Who Should Attend

Anyone interested in understanding semiconductor manufacturing, including new employees, professionals in related industries, and those seeking to broaden their knowledge of the field.  

Learning Objectives

Upon completion of the course, participants should be able to:

  • Explain fundamental semiconductor concepts, including silicon materials, doping, PN junctions, and basic device behavior. 
  • Identify and correctly use common semiconductor manufacturing terminology.
  • Outline the key steps involved in front-end wafer fabrication, from bare silicon to patterned wafers.
  • Summarize back-end manufacturing processes, including assembly, packaging, and testing.

Topics Included

  • Basic Electronics and Microelectronics
  • Process Nodes
  • Device Physics and Transistor Operation
  • Crystal Growth and Wafer Preparation
  • Advanced Transistor Technologies
  • Circuit Design and Layout
  • Wafer Processing

Important Information

Note that only the person who registered will receive a certificate of completion. This virtual training will not be recorded. Attendees must be present to access the course knowledge. 

Can't find the training link on the day of the training? After you register, you will receive the link to the live training via the email address you provided. In addition, you will receive email reminders 24 hours in advance and 1 hour before, with the same link. Please keep these emails on hand to access the training on time. If you do not see any confirmation emails, please check your junk/spam folders before contacting SEMI U for support.

 

Kalya Shubhakar
Kalya Shubhakar
Senior Lecturer
 

 

Singapore

- SEMI U

Strengthen your knowledge and skills by learning about the journey from silicon fundamentals to chip fabrication and packaging. 

Singapore: 3:00pm - 7:00pm

India: 12:30pm - 4:30pm

London: 8:00am - 12:00pm
 

Pricing                     
  • Members:  $399
  • Non-Members:  $449

* For group orders with 10+ attendees, and for Students/Veterans discounted pricing, please contact [email protected]

3:00 pm - 7:00 pm Off Add to Calendar 2026-08-17 15:00:00 2026-08-20 19:00:00 Inside the Fab: An Introduction to Semiconductor Manufacturing (Asia/EU) Strengthen your knowledge and skills by learning about the journey from silicon fundamentals to chip fabrication and packaging. Singapore: 3:00pm - 7:00pmIndia: 12:30pm - 4:30pmLondon: 8:00am - 12:00pm Pricing                     Members:  $399Non-Members:  $449* For group orders with 10+ attendees, and for Students/Veterans discounted pricing, please contact [email protected] Singapore SEMI.org [email protected] Asia/Singapore public Asia/Singapore Register Now
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Thank you to our sponsors:  

 

 

         Sundt Construction Company & General Contractor | Sundt                                   SCREEN logo

 

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United States

9:00 am - 9:10 am

Welcome and Overview of the Water Management Working Group

9:10 am - 9:25 am
Pascal Osten
Leader, Water Solution Providers Cohort
Pascal Osten
DAS Environmental Expert GmbH

Procedures Guide

9:25 am - 9:35 am
Catherine Marsan-Loyer
Co-Lead, Fab, OSATs Cohort
Catherine Marsan-Loyer
C2MI

Water Savings Guide and Baseline-setting

9:35 am - 9:45 am
Jared Burdik
Co-Lead, Fab, OSAT Cohort
Jared Burdick
Sundt Corp.

Solutions Maturity Scale

9:45 am - 9:55 am

Q&A & WrapUp

EHS SMG Sustainability EMG FOA Standards

Join the SEMI Water Management team and document authors for a webinar discussing their research and findings for the Water Management Strategy Reports.  The reports are guides for water managers for understanding their water balance, baseline, potential savings and a general maturity scale for several solutions to be considered to move up the maturity scale to Zero Liquid Discharge (ZLD). The webinar will provide an overview on how the documents should be used to work with water solutions providers and provide strategies for both new and legacy facilities with end-of-pipe solutions as well as treatments for individual process stage water discharge. 

The webinar will include a discussion of next steps for the continued development of the reports, including how they interact with SEMI Standards and the industry roadmaps.

Reports can be downloaded HERE.

9:00 am - 10:00 am Off Add to Calendar 2026-05-21 09:00:00 2026-05-21 10:00:00 Water Management Strategies Webinar Join the SEMI Water Management team and document authors for a webinar discussing their research and findings for the Water Management Strategy Reports.  The reports are guides for water managers for understanding their water balance, baseline, potential savings and a general maturity scale for several solutions to be considered to move up the maturity scale to Zero Liquid Discharge (ZLD). The webinar will provide an overview on how the documents should be used to work with water solutions providers and provide strategies for both new and legacy facilities with end-of-pipe solutions as well as treatments for individual process stage water discharge. The webinar will include a discussion of next steps for the continued development of the reports, including how they interact with SEMI Standards and the industry roadmaps.Reports can be downloaded HERE. United States SEMI.org [email protected] America/Los_Angeles public America/Los_Angeles Watch the recorded webinar
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High-performance connectivity software delivers structured, high-volume equipment data required by tier-one fabs and advanced packaging facilities ahead of the expected mid-2026 SEMI standards update

POITIERS, March 25, 2026 – Agileo Automation, a leading provider of control and connectivity solutions for global semiconductor manufacturing, today unveils Agil'EDA, a new software solution implementing Equipment Data Acquisition (EDA), a set of SEMI standards also known as Interface A, to enable semiconductor equipment manufacturers to meet the evolving high-performance connectivity requirements of tier-one fabs and advanced packaging facilities.

As semiconductor manufacturing moves towards higher levels of automation and data-driven optimization, fab owners increasingly require EDA alongside traditional SECS/GEM connectivity from semiconductor OEMs for their production tools. Agil'EDA addresses this by separating the control flow from the data flow, ensuring that structured, high-frequency data collection does not interfere with critical equipment operations.
Designed for long-term deployment, Agil'EDA fully supports the widely used EDA Freeze 2 (SOAP/XML) and is architected for the transition to Freeze 3 (gRPC/protocol buffers). This next-generation standard offers significantly higher data throughput and reduced latency. Agileo has already successfully tested and validated its EDA Freeze 3 implementation at SEMI’s North America Standards Fall Meetings in November 2024 in Milpitas, California. SEMI’s EDA Freeze 3 standards suite is expected to be released mid-2026.

Complementing the SECS/GEM standards used to control equipment behavior, Agil’EDA incorporates robust cybersecurity features such as authentication and encrypted communications. The product is available as a stand-alone solution for any existing equipment software using a platform-independent gRPC application programming interface (API) to communicate with it or as a pre-integrated component within Agileo’s A²ECF-SEMI framework. When used with Agil'GEM and Agil'GEM300, it provides a comprehensive connectivity solution that significantly reduces time to market for OEMs.

"With the growing demand for data to improve yield in tier-one fabs, as well as in Advanced Packaging and 3D integration, EDA is no longer optional. It is becoming a mandatory requirement for equipment entering the world's most advanced fabs," explains Marc Engel, chief executive officer of Agileo Automation. "The key value we deliver for OEMs is a fast and easy adoption path for a seamless EDA architecture that delivers compliant production machines to global fab customers. By providing a future-proof architecture ready for Freeze 3, which will significantly increase performance, we address OEMs’ current needs while preparing them for the evolving requirements of semiconductor manufacturing, including AI-driven process control."

- ends -

About Agileo Automation
Agileo Automation is a trusted partner for equipment manufacturers, helping them build smarter, automated, and more connected machines that integrate seamlessly into advanced semiconductor fabs. Founded in 2010 in Poitiers, France, Agileo helps OEMs with control, communication, data acquisition, and testing across their tools through proven software and expert support. Its flagship A²ECF-SEMI framework provides a solid foundation for developing equipment controllers fully aligned with SEMI SECS/GEM, GEM300, and EDA standards. As an active member of SEMI and the OPC Foundation, Agileo Automation contributes directly to shaping the standards that drive manufacturing. For more information, please visit our website or follow us on LinkedIn.

Dresden, Germany, March 24, 2026 – As semiconductor manufacturing continues to expand in China, reliable and efficient environmental technologies are becoming increasingly important for stable and sustainable fab operation. DAS Environmental Experts presents its SALIX wet scrubber product family, a series of high-efficiency point-of-use systems designed for the treatment of waste gases from wet chemical processes in semiconductor manufacturing.

SALIX systems are engineered to ensure high removal efficiency and stable operation in demanding semiconductor production environments. SALIX reliably removes substances such as IPA, ammonia and hydrofluoric acid (HF) from waste gas streams of modern single wafer clean systems – a key contribution to safe and sustainable semiconductor manufacturing. In addition, the technology removes particles, salts and droplets from the processed gas stream. The robust system design supports high uptime and long maintenance intervals, contributing to reliable fab operation.

A key advantage of the SALIX product family is its flexible portfolio. SALIX products are among the smallest and most compact systems on the market and are suitable for both new fabs and retrofit applications in existing fabs. DAS Environmental Experts offers the technology in four different products, providing semiconductor manufacturers with a wide range of configuration options:

• NEW: SALIX – the latest release with improved performance and optimized system operation
• SALIX MINI – a compact two-stage system for space-constrained installations
• NEW: SALIX MICRO [SR1.1]– a highly compact configuration with pre-scrubber section for flexible integration

This structured product portfolio enables customers to select the most suitable system according to process requirements, fab layout and integration needs. The availability of multiple system variants within one technology platform provides semiconductor manufacturers with excellent flexibility in system selection and plant design.

SALIX systems are designed for compatibility with all common process tools and can be adapted to a wide range of wet chemical applications. Their compact design and flexible configuration support efficient integration into modern fabs, helping manufacturers optimize both environmental performance and operational efficiency.

The SALIX product family will be presented during SEMICON China 2026 (March 25–27, Shanghai New International Expo Centre). Interested visitors can learn more about the technology and its applications at the DAS Environmental Experts booth (Booth N2 | 2619).

With more than three decades of experience in environmental technology for the semiconductor industry, DAS Environmental Experts continues to support chip manufacturers worldwide with solutions that combine high process reliability, efficient emission treatment and long-term operational stability.

About the Company
DAS Environmental Experts Group (DAS Group), headquartered in Dresden, Germany, was founded in 1991 and is now a global organization with subsidiaries on three continents and more than 950 employees worldwide. Over the past three decades, DAS Group has become one of the leading technology and equipment providers for waste gas abatement solutions with a focus on semiconductor industry.
In addition, DAS Group develops advanced process and system solutions for industrial water treatment, with extensive expertise in the recycling and reuse of wastewater from the semiconductor industry.
DAS solutions are engineered to meet the stringent purity requirements of semiconductor manufacturing, helping clients comply with global environmental standards.

SEMI Members:  $75

Use your corporate email address during log in to be recognized as a SEMI Member.

Non-Members:  $149

Students:  Free

Contact Basak Ulutas Ozturkler ([email protected]) with a picture of your student ID to receive your discount code.

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Digital Twin is a virtual representation of the structure, context, and behavior of physical systems or a process, with a live link to a physical system serving as a key enabler for predictive and data-driven optimization. In Printed and Flexible Hybrid Electronics (FHE), manufacturing involves multiple interdependent variables—different printing technologies, inks, substrates, and process conditions—each introducing its own complexity. In practice, additional challenges such as equipment drift, batch-to-batch variations, and environmental fluctuations further impact process consistency and yield. Changing a process or transferring it between tools is often difficult, as each setup is highly customized and sensitive to local conditions. To address these challenges, Digital Twin frameworks connect data from design, fabrication, and metrology into continuously learning digital models. They enable early detection of process drifts, virtual experimentation for process development, and data-driven optimization that reduces time, cost, and waste.

This course introduces Digital Twin frameworks for FHE, focusing on Deep Neural Network (DNN)-based predictive models. Participants will learn how to integrate design, fabrication, and metrology data into continuously learning virtual twins that detect process drifts, enable virtual experimentation, and optimize manufacturing. The program covers the full workflow—from image processing and virtual metrology to AI model training, validation, and hyperparameter tuning—using real datasets. A hands-on “Build Your Own Digital Twin” module in Google Colab will provide practical experience in training and refining models for printed electronics applications, equipping attendees with both theoretical insight and applied skills for process optimization and performance prediction.

ABOUT THE SPEAKER

Benyamin Davaji, PhD
Benyamin Davaji is an Assistant Professor in the Department of Electrical and Computer Engineering at Northeastern University, Boston, Massachusetts, where his research centers on integrated microsystems for sensing and computation using mechanical waves. His work spans acoustic and ultrasound transducers, biointerfaces, and microcalorimetry, with a strong emphasis on data-guided nanofabrication, advanced semiconductor device manufacturing, and interdisciplinary approaches to microsystem design and manufacturing. He earned his Ph.D. in Electrical and Computer Engineering from Marquette University in 2016 and completed a postdoctoral appointment at Cornell University.

United States

Davaji Profile picture
Ben Davaji, PhD
Assistant Professor
Northeastern University
Gity Samadi
Moderator
Gity Samadi, PhD
Sr. Director, R&D Programs
SEMI
NBMC Smart MedTech FlexTech

Join us for a Master Class with Benyamin Davaji, PhD, as he introduces Digital Twin frameworks for Printed and Flexible Hybrid Electronics, demonstrating how AI- and DNN-based models integrate design, fabrication, and metrology data along with printing technologies to detect process drift, enable virtual experimentation, and optimize manufacturing performance. Participants gain hands-on experience building continuously learning digital twins to reduce variability, cost, and time to optimization. 

10:00 am - 12:00 pm Off Add to Calendar 2026-06-10 10:00:00 2026-06-10 12:00:00 FEMC#29 Digital Twins for Printed Electronics: How Can AI Learn FHE Printing? Join us for a Master Class with Benyamin Davaji, PhD, as he introduces Digital Twin frameworks for Printed and Flexible Hybrid Electronics, demonstrating how AI- and DNN-based models integrate design, fabrication, and metrology data along with printing technologies to detect process drift, enable virtual experimentation, and optimize manufacturing performance. Participants gain hands-on experience building continuously learning digital twins to reduce variability, cost, and time to optimization.  United States SEMI.org [email protected] America/Los_Angeles public America/Los_Angeles Watch on-demand
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Breker Verification Systems and Moores Lab AI Partner to Create First AI-Driven SoC Verification Solution
• Test Suite Synthesis, agentic AI integration will enable automated specification test generation across range of SoC designs on varied verification platforms
• AI-driven synthesis verification flow prototype to be demonstrated during DVCon U.S. in March
• Joint Breker, Moores Lab AI reception at DVCon U.S. Monday evening followed by AI in verification panel
SAN JOSE, CALIF.––February 26, 2026––Breker Verification Systems and Moores Lab AI today formalized a partnership to create the first AI-driven SoC verification flow integrating Breker’s Trek Test Suite Synthesis with Moores Lab agentic AI technology.

The solution leverages Breker’s vast experience in test generation for complex system design scenarios with the agentic AI VerifAgent™ product from Moores Lab AI. It seamlessly enables automated multicore, multitool, C or transaction level modeling (TLM) test generation for complex SoC scenarios from manually composed specifications.

The flow uses agentic AI to read a specification and generate appropriate scenario models for test synthesis that will produce combined C and SystemVerilog tests that can be run on simulation and emulation platforms targeting high-coverage SoC scenarios.

A prototype of the AI-driven verification flow will be demonstrated in Breker’s Booth (#203) and the Moores Lab AI Booth (#101) during DVCon U.S. March 2 through March 4 at the Hyatt Regency in Santa Clara.

“SoC verification requires highly complex scenario tests that find unpredictable corner cases across advanced, multi-core architectures,” says David Kelf, CEO of Breker Verification Systems. “The Moores Lab AI VerifAgent technology is an excellent complement to our proven Trek synthesis products that leverages our deep verification experience to drive the first AI SoC verification solution.”

“Breker has long been a pioneer in portable stimulus and system-level verification innovation,” notes Shelly Henry, CEO of Moores Lab AI. “Integrating VerifAgent with the Breker solutions creates a powerful synergy that enables engineering teams to verify increasingly complex silicon much faster and with greater confidence. We’re excited to partner with Breker to bring AI-driven transformation to SoC-level verification workflows.”

Combining Test Suite Synthesis with Agentic AI
Test Suite Synthesis generates high coverage tests efficiently for complex SoC-specific scenarios using various verification approaches, while agentic AI can accelerate the understanding of specifications to automatically derive verification plans and scenario models.

Combining the two can drive an automated verification solution that enables test generation for complex SoC scenarios from a manually composed specification that may be applied across a broad range of designs on varied verification platforms.

Availability
The AI-driven verification flow will be developed throughout 2026.

For more information, visit: http://www.breker.com or [email protected], or www.mooreslab.ai or [email protected].

Breker and Moores Lab AI at DVCon U.S.
In addition to the AI-driven verification flow prototype, Breker will exhibit and demonstrate its RISC-V CoreAssurance and SoCReady SystemVIP and Trek Test Suite Synthesis solutions at DVCon U.S. To arrange a demonstration or private meeting, send email to [email protected].

Moores Lab AI will showcase the VerifAgent product and discuss its product roadmap for agentic AI-driven silicon engineering at DVCon U.S. Email [email protected] to schedule an on-site meeting.

On Monday, March 2, Breker and Moores Lab AI will host an evening reception at DVCon in the Hyatt Regency Hotel Cypress room beginning at 6:30 p.m. and followed by a panel discussion on AI-driven SoC verification.

About Breker Verification Systems
Breker Verification Systems solves complex semiconductor challenges across the functional verification process from streamlining UVM-based testbench composition to execution for IP block verification, significantly enhancing SoC integration and firmware verification with automated solutions that provide test content portability and reuse. Breker’s solutions include a SystemVIP library of scenarios for RISC-V and Arm, core and SoC testing, coherency, security and other critical areas. Breker solutions easily layer into existing environments and operate across simulation, emulation, prototyping, and post-silicon execution platforms. Its Trek family is production-proven at leading semiconductor companies worldwide and enables design managers and verification engineers to realize measurable productivity gains, speed coverage closure and easy verification knowledge reuse. As a leader in the development of the Accellera Portable Stimulus Standard (PSS), privately held Breker has a reputation for dramatically reducing verification schedules in advanced development environments. Case studies that feature Analog Devices, Broadcom, IBM and other companies leveraging Breker’s solutions are available on the Breker website.

Engage with Breker at:
Website: https://www.brekersystems.com/
LinkedIn: https://www.linkedin.com/company/breker-verification-systems/
X: @BrekerSystems

About Moores Lab AI
Moores Lab AI is building the next generation of AI tools for semiconductor design and verification. Its agentic AI platform transforms the chip development lifecycle by drastically reducing engineering time and cost, without changing existing flows, tools, or documentation. Moores Lab AI is headquartered in Austin, Texas, and proudly develops its products entirely in the United States.

For more information, visit www.mooreslab.ai or on social media:
LinkedIn: https://www.linkedin.com/company/mooreslabai/
X: @MooresLabAI