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The new Beneq K.K. subsidiary is located in Yokohama and offers sales, marketing and customer support services across the country.

Yokohama, Japan – Beneq has opened a new wholly owned subsidiary in Japan. The local team consists of experienced sales, marketing and engineering professionals from semiconductor and other ALD customer markets. Beneq K.K. will act as the first point of contact for customers in Japan, and provide local field services, training, and other technical support.

In recent years Beneq saw rapidly increasingly demand for its Beneq TransformTM, C-series, and P-series equipment products and services in Japan. Manufacturers of power semiconductors, radio frequency (RF) devices, image sensors, and lithium-ion batteries find a growing number of applications using ALD. Beneq’s products are also used in coating large or complex shapes, such as semiconductor equipment parts and in optical coatings. With the addition of local presence, the company is in a stronger position than ever to serve customer needs and requirements.

“In today’s global business environment, Beneq wishes to be locally present in all key markets including Japan. Beneq understands our Japanese customers’ preference to work with companies that offer local presence and long-term commitment.” says Jukka Nieminen, President of Beneq. “After decades of business experience in Japan through representatives, Beneq is committed to staying in the Japanese market with its 100% owned subsidiary Beneq KK. The office is dedicated to serving Beneq ALD customers locally in Japan.”

About Beneq
Beneq is the home of ALD, offering a wide portfolio of equipment products and development services. Today Beneq leads the market with innovative solutions for advanced R&D (TFS 200, R2), flexible high-volume manufacturing (BENEQ TransformTM), ultra-fast high precision spatial ALD coatings (C2R), roll-to-roll thin film coating of continuous webs (Genesis ALD), and specialized batch production for thicker film stacks (P400, P800). Headquartered in Espoo, Finland Beneq is dedicated to making ALD technology accessible for researchers and enabling technology mega trends through engineered ALD materials solutions.

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ESPOO, Finland, 29th of April 2021 – Picosun Group has appointed Kenneth Hörhammer as Vice President, Sales, and a member of Picosun Group’s Leadership Team as of May 1, 2021.

Kenneth Hörhammer has strong international business experience as well as passion and proven results in sales development and execution. Before joining Picosun, Kenneth Hörhammer has held multiple global business and sales leadership positions at Vaisala both in Finland and abroad in the past 17 years.

“I am excited to join this fantastic team and company. The potential for ALD is almost limitless, and Picosun is spearheading this technology globally. Picosun is a bright example of Finnish high-tech innovativeness, and I am thrilled to become an integral part of this international growth story,” states Kenneth Hörhammer.

“I warmly welcome Kenneth Hörhammer to join our team. The professional background and global experience he brings to our team enable us to significantly strengthen our global sales management, build a stronger sales organization and enforce customer satisfaction,” concludes Jussi Rautee, CEO of Picosun Group.

About Picosun
Picosun provides the most advanced AGILE ALD® (Atomic Layer Deposition) thin film coating solutions for global industries. Picosun’s ALD solutions enable technological leap into the future, with turn-key production processes and unmatched, pioneering expertise in the field – dating back to the invention of the technology itself. Today, PICOSUN® ALD equipment are in daily manufacturing use in numerous leading industries around the world. Picosun is based in Finland, with subsidiaries in Germany, USA, Singapore, Japan, South Korea, China mainland and Taiwan, offices in India and France, and a world-wide sales and support network. Visit www.picosun.com.

Meylan, FRANCE – April 27, 2021 – Tiempo Secure, a unique supplier of Secure Element IP cores and secure software libraries for semiconductor design companies and IC’Alps, expert in design and supply of application-specific integrated circuits (ASIC), today announced a strategic collaboration to widespread silicon implementation of Common Criteria (CC) EAL5+ grade Secure Element cores for IoT applications. Specifically, Tiempo Secure is relying on IC’Alps’ expertise in physical design implementation to develop the hard macro of its Secure Element named TESIC, from netlist to GDSII.

Tiempo Secure’s TESIC includes a secure MCU, secure cryptographic processors and hardware accelerators, security sensors, secure memories and standard interfaces for easy integration and test. While TESIC is already available on multiple silicon processes, including GF 55 and TSMC 40, the hard macro is now implemented by IC’Alps in GF 22 and TSMC 16 – with some other technology nodes considered in the coming months.

“By collaborating with IC’Alps for back-end implementation, Tiempo is now able to provide its customers with a wider choice in terms of technology”, said Serge Maginot, CEO of Tiempo Secure.

Serge Maginot said IoT applications are driving the demand for a new generation of Secure Elements. Indeed, with billions of IoT devices deployed, it is becoming crucial to secure our connected world with innovative and easy to implement solutions that protect sensitive data from external attacks. Tiempo Secure’s TESIC addresses this security concern with a tamper resistant hard macro designed for plug-and-play MCU or SoC integration. TESIC is delivered to the certified fab, with the guarantee chips integrating this macro will pass CC EAL5+ PP0084 and/or EMVCo security certifications.

IC’Alps provides a complete range of semiconductor design services. “We are extremely proud to be partnering with Tiempo Secure”, said Jean-Luc Triouleyre, CEO of IC’Alps. “We see a growing trend toward closer ties between IP developers and Design Houses. One reason is that few companies can afford the large investment in EDA software needed for physical implementation tasks.” The company offers customers the flexibility to choose an entry point into the ASIC/SoC implementation flow according to their needs, turnaround time, expertise and available EDA environment.


About Tiempo Secure
Tiempo Secure is an independent company headquartered in Montbonnot, near Grenoble, France, with customers in Europe, North America and Asia. It specializes in the development of security intellectual property (IP) in microelectronics and secure embedded software for securing connected devices. The company offers a wide range of Secure Elements IP cores (TESIC family) ready to be integrated into "System-on-Chip" (SoC) components, and allowing maximum security (Common Criteria EAL5+ PP0084 certified) of connected components: authentication on networks with integrated SIM, payment (EMVCo), government or private identification, web authentication (FIDO 2), smart car access, communication with autonomous vehicles (V2X HSM). More information can be found at www.tiempo-secure.com

About IC’Alps
IC’Alps is your one-stop-shop ASIC partner. The company provides customers with a complete offering for Application Specific Integrated Circuits (ASIC) and Systems on Chip (SoC) development from circuit specification, mastering design in-house, up to the management of the entire production supply chain. From its technical centre in France (Grenoble area), IC’Alps supports multiple projects in the demanding medical, industrial, transport, IoT, and mil/aero sectors. The highly qualified engineering teams cover every expertise needed and have a long experience of on-demand analog, mixed-signal and digital integrated circuits on technologies from 0.35 µm down to 16 nm. Moreover, IC’Alps has a proven track record of success with sensor/MEMS AFE interfaces, low power consumption designs, high-resolution converters, signal processing, multiprocessors architectures, hardware accelerators, to name a few. Being a partner of major semiconductor foundries, IP providers, as well as packaging and test houses, IC’Alps is well placed to support customers with full life-cycle solutions. We are proud to be Arm® approved Design Partner, a member of X-FAB’s design and supply chain partner network, as well as an Imec IC-link partner. These accreditations assure that we provide expert support and that we have the design expertise to create highly innovative ASIC designs. IC’Alps is ISO 9001, ISO 13485, EN 9100 certified, as well as Common Criteria ready. More information can be found at www.icalps.com

The revolutionary Genesis ALD platform enables next-generation battery manufacturers to scale up quickly.

Beneq, a leading ALD equipment manufacturer, today announces a strategic partnership with E+R to design and commercialize innovative roll-to-roll ALD systems for R&D and volume production. The companies have together developed a revolutionary roll-to-roll ALD system.

The new ALD platform – named Genesis ALD – is targeted at various industrial R2R ALD applications, including:

- Passivation of cathodes and anodes for various types of lithium-ion and solid-state batteries
- Conductive layers and encapsulation for flexible solar cells
- Moisture barriers for flexible electronics

“Bringing Beneq’s unique roll-to-roll ALD technology together with Emerson & Renwick’s deep experience in roll-to-roll vacuum and web handling is good news for the battery industry,” says Sami Sneck, Business Executive at Beneq.

“The partnership allows us to offer state-of-the-art atomic layer deposition technology for enhancing li-ion and other next-generation batteries, where we expect to see strong market demand. There is a lot of potential for this technology in other application areas too, but the market for those end-products is yet to mature,” says Sneck.

“We have worked very well with Beneq and both companies have a good grasp of the potential markets available,” says Andrew Jack, Sales Director at E+R Group. “ E+R offers a wide range of high-end R2R vacuum equipment. This collaboration makes it easier to integrate R2R ALD with other techniques where necessary.”

The partnership is effective immediately. The new Genesis ALD system is available by inquiry for customers globally.

YES (Yield Engineering Systems, Inc.), a leading manufacturer of process equipment for semiconductor advanced packaging, life sciences and “More-than-Moore” applications, today announced it is working with EV Group (https://www.evgroup.com/) and will install a YES EcoCoat™ monolayer coating system at EVG’s NILPhotonics® Competence Center in Austria. This collaboration will provide complete process flow demos for prospective semiconductor, life science and optical coatings (AR/VR) customers. EV Group is a major supplier of capital equipment for these markets.

“At YES, we aim to be the preferred technology solutions provider for material modification and surface enhancement. Achieving that goal means giving our customers, wherever they are located, what they need in order to create leading-edge products. We believe that this collaboration with EVG will help us to showcase our technologies to companies developing breakthrough products in the semiconductor, life science and AR/VR markets, and will also help us to anticipate what those companies will require to support their roadmaps,” said Rezwan Lateef, President of YES.

“Within the framework of the NILPhotonics® Competence Center, EVG partners with customers to develop efficient and differentiating manufacturing solutions for new cutting-edge markets and applications. We welcome YES’s participation in our process flow and look forward to providing a seamless, high performance process flow including YES’s solutions,” said Markus Wimplinger, Corporate Technology Development & IP Director at EVG.

Based at EVG headquarters in St. Florian, Austria, EVG’s NILPhotonics® Competence Center and Heterogeneous Integration Competence Center™ provides world-class process development services and serves as an open access innovation incubator for customers and partners across the microelectronics supply chain. Through its centers of technology excellence, EVG helps customers to accelerate technology development, minimize risk, and develop differentiating technologies and products through the implementation of nanoimprint lithography and heterogeneous integration, respectively, while guaranteeing the highest IP protection standards that are required for working on pre-release products.

About YES
YES (Yield Engineering Systems, Inc.) is a leading manufacturer of high-tech, cost-effective equipment for transforming surfaces, materials and interfaces. The company’s product lines include vacuum cure systems, chemical vapor deposition (CVD) systems, and plasma etching tools used for precise surface modification and thin-film coating of semiconductor wafers, semiconductor and MEMS devices, biosensors and medical substrates. With YES, customers ranging from startups to Fortune 100 companies can create and volume-produce products in a wide range of markets, including Advanced Packaging, MEMS, Augmented Reality/Virtual Reality and Life Sciences. YES is headquartered in Fremont, California, with a growing presence globally. For more information, please visit http://www.yieldengineering.com.

About EV Group (EVG)
EV Group (EVG) is a leading supplier of equipment and process solutions for the manufacture of semiconductors, microelectromechanical systems (MEMS), compound semiconductors, power devices and nanotechnology devices. Key products include wafer bonding, thin-wafer processing, lithography/nanoimprint lithography (NIL) and metrology equipment, as well as photoresist coaters, cleaners and inspection systems. Founded in 1980, EV Group services and supports an elaborate network of global customers and partners all over the world. More information about EVG is available at http://www.EVGroup.com.

Meylan, FRANCE – April 19, 2021 - IC’Alps, fast-growing French expert in the design and supply of application-specific integrated circuits (ASIC), has announced a strategic collaboration with KAL for the commercialization of their ASIC services on the Israeli marketplace. Besides, IC’Alps head office is actively recruiting.

To sustain its growth objective, IC'Alps leverages two assets: the expansion of its sales force and the strengthening of its team.

“With the Covid-19 pandemic, we had to rethink the way we do business, and online meetings have their limits”, said Jean-Luc Triouleyre, IC’Alps’ CEO. “We strongly believe that customer proximity and providing face-to-face (when possible) support and sales is crucial to the success of our international expansion. Having local Sales Representatives sharing the same culture, language and time zone helps ensure that the customers’ requirements are well understood and that the sales process runs efficiently.”

KAL provides Semiconductor services since 2003 in Israel for Fablesses, Chip Makers, Foundries, Design Houses, and EDA vendors. The company joins the growing list of IC’Alps Sales Representatives including:

• Redtree Solutions Ltd
• Running Springs Technology

Each of these companies has the expertise to carry out a premium sales experience with customers in a variety of European, Asian, and North American markets including IoT, Industrial, MedTech, and Automotive which match IC’Alps’ areas of strength.

To sustain the pace of new projects brought in by its sales force, IC’Alps has recently hired experimented engineers in the field of physical implementation and analog design. And IC’Alps is still looking for new talents to continue its fast-growing ambition. The team is very active on design areas such as on demand analog blocks, sensor/MEMS interfacing, hardware accelerators and (multi)processors systems based on ARM or RISC-V cores, always with a low power approach. Talent acquisition and recruiting have always been challenging for a SME. “With an unprecedented period of expansion of the semiconductor industry in the decade ahead, another big focus for IC’Alps this year is to remain competitive in the talent market through strong corporate culture, attractive work environment, and employee benefits package”, added Jean-Luc Triouleyre.

Thanks to these efforts, IC’Alps offers a complete ASIC realization service of taking a custom chip through all the stages of specification, design, test, and manufacturing to the final logistics of delivery to customers. This leaves customers free to focus on the final device and sales where their expertise lies.

For more information, please visit IC’Alps “Sales Representatives” page on https://www.icalps.com/asic-soc-design-supply-custom-chip-services-netw…

To discover why IC’Alps is a great place to work, please visit IC’Alps “Careers” page on https://www.icalps.com/careers-opportunities-alps/ and follow us on LinkedIn

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Flexible Hybrid Master Classes are offered on many topics!  Visit this page for entire list and links to more detailed information on each one.

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Course Outline:

  • Historical perspective & summary of conductive ink classes & filler types
  • Strengths & weaknesses of printed conductor and filler types
  • Understanding the performance criteria of conductive inks
  • Resistance measurement, sheet resistance vs volume resistivity, unit conversion, measuring film thickness and surface roughness
  • Understanding the microstructure of low temperature printable conductors
    • Percolation conductors: silver filled Polymer Thick Film (PTF) inks and isotropic ECAs
    • Sinterable conductors: nanoparticle, metalorganic/particle hybrids, and copper inks
    • Semi-sinterable conductors
  • Test methods for mechanical and environmental reliability 
  • Overview of how printing methods work
    • Methods with a master:  Screen, flexo, gravure, gravure offset
    •  'Digital' or direct write methods for 2D & 3D:   jet based, microdispense, 
  • Conventional, non-equilibrium photonic, chemical, and mechanical methods for curing 
  • Understand the resolution and sheet resistance limits to AM of circuits 
  • Calculating the tradeoffs to selecting the appropriate conductor for achieving a specific sheet resistance
  • Transparent printable conductors and films

About the Instructor

Mike Mastropietro has spent his entire 20+ year career working with printable electronically functional materials and additive manufacturing methods for FHE devices including: formulation, conventional printing, direct write printing, equilibrium and non-equilibrium curing methods, and application development.  Prior to joining ACI, he spent two years at NextFlex managing their printing/direct write programs, and overseeing material selection and integration into devices.  

At 27, he cofounded a nanoparticle ink company, PChem Associates, whose unique low temperature sintering ink technology was acquired a decade later by NovaCentrix. He started his career at Parelec Inc., pioneers of hybrid particle-metalorganic decomposition (MOD) based inks. He has received an IPC Distinguished Committee Service award for his contributions PE/FHE standards and is a Nextflex fellow.   Mike holds a M.S degree in chemical engineering from The Pennsylvania State University where his research on synthesis of surfactant stabilized nanoparticles was awarded a 2000 Materials Research Institute Xerox Research Award.

United States

Mike Mastropietro
Michael Mastropietro
ACI
FlexTech

This FHE Master Class covers all the basics of using printable conductors for additive manufacture of circuits on polymer substrates.  Attendees will learn about the different types classes of conductive inks available, and how to characterize their performance and cost. Students will also procure an overview of traditional and digital printing methods, drying/curing/sintering methods, and design and assembly differences compared to traditional ‘printed’ circuit boards.

This class is offered OnDemand. 

10:00 am - 12:00 pm Off Add to Calendar 2021-09-08 10:00:00 2021-09-08 12:00:00 FlexTech Master Class #8 Materials This FHE Master Class covers all the basics of using printable conductors for additive manufacture of circuits on polymer substrates.  Attendees will learn about the different types classes of conductive inks available, and how to characterize their performance and cost. Students will also procure an overview of traditional and digital printing methods, drying/curing/sintering methods, and design and assembly differences compared to traditional ‘printed’ circuit boards. This class is offered OnDemand.  United States SEMI.org [email protected] America/Los_Angeles public America/Los_Angeles
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Kalispell, MT – April 14, 2021 – ClassOne Technology (classone.com), the global provider of advanced semiconductor plating and surface preparation systems, announced that it has received a multi-tool order from one of the largest Gallium Arsenide (GaAs) foundries in Asia. The order was for ClassOne’s Solstice® S8 systems and included proprietary GoldPro™ processing chambers for advanced gold plating. The announcement was made by ClassOne’s CEO, Byron Exarcos, and Senior Technology Director, John Ghekiere.

"This customer is using the Solstice S8 for high-volume HBT processes on 150mm GaAs wafers,” said Ghekiere. “They're producing advanced power semiconductor devices that involve several important gold processes, both frontend applications and backend vias. So, they were interested in our GoldPro chamber for a number of reasons: For one thing, it automatically adjusts to a broad range of substrate thicknesses, from nominal-thickness wafers to those that are mounted on thick substrates. So they don’t have to reconfigure for each substrate type.”

“Also, the GoldPro reactor is able to deliver exceptional gold plating uniformity together with high wafer throughput,” said Ghekiere. “In previous generations of gold plating systems, the user generally had to choose between plating quality and processing speed. However, GoldPro is designed to form highly stable flow structures that achieve extremely uniform feature shape without sacrificing plating rate.”

“All of this is producing a steady increase In Solstice sales, notably in high-volume fabs and in Asia," said Exarcos. “Partly it’s because of Solstice’s performance and flexibility, delivering both high-quality electroplating and surface prep processes on the same tool, which boosts production and ROI. But it’s also because of ClassOne’s high level of customer support in Asia. Many customers are just getting started in advanced electroplating technology, and they depend on us for the deep process experience and technical support they need to get from start-up to full production. For example, many of them count on our ability to provide pre-production sampling through our central Technical Development Center, which can shorten their time frames considerably. It’s this combination of world-class technology and world-class support that’s been driving many of the repeat orders we’ve been receiving across Asia and around the world.”

ClassOne’s Solstice S8 is an eight-chambered, fully-automated single-wafer production tool that delivers high-performance electroplating as well as wafer surface preparation for a range of processes, including cleaning, metal lift-off, resist strip, UBM etch and more. The Solstice series also includes the fully-automated S4 with up to four processing chambers and the semi-automated Solstice LT with up to three chambers for process development or lower-volume production.
# # #

About ClassOne Technology
ClassOne Technology (classone.com) has become the semiconductor industry’s leading provider of advanced wet-chemical wafer processing equipment for ≤200mm wafers. ClassOne’s popular Solstice® plating and surface preparation systems include the S8 with up to eight chambers and the S4 with up to four chambers for high-speed fully-automated single-wafer production. The Solstice LT provides up to three chambers for process development or lower-volume production. Complementing the Solstice platform, ClassOne has developed a series of proprietary chambers, including the GoldPro™ and CopperMax™, to uniquely optimize specific types of processing. In addition, ClassOne offers the Trident™ product lines of advanced batch-processing spin-rinse-dryers and spray solvent tools. Headquartered in Kalispell, MT, the company has successfully brought new high-performance processing technology to compound semiconductor and many emerging markets that have long been underserved by the older equipment manufacturers. Hundreds of ClassOne tools are now at work in leading fabs and research facilities around the globe, producing many of the world’s most advanced devices, from microLEDs and VCSELs to next-generation RF and sensors.

SEMI Members:  $49

Use your corporate email address during log in to be recognized as a SEMI Member.

Non-Members:  $99

Students:  Free

Contact Gity Samadi ([email protected]) with a picture of your student ID to receive your discount code. 

Flexible Hybrid Master Classes are offered on many topics!  Visit this page for entire list and links to more detailed information on each one.

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OVERVIEW

In the last few years, electronics packaging has rightfully emerged from the shadows of CMOS scaling to make a significant impact in high performance and mobile appliance computing.  

In this course, we reviewed the key developments in this paradigm change and the implications these have on Flexible Hybrid Electronics especially the use of bare dielets, fine pitch interconnects and novel substrate materials.

The area of Flexible Hybrid Electronics (FHE) has also developed and is making a significant impact in the area of medical and wellness electronics.  The first generation of these devices have, for most part, adapted Printed Circuit Board (PCB) technology by using thinner PCBs and assembling either thinned or thin packaged “older” generation of chips on to these platforms, typically with coarse printed wiring to connect a small number of such chips.

This approach, while immensely useful to get  the field going, needs to adapt and borrow from the both silicon and advanced packaging technology trends, so that we can advance this trend to the next level. The key paradigm challenges ahead are: scaling  FHE in general – this includes the adoption of dielet (chiplet) technology in more advanced CMOS nodes including edge-AI, higher performance interconnects, flexible high-density energy storage, wireless communication and advanced ergonomics and all of these at lower cost and higher reliability.

This talk addresses the challenges and outline a possible technology roadmap to achieve these goals in the next few years.

Featured Speaker Biography: Subramanian S. Iyer (Subu) is Distinguished Professor and holds the Charles P. Reames Endowed Chair in the Electrical Engineering Department and a joint appointment in the Materials Science and Engineering Department at the University of California at Los Angeles. He is Director of the Center for Heterogeneous Integration and Performance Scaling (CHIPS). Prior to that he was an IBM Fellow. His key technical contributions have been the development of the world’s first SiGe base HBT, Salicide, electrical fuses, embedded DRAM and 45nm technology node used to make the first generation of truly low power portable devices as well as the first commercial interposer and 3D integrated products. He also was among the first to commercialize bonded SOI for CMOS applications through a start-up called SiBond LLC.

More recently, he has been exploring new packaging paradigms and device innovations that they may enable wafer-scale architectures, in-memory analog compute and medical engineering applications. He has published over 300 papers and holds over 75 patents. He has received several outstanding technical achievements and corporate awards at IBM. He is an IEEE Fellow, an APS Fellow, an iMAPS Fellow and a Distinguished Lecturer of the IEEE EDS and EPS and a member of the Board of Governors of IEEE EPS. He is also a Fellow of the National Academy of Inventors. He is a Distinguished Alumnus of IIT Bombay and received the IEEE Daniel Noble Medal for emerging technologies in 2012 and the 2020 iMAPS Daniel C. Hughes Jr Memorial award.

Read More About Dr. Subramanian Iyer

On-Demand, Online
United States

Subramanian S. Iyer
Subramanian S. Iyer, PhD
Distinguished Chancellor's Professor & Charles P. Reames Endowed Chair
UCLA
- FlexTech Standards

View this Master Class On Demand!  Learn why and how new packaging paradigms like chiplets and dielets are impacting the world of flexible hybrid electronics (FHE) from one of the industry's foremost experts, Dr. Subramanian Iyer of UCLA.  The course explores how these packages are packing such a punch and enabling advanced performance in a much smaller and flexible footprint.

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