Heidelberg Instruments Reports Major Orders for the VPG+ 1400 FPD Volume Pattern Generator from Leading Asian Photomask Manufacturers

Heidelberg, Germany – Heidelberg Instruments has secured two major orders for its VPG+ 1400 FPD Volume Pattern Generator from leading photomask manufacturers in Asia, with a total order value between EUR 9 million and EUR 10 million. Deliveries are scheduled for 2025.

“These significant order intakes mark major milestones for the company, reinforcing our market position and driving further innovation and growth in the display technology sector”, says Alexander Forozan, VP of Global Sales and Business Development.

The VPG+ 1400 is Heidelberg Instruments’ largest system, specifically designed for large-format photomask patterning in the flat panel display (FPD) industry. It supports mask sizes up to 1400 x 1400 mm², making it ideal for various flat panel display generations (G4 to G8). The VPG+ 1400 sets a new standard for high-throughput photomask production, offering the precision and scalability required for large displays. Additionally, it delivers the accuracy needed to produce large-area halftone photomasks for flat panel displays.

Equipped with advanced metrology and alignment features, including Cognex AI-based image recognition, the system ensures precise alignment for multilayered masks. Its linear and nonlinear coordinate corrections further enable precise overlay across tools.
By addressing the diverse exposure needs of customers, Heidelberg Instruments' large-area VPG+ Volume Pattern Generators have proven to be valuable assets in display photomask production lines.

Further information: https://heidelberg-instruments.com/product/vpg-1400-fpd/

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Innovative plug-and-play device helps conduct comprehensive equipment compliance tests for automatic carrier delivery in automated fabs

SEMICON Europa, Munich, Germany, November 12, 2024 – Agileo Automation, a leading provider of control and connectivity solutions for global semiconductor equipment manufacturers, today launches the E84 PIO Box at Booth #C2848. This handheld device offers a new lightweight interface for fab staff to test semiconductor equipment software for compliance with SEMI’s E84 and GEM300 standards suite for automatic carrier delivery. It improves the readability, identification, and validation of E84 signal exchanges and functional aspects in cleanrooms or workshops. Integrated with Agileo Automation’s Speech Scenario software that emulates the fab host and validates the SECS/GEM interface with predefined test scenarios, the E84 PIO Box can easily emulate automated carrier delivery systems such as overhead hoist transport or automated guided vehicles. It is able to detect non-compliance and other functional issues thanks to its close alignment with SEMI’s E84 standard. The device features a DB25 connector for easy integration with E84 passive systems such as a load port and connects directly to a PC via a single USB cable for both data and power supply.

“In highly automated fabs, even minor carrier delivery issues can lead to costly downtime. Our E84 PIO Box is designed to rigorously validate nominal and error cases, ensuring seamless operations and fast recovery, benefiting both equipment manufacturers and facilities alike,” explains Marc Engel, CEO of Agileo Automation. “Early adopters have seen significant improvements in overall equipment software quality and now approach each software update with greater confidence, backed by consistent testing results.”

About Agileo Automation
Since its inception in 2010 in Poitiers, France, Agileo Automation has empowered global semiconductor equipment manufacturers to optimize their production machines with control, communication, data acquisition, and testing solutions, enabling their deployment in large-scale fabs worldwide. At the heart of Industry 4.0, Agileo’s A²ECF-SEMI framework provides a robust foundation for developing equipment controller software, leveraging the SEMI SECS/GEM and GEM300 standard suites. As a member of SEMI and the OPC Foundation, Agileo is a key contributor to the development and integration of industry standards such as SEMI standards and OPC Unified Architecture (OPC-UA). For more information, please visit our web site or follow us on LinkedIn.

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Chip Integration Technology Center (CITC) today announced the appointment of Toni Versluijs as the new chairman of its Supervisory Board. Versluijs will serve as the incoming chairman from September through December. Effective January 1, 2025, he will take over the responsibilities from chairman Roel Fonville who is retiring.

Versluijs has an extensive background of more than 25 years in the semiconductor industry, of which more than 15 years in general and executive management roles. Prior to this appointment, he worked for NXP, where he led the In-Vehicle Networking product line and was NXP Nijmegen site director and statutory director of NXP Netherlands. Most recently, he led the Business Group MOS at Nexperia, served as statutory director for Nexperia in the UK and was part of the company’s global executive leadership team.

He explains his choice for CITC: “I look forward to using my many years of experience in the semiconductor industry to contribute to the success of CITC in Nijmegen. Nijmegen is a location with a long heritage in semiconductor packages that have changed the world. CITC is a unique venture and has a unique position between private parties, the academic world and knowledge institutes.”

CITC is a smaller and different kind of organization than his previous employers, but Versluijs sees the potential: “CITC has attracted quite some talent in recent years, built partnerships and initiated new developments. In short: it has laid the foundation for growth, and it will flourish in the coming years. I am convinced that it has the potential to change the world of semiconductor packaging again.”

The current chairman of the CITC Supervisory Board, Roel Fonville, adds: “The Supervisory Board is very pleased to welcome Toni Versluijs to our midst. His personality and broad experience in the industry and in the Nijmegen region will help the Board to fulfill its role in securing the continued development of the organization.”

About CITC
Chip Integration Technology Center (CITC) is a non-profit, joint innovation center specializing in heterogeneous integration and advanced chip packaging technology. CITC has created an effective ecosystem in which companies, research and educational institutes work on bridging the gap between academics and industry. CITC's contribution to the ecosystem is to provide access to innovation, infrastructure, and education. CITC was founded in 2019 with strategic partners TNO and Delft University of Technology and is supported by local and regional governments.
www.citc.org

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Certified B CorporationTM recertification and 2024 Impact Report accredit commitment to positive impact.

Rolla, MO – July 30, 2024 – Brewer Science, Inc., a global leader in semiconductor innovation, is thrilled to announce its recertification as a Certified B Corporation™. This achievement underscores Brewer Science's steadfast commitment to sustainable business practices and ethical operations.

Certified B Corporations meet high standards of verified social and environmental performance, transparency, and accountability. Brewer Science's recertification reaffirms its dedication to People Using Business as a Force for Good®, aligning with a global movement of companies seeking to balance profit with purpose. Brewer Science received its initial B Corp Certification in 2021. Certified B Corporations are required to renew their certification every three years, by completing a meticulous assessment process conducted by B Lab™, the certifying body of B Corps, which examines over 170 factors while reviewing Brewer Science’s customers and vendors, record of inclusion, community involvement, corporate governance and environmental impact. Key elements such as average employee tenure, charitable giving, energy savings plan, recycling policies, employee volunteer service, and employee upward mobility are also analyzed.

Alongside this milestone, Brewer Science is proud to unveil its 2024 Impact Report, offering a detailed overview of the company's impact across the five key areas identified by B Corp: Governance, Workers, Community, Environment, and Customers.

The 2024 Impact Report showcases Brewer Science's significant achievements and progress in fostering positive impacts within its sphere of influence. Highlights include:

• Environment Impact
o Reducing carbon footprint for Scope 1 and Scope 2 GHG by 80% from baselines (2018) by 2030
o Achieving net zero carbon footprint by 2050

• Customer Impact
o Building a collaborative supply chain
o Participating in industry consortiums, such as SEMI

• Employee Impact
o Improving employee benefits, such as community service leave
o Assessing employee satisfaction through third-party anonymous survey

• Community Impact
o Collaborating with companies, like Askinosie Chocolate, to improve public health
o Supporting STEM education in schools and community organizations

• Governance Impact
o Ensuring equity by being Certified Employee-Owned
o Providing transparency through third-party audits, such as GreenCircle Certified

"Renewing our Certified B Corporation status underscores Brewer Science's ongoing dedication to integrating social and environmental responsibility into our core business strategy," states Terry Brewer, Founder and Executive Chairman of Brewer Science. "Since our initial certification, we've leveraged over three years of experience to amplify our impact across global operations, benefiting our employees, communities, and customers worldwide. We believe in the mission to Use Business as a Force for Good, and we will continue to deliver on our promise to drive positive change and create lasting value for all stakeholders."

Brewer Science's recertification reflects its continuous journey towards driving positive change within the semiconductor industry and beyond. By maintaining B Corp status, the company remains part of a global community of like-minded organizations dedicated to redefining success in business.

To access the 2024 Impact Report and learn more about Brewer Science's sustainability initiatives, please visit www.brewerscience.com/going-green.

About Brewer Science
Brewer Science is a global leader in developing and manufacturing next-generation materials and processes that foster the technology needed for tomorrow. Since 1981, we’ve expanded our technology portfolio within advanced lithography, advanced packaging, smart devices, and printed electronics to enable cutting-edge microdevices and unique quality monitoring systems for water and air applications. We are Certified Employee-Owned and a Certified B Corporation™, using our business as a force for good. Our headquarters are in Rolla, Missouri, with customer support throughout the world. Learn more at: www.brewerscience.com.

About B Lab
B Lab is transforming the global economy to benefit all people, communities, and the planet. A leader in economic systems change, the global network creates standards, policies, tools, and programs for business, and we certify companies — known as B Corps — who are leading the way. To date, 8,000 B Corps across 95 countries and 161 industries employ over 750,000 workers, and more than 280,000 companies manage their impact with the B Impact Assessment and the SDG Action Manager. B Lab has created and led efforts to pass over 50 corporate statutes globally that enable stakeholder governance: www.bcorporation.net

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Verific Design Automation today affirmed its position as the leading provider of front-end platforms powering an emerging electronic design automation (EDA) space by collaborating with a group of well-funded artificial intelligence (AI) EDA startups.

These new AI EDA companies use Verific’s unsurpassed language support for fast, accurate large language model (LLM) development, speeding time to market for products that range from functional verification, chip design to code development.

AI EDA providers PrimisAI and Silimate, founded by former chip designers, will be in the Verific booth (#1414) AI showcase at the 61st Design Automation Conference (DAC) June 24-26 at Moscone West in San Francisco.

“This new and exciting market segment is about to change the entire makeup of the EDA industry,” says Rick Carlson, vice president of Verific. “We are about to see a variety of tools, technologies and methodologies destined to change the way chip design and verification is done.”

Introducing the EDA Startups Ushering in the Era of AI EDA
PrimisAI and Silimate will be showcased in the Verific DAC booth and present their unique use of AI technology to eliminate error-prone repetitive tasks for efficient and more productive chip design.

PrimisAI offers a generative AI solution for chip design with advanced language-to-code and language-to-verification capabilities through its interactive AI assistant to address complex hardware challenges across the entire design stack from concept to bitstream/GDSII. RapidGPT, unveiled earlier this year, lets engineers interact with their design and the entire EDA ecosystem with a natural language interface, boosting productivity and accelerating time-to-market. Founded by serial entrepreneur Naveed Sherwani who serves as chairman and CEO, PrimisAI is backed by two early-stage investors.

“Verific’s front-end platform lived up to its well-earned status of industry standard as we implemented it in RapidGPT,” remarks Pierre-Emmanuel Gaillardon, CSO of PrimisAI. “The robustness and quality of the Verific front-end platform ensured we would deliver a tool that would give engineers a seamless and efficient workflow.”

Silimate, backed by Y Combinator, is building the co-pilot for chip designers to help build better chips faster. Silimate finds functional bugs, predicts power, performance and area (PPA) issues, and recommends real and accurate fixes in real time, and is already being used by chip teams building complex IP and SoCs. Co-founders Ann Wu and Akash Levy previously built chips and EDA tools at Apple, Stanford, NVIDIA, and Synopsys.

“Verific consistently produces quality products and offers exceptional quality support,” comments Wu. “Their parsers are fantastic and result in very quick tool bring-up times for our customers.”

Metalware co-founded by Ryan Chow and Andrew Nedea is another Verific front-end platform user. It was started with initial funding from Y Combinator with the mission to accelerate embedded development using AI technology after personally experiencing repeated bottlenecks in embedded software at SpaceX. The Metalware AI EDA tools help designers rapidly write HDL and embedded C/C++ by combining insights from manuals, datasheets and code, offering 10x faster development by automating low-level programming.

“Verific embodies our stated goals to reduce the time it takes to design chips and systems,” affirms Chow. “Verific and its team of experienced EDA engineers have shown repeatedly that its front-end platforms enable a project that would normally take days to be completed in hours.”

Another AI EDA startup in stealth mode is also a new Verific user. Details will be announced shortly.

DAC AI Showcase
Verific will demonstrate its SystemVerilog, Verilog, VHDL and UPF front-end platforms, while PrimisAI and Silimate will be in the Verific DAC Booth #1414 at various times of the day to give 10-minute presentations.

DAC will be held from Monday, June 24, through Wednesday, June 26, from 10 a.m. until 6 p.m. at Moscone West in San Francisco.

To arrange a demonstration or private meeting, send email to [email protected]

DAC registration is open.

About Verific Design Automation
Verific Design Automation is the leading provider of SystemVerilog, Verilog, VHDL and UPF Parser Platforms that enable project groups to develop advanced electronic design automation (EDA) products quickly and cost effective worldwide. With offices in Alameda, Calif., and Kolkata, India, Verific has shipped more than 60,000 copies of its software used worldwide by the EDA and semiconductor industry since it was founded in 1999.

Engage with Verific at:
Email: [email protected]
Website: www.verific.com
LinkedIn: https://www.linkedin.com/company/verific-design-automation-inc/
Facebook: https://www.facebook.com/Verific-Design-Automation-100448363329771/

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Axiomise, a company noted for enabling formal verification adoption, today announced the formation of its Technical Advisory Board and its first two members, Dr. Vidya Chandran Darbari and Colin McKellar.

Dr. Darbari is an Axiomise co-founder and company director as well as Senior Lecturer in Structural Biology at Queen Mary University of London (QMUL). McKellar, formerly Vice President of Imagination Technologies, is currently Senior Director of Hardware at X-Silicon Inc.

“Vidya and Colin have long served as my unofficial advisers and confidants as I built Axiomise from the ground up,” remarks Dr. Ashish Darbari, founder and CEO of Axiomise. “Formalizing our relationships with Vidya and Colin will further strengthen the company and the expertise of our formal verification experts.”

“I have had the pleasure of watching Axiomise grow from early startup to a formidable verification provider and I couldn’t be prouder,” states Dr. Darbari. “I look forward to adding my voice as a member of the Technical Advisory Board.

My relationship with Ashish goes back to the early days of Imagination,” notes McKellar. “I watched with amazement and respect as he implemented a rigorous formal verification flow that caught bugs that would have forced costly respins and threats to the company’s good name and reputation.”

About Dr. Vidya Chandran Darbari
Dr Vidya Chandran Darbari, an Axiomise co-founder and company director, has a multi-disciplinary record combining medicine, life sciences, mathematics and technology. A leader and key contributor who leads from the front, Dr. Darbari helped steer Axiomise from its early stages to establishing it as a global leader in formal verification consulting and services, training and RISC-V solutions. She is a senior lecturer at the Queen Mary University of London with several impactful publications in high-end journals including Nature and Science. Dr Darbari received her Bachelor of Medicine, Bachelor of Surgery (MBBS) degree from Seth G.S. Medical College (KEM Hospital) in Mumbai, India, before completing her Master of Technology (MTech) degree from Indian Institute of Technology (IIT) Bombay. Dr. Darbari obtained her Doctorate degree from the University of Cambridge. She has been recognized for her innovative research through Biochemical Society Early Career Award, British Crystallographic Society Early Career prize and recently a Research Excellence Award by the Science and Engineering Faculty at QMUL.

About Colin McKellar
Colin McKellar brings the customer experience to the Axiomise team having been a key player in driving customer engagements in his previous roles with Apple, Intel, TI, SiFive and SEGA among others. He started his career in electronics 30 years ago in Sony Broadcast and Professional working on HD video encode and decode. Most of his career was spent working at Imagination Technologies as a key contributor to the graphics IP roadmap and was instrumental in bringing in and maturing a world-class verification infrastructure including simulation, formal verification and large FPGA, emulation and silicon farms. McKellar joined X-Silicon in 2023 with the responsibility to drive product and execution for bringing graphics and AI acceleration to the RISC-V ecosystem. He has a wealth of design and verification experience across GPU, CPU, AI and SoC chips successfully managing large multinational teams of more than 200 engineers.

About Axiomise
Axiomise is accelerating formal verification adoption through its unique combination of training, consulting, services and specialized verification solutions for RISC-V. Axiomise was founded by Dr. Ashish Darbari, FBCS, FIETE, DPhil (Oxford), who has been a formal verification practitioner for more than two decades with 60 patents in formal verification and over 70 publications.

Engage with Axiomise at:
Website: www.axiomise.com
Twitter: @axiomise
LinkedIn: https://www.linkedin.com/company/axiomise/
Facebook: https://www.facebook.com/axiomise

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