The nine to tenfold increase in critical electric field strength of SiC over Si allows high voltage blocking layers to be fabricated significantly thinner than those of similarly rated Si devices. This reduces device on-state resistance and capacitance, and therefore the associated conduction and switching losses, while maintaining high-voltage breakdown capability. However, lack of a well-designed edge termination structure diminishes the high voltage performance of SiC power devices. Indeed, under reverse bias, planar junctions exhibit breakdown voltages well below the ideal SiC drift layer limit because of electric field crowding at the junction periphery. Consequently, to maximize breakdown voltage, specialized edge termination structures are utilized. In this webinar, common structures that enhance the breakdown voltage of power SiC devices like metal field plates, floating guard rings, multiple-Junction-Termination-Extensions, and beveled edge terminations will be discussed. Emphasis will be placed on optimizing their fabrication by minimizing photolithography levels and processing complexity, while ensuring robust breakdown voltage capability at high wafer yields.
Join us online for the fifth webinar in the Silicon Carbide Series.
9:00 am - 10:00 am
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Add to Calendar2023-12-07 09:00:002023-12-07 10:00:00SiC—Silicon Carbide Webinar Series Now Available On-Demand!
Join us online for the fifth webinar in the Silicon Carbide Series.United StatesSEMI.org[email protected]America/Los_Angelespublic
America/Los_Angeles
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Register Now
Learn about 10,000+ semiconductor jobs you didn't know existed
Meet with professionals and executives during the Networking Lunch and Networking Sessions
Learn how you can connect with 2100+ employers in the microelectronics industry
Engage a mentor for career development guidance, resume building, interview skills
Enjoy FREE FOOD
Day in a Life
Students are welcome to come and go
Students to join in-person
Raffle Prizes!
Edwards Vacuum, LLC 2411 E. Germann Road Chandler, AZ85286 United States
3:00 pm
Check in | Snacks & Water - Prizes, swags, gift cards, etc.
3:15 pm
Welcome & SEMI Arizona Chapter Introduction
3:30 pm
Semiconductor 101- Industry Overview and Career Opportunities
3:50 pm
How to Find Employment, and How to Leverage Face to Face vs Online Relationships
4:10 pm
Tips On How to Succeed in a Technical Interview and Preparing a Technical Resume, Skills Set Needed
4:30 pm
Day in a Life of Technician, Production Supervisor and Engineer
5:00 pm
Panel Discussion with Industry Leaders and Networking
5:30 pm
Speed Interviews – Students and Industry
6:00 pm
Adjourn
A Professional Development Seminar Organized by SEMI Arizona Chapter
Jobs in the Micro- and Nano-Electronics Industry: Connecting College Students to Industry
Attendance is free, but registration is required. Register by April 15, 2023.
SEMI Professional Development Seminar
Maricopa Community Colleges | April 26, 2023
3:00 pm - 6:00 pm
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Add to Calendar2023-04-26 15:00:002023-04-26 18:00:00SEMI Professional Development Seminar with Maricopa Community CollegesA Professional Development Seminar Organized by SEMI Arizona Chapter
Jobs in the Micro- and Nano-Electronics Industry: Connecting College Students to Industry
Attendance is free, but registration is required. Register by April 15, 2023. Edwards Vacuum, LLC 2411 E. Germann Road Chandler, AZ 85286 United StatesSEMI.org[email protected]America/Los_Angelespublic
SEMI Professional Development Seminar with Oregon State University
Landing a Job in Semiconductors (includes information on the average/median salary of the industry)
11:15 am
Diversity, Equity and Inclusion
11:30 am
Environmental/Sustainability
11:45 am
Day in the Life of an Engineer –Transitioning from University to Industry
12:00 pm
Networking Lunch with Industry Leaders
Across the Hall-Room 1007
2:00 pm
Adjourn
A Professional Development Seminar Organized by SEMI Pacific Northwest Chapter
Attendance is free, but registration is required. Register by April 3, 2023.
SEMI Professional Development Seminar
Oregon State University | April 12, 2023
10:00 am - 2:00 pm
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Add to Calendar2023-04-12 10:00:002023-04-12 14:00:00SEMI Professional Development Seminar with Oregon State University A Professional Development Seminar Organized by SEMI Pacific Northwest Chapter
Attendance is free, but registration is required. Register by April 3, 2023. Oregon State University Kelley Engineering Room 1001 Corvallis, OR 97331 United StatesSEMI.org[email protected]America/Los_Angelespublic
[IN-PERSON] Advanced Packaging Training Seminar 2023
Substrate and PCB fabrication processes and its key processes and materials such as ABF, BT, FR5, etc.
Build-up micro-via technologies with use of lasers, plasma, photo materials etc.
Registration and tolerances of substrate design in relation to substrate and PCB fabrication processes which includes via to pattern, pattern to resist etc, which can affect microelectronics assembly processes.
Materials, design and surface finishes (Cu, NiAu, ENIG , NiPdAu etc) with respect to assembly processes and parameters.
Substrate defects and package reliability including failure of fatigue, kirkendall voids and intermetallics.
Why should I attend?
Provides necessary technical knowledge for industry professionals
Enhance knowledge in manufacturing and R&D know-how in IC packaging
Case studies discussion
Networking Opportunity with industry peers
Who should attend?
Directors, managers, process engineers, R&D engineers working in the areas of microelectronics
Useful for sale or application engineers who supply packaging materials and tools to the industry
Malaysian International Trade & Exhibition Centre (MITEC) No. 8 Jalan Dutamas 2 50480Kuala Lumpur Kuala Lumpur Malaysia
MEET OUR SPEAKER
Dr. Lee Teck Kheng
Director, Technology Development Centre, Institute of Technical Education Singapore,
SEMI SEA Advance Packaging Technical Committee Member
Note: Program is subject to changes.
9:00 am
Introduction to IC Packaging & Interconnects
Introduction to IC Packaging
• Functions of Packaging – Mechanical, Material, Electrical and Chemical
• Review of Packaging Trend – BGA, CSP, Fan-in & Fan-out WLP, 3D Packaging, SoC vs SiP etc
• Challenges in Assembly and Packaging
Board Assembly and Soldering & PCB and IC Carriers
Board Assembly and Soldering
• Through Hole & SMT – Stencil Print Process, Reflow Profile
• Solder Materials – Alloy, Flux, Solvents, self-alignment effect
• Pb Free Solder – Ternary phase diagram, SnAgCu
• Intermetallics and Growth – Diffusion mechanism, Arrhenius equation
• Testing and Reliability – Ball shear & pull failure strength and modes, Fatigue, Weibull distribution
PCB and IC Carriers
• PCB Technology – Material properties, PCB fabrication process, drilling, patterning, plating, solder resist, laminating
• IC Carriers – Design rule, Leadframe, LTCC, Flex and BT substrates
• Substrate Development
4:00 pm
Q&A | Case Studies
5:00 pm
End of Day 1
5:00 pm
End of Day 1
9:00 am
Assembly Process
• Thickness Reduction – Grinding, Lapping, Polishing, CMP
• Dicing/Singulation – Blade, Laser, Stealth dicing, Dicing after grind
• Die Attach – Eutectic bonding, DA materials, Collets
• Plasma – Argon, Oxygen plasma, Surface tension
• Encapsulation – Mold constitutes and properties, Transfer, Film and compression molding, Dam and fill
• Plating – Solder plating, NiPd finish, PPF
• Trim & Form – ESD, Lead formation, Spring back mechanism
Interaction of Substrate and PCB to Microelectronics Packaging Assembly and Reliability
Substrate and PCB technologies are the building blocks for Microelectronics Packaging and surface mount packages.
Course Fee:
Member Rate: SGD 750
Non-member Rate: SGD 935
Register before 6 March 2023 to enjoy Early Bird rate of up to 15% off the rates above.
This workshop is HRDC Claimable, subjecting to terms and conditions.
Certificate of completion will be awarded at the end of the workshop.
Advanced Packaging Training Seminar 2023
Interaction of Substrate and PCB to Microelectronics Packaging Assembly and Reliability
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Add to Calendar2023-03-08 00:00:002023-03-09 00:00:00[IN-PERSON] Advanced Packaging Training Seminar 2023Interaction of Substrate and PCB to Microelectronics Packaging Assembly and Reliability
Substrate and PCB technologies are the building blocks for Microelectronics Packaging and surface mount packages.
Course Fee:
Member Rate: SGD 750
Non-member Rate: SGD 935
Register before 6 March 2023 to enjoy Early Bird rate of up to 15% off the rates above.
This workshop is HRDC Claimable, subjecting to terms and conditions.
Certificate of completion will be awarded at the end of the workshop.
Malaysian International Trade & Exhibition Centre (MITEC) No. 8 Jalan Dutamas 2 50480 Kuala Lumpur Kuala Lumpur MalaysiaSEMI.org[email protected]Asia/Singaporepublic
Asia/Singapore
The Fourth Industrial Revolution, or Industry 4.0, revolutionized automation monitoring, enhanced production efficiencies, and improved product quality. Industry 5.0 is the next industrial revolution coming to the forefront.
Industry 5.0 builds and adapts the components of Industry 4.0 (robotization, automation, IoT, connected machines, smart systems, data analytics, AI, ML) with a focus on sustainability, environmental, social, and well-being of the worker, and optimized human-robot interactions.
With the renewed interest in on-shoring manufacturing in the United States, this breakfast forum is a great opportunity to learn about Industry 5.0 and the ecosystem partners developing these future ideas.
Join the conversation on—
Market Trends, Forecast & Outlook
Industry 4.0 + Transition to 5.0—Challenges + Solutions
Digital Journey–AI/ML, Autonomous Solutions, Digital Twin, etc.
Supply Chain / Disruptions: Linear to Circular Economy and Localized Sourcing
Hosted by Analog Devices Presented by the SEMI Pacific Northwest Chapter
Smart Manufacturing—What Does a Smarter World Look Like With Industry 5.0?
SEMI Pacific Northwest Forum IN-PERSON & VIRTUAL EVENT
Pacific Time
8:00 am - 11:30 am
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Add to Calendar2023-05-12 08:00:002023-05-12 11:30:00[Pacific Northwest Forum] Smart Manufacturing—What Does a Smarter World Look Like With Industry 5.0?IN-PERSON AND VIRTUAL EVENT
Hosted by Analog Devices
Presented by the SEMI Pacific Northwest ChapterAnalog Devices—ADI OR United StatesSEMI.org[email protected]America/Los_Angelespublic
America/Los_Angeles
Health and Safety
We Are Excited to Welcome You Back to the Pacific Northwest Forum
Your health and safety are our top priority. SEMI Americas (“SEMI”) monitors developing federal, state, and local health and safety recommendations and requirements to determine the most appropriate safety protocols for our in-person events.
SEMI will comply with and follow current facility and local government jurisdiction guidelines of the venue's location. The health and safety guidelines outlined below continue to evolve and will be updated as necessary to help support a safe experience for all attendees onsite.
FACE COVERINGS
Although masks are not required, attendees are encouraged to determine use based on their own personal comfort level as well as to be respectful of other's individual choice.
RELEASE AND WAIVER FORM
This was included in your online registration.
ADDITIONAL SAFETY PROTOCOLS
Please practice social distancing.
Wash and sanitize your hands frequently.
Avoid handshakes.
Wear your attendee badge at all times to indicate that you have gone through the health screening process.
SEMI is committed to upholding the health and safety standards outlined on this page. We will continue to monitor the guidance of public health authorities and government agencies going forward and will make appropriate adjustments in the future based on that guidance. Additional details about policies and procedures will be posted here as they are made available.
Non-CMOS Compatible SiC Power Device Fabrication in Volume Si Fabs
SiC devices are displacing their incumbent Si counterparts in several high-volume power applications. As SiC market share continues to grow, the industry is lifting the last barriers to mass commercialization that include higher than Si device cost, relative lack of wafer planarity, the presence of defects like basal plane dislocations, reliability and ruggedness concerns, and the need for a workforce skilled in SiC power technology to keep up with the rising demand. To enable cost-effective manufacturing, high-yielding SiC fabrication in conventional Si fabs is desirable.
In this webinar, I will summarize key aspects of SiC fabrication technology and outline non-CMOS compatible processes that have been streamlined to allow for mass SiC chip fabrication in conventional Si mature fabs. The SiC industry has successfully leveraged the Si fab infrastructure and has made the relatively small financial investments required to allow existing Si fabs to process SiC. Consequently, SiC chip fabrication in volume fabs alongside Si has emerged as a “cost reduction” model that exploits “silicon” manufacturing economies of scale. Today’s SiC fab infrastructure is vibrant, mirrors that of silicon, and is rapidly expanding.
View Previous Webinar in the SiC Series
Webinar #1—Silicon Carbide Material Properties, Key Applications, and Fabrication Basics: Making the Transition from Silicon
Webinar #2—Non-CMOS Compatible SiC Power Device Fabrication in Volume Si Fabs
Webinar #3—Bidirectional SiC and GaN Switch Technology
Webinar #4—Understanding SiC Chip Cost, the Impact of Defects, and the Case of Price Parity with Si at the System Level
Join us online as we dive into SiC fabrication technology and non-CMOS compatible processes that have been streamlined to allow for mass SiC chip fabrication in conventional Si mature fabs.
SiC—Silicon Carbide Webinar Series #2
Virtual Webinar #2
ON-DEMAND
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Sponsorships can be tailored to meet your branding and marketing objectives. Become a sponsor and brand your company at the Texas Chapter Spring Breakfast Forum.
Contact Tim Janes, [email protected]to learn about available sponsorship opportunities.
Texas at Scale: From Fab to Cloud, AI, Power, and the Future of the Semiconductor Ecosystem
The SEMI Texas Spring Forum brings together industry executives, technologists, policymakers, academic leaders, and downstream enterprises — from GPU/accelerator companies to cloud, automotive, industrial, and system OEMs. Together, we will explore how Texas can harness AI, digitalization, and cross-ecosystem collaboration to lead in next-generation chip production and full-stack system integration.
A central focus will be aligning materials and equipment suppliers, foundries, OSATs, and EDA providers, and advanced packaging organizations with the roadmaps of AI and HPC leaders, ensuring silicon, systems, and software evolve cohesively and efficiently.
Applied Materials 9700 US HWY 290 East, Building 32 Austin, TX78724 United States
8:00 am - 12:30 pm
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Add to Calendar2026-05-14 08:00:002026-05-14 12:30:00SEMI Texas Spring Breakfast ForumSEMI Spring Breakfast ForumOrganized by the SEMI Texas ChapterApplied Materials 9700 US HWY 290 East, Building 32 Austin, TX 78724 United StatesSEMI.org[email protected]America/Chicagopublic
America/Chicago
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Add to Calendar2023-02-13 00:00:002023-02-15 00:00:00Fundamentals of Product Marketing 2.0Milpitas, CA 95035 United StatesSEMI.org[email protected]America/Los_Angelespublic
