To meet the projected worldwide demand for semiconductor devices, the semiconductor industry is demanding technical and non-technical staff and personnel to be well versed in the key elements of integrated circuit (IC) fabrication and design. By taking this course, participants will learn how integrated circuits are designed and fabricated. Essential knowledge for non-technical professionals working in the industry will be obtained. This has been a popular training among those working in our field. In fact, over 120,000 people have taken this course since 1978!

Learning Objectives:

• Review of the semiconductor industry and technology in laypeople terms. 
• Understand the basics of semiconductor devices and how they work.
• Identify the processing technologies and the equipment used to produce them, materials used, and circuit design techniques.

Who Should Attend:

• New employees in:
  • Manufacturing
  • Engineering
  • Finance
  • Sales
  • Marketing
  • Semiconductor tool personal
  • Material suppliers
  • Training
  • Operators
  • Customer service
  • Attorneys
• Anyone wanting a basic understanding of the semiconductor industry.  

Course Topics: 

• Electronic fundamentals
• Crystal growth and wafer types (Si, SiGe, SOI, SiG, SiC, GaAs)
• Transistor types such as (bipolar, nMOS, pMOS, CMOS, bi-CMOS, FitFet, Gate All Around transistors)
• High-k and low-k materials
• Metal gates and High k gate oxide
• Basic design and layout concepts
• Mask making, wafer processing, materials used for fabricating the wafer, tools used for processing the wafer, contamination control, clean room standards, test, assembly, packaging, metrology
• Various types of semiconductor devices and applications such as memories, MEMS, microprocessors, DSP, analog and power ICs, Etc. 

Instructor:
 

Denny Frye 

Course Instructor

PT International, LLC

Biography

Germany

Discover the essential secrets behind semiconductor devices! Dive into the intricate world of integrated circuit fabrication and design with our comprehensive course. Ideal for both technical and non-technical professionals, this training has been a cornerstone for the industry for over four decades, attracting over 120,000 eager learners since 1978. Join us and equip yourself with the vital knowledge needed to thrive in the semiconductor industry.

Limited time offer!

• Members: $845 $645
• Non-members: $945 $745
• Students/Veterans: $745 $545

* For group orders with 10+ attendees, and for Students/Veterans discounted pricing, please contact [email protected]

Introduction to Semiconductor Design and Fabrication for Non-Techies Webinar (EU)

Online training

While silicon carbide (SiC) has long been known for its superior properties for power device manufacturing, economical high-volume production has been hard to achieve. Small substrates, high cost, and challenging manufacturing infrastructure have limited the reach of this enabling technology. With the advent of larger substrates, however, the outlook for SiC is ever brighter and, shall we say, more powerful?
From the building of these larger substrates to the development of equipment designed for SiC processing, the semiconductor industry has challenges ahead. In this webinar, we will explore these aspects of growing and maturing the SiC supply chain from the materials and equipment perspective.

United States

Robert Rhoades

President and CTO, X-trinsic;

Sr. Technology Analyst, TECHCET

Market Trends Perspective

Speaker Biography

David Kirsch

Vice President & General Manager, North America

EV Group

Implementation Perspective

Speaker Biography

Ready for Prime Time - the SiC Value Chain Prepares for Mass Adoption

An EMG Webinar

Registration

Early-bird Registration Close: Friday, May 24 / 5:00pm in KST

[Early Bird]

· SEMI Member: KRW 308,000
· Non-Member: KRW 363,000

[Regular]

· SEMI Member: KRW 385,000
· Non-Member: KRW 385,000

 

※ Registration fee includes lunch and reception.

Registration

OVERVIEW

• Date: May 29(Wed), 2024
• Time: 09:00 - 18:30
• Venue: Convention Hall 2, 3F, Suwon Convention Center

NOTICE

• Simultaneous interpretation will be provided
• Presentation files agreed by speakers will be provided to attendees.

SPONSORS

CONTACT

• SEMI Korea Program Team ([email protected])

Convention Hall 2, 3F, Suwon Convention Center
Suwon-si
Gyeonggi-do
South Korea

10:00 am - 10:05 am

HD Cho

President

SEMI Korea

Welcome

Keynote

10:05 am - 10:35 am

Seong Tae Oh

Fellow

TEL

Process Technologies for Continuous Scaling of Logic Devices

The rapid growth of AI, big data, IoT, and 5/6G communication necessitates the sophisticated computing power and efficiency of semiconductor devices, driving demand for various components such as HPC, GPU, ASIC, FPGA, and HBM. Semiconductor device and equipment industries are also challenging various new technologies to accommodate such diversifying applications and proceed with sustainable development in the era of AI and ICT.
According to the roadmap over the next 10 years, semiconductor technologies are expected to develop into the scaling technologies to further extend the existing Moore's Law and hybrid device technologies that integrate legacy nodes and advanced nodes into one. Therefore, in this presentation, we will look at the latest logic technology roadmap and introduce new process technologies to implement it.

※ Biography

Session 1: Market Trends

10:35 am - 11:00 am

Wonho Yeon

Research Fellow

KIEP

Supply Chain Management

※ Biography

11:00 am - 11:25 am

Mark Thirsk

Managing Partner

Linx Consulting

Localization Challenges of the Materials Supply Chain

※ Biography

11:25 am - 11:50 pm

Stefan CHITORAGA

Technology and Market Analyst- Packaging & Assembly

Yole Group

Material Trends in Advanced Packaging & Power Module Packaging (video recording)

※ Biography

11:50 am - 1:00 pm

Lunch

Session 2: Advanced Materials

1:00 pm - 1:25 pm

Montray C. Leavy

Deputy CTO

Entegris

Materials Innovation Advancing the Angstrom Era

Materials innovation within the Semiconductor industry has been a driving force since the planar 2D MOSFET to the current 3D gate-all-around (GAA) transistor architectures and will continue its criticality as we embark on 500-layer flash memory designs and Angstrom level critical interconnect dimensions. To achieve these once incomprehensible levels of lateral and vertical scaling, device design engineers and manufacturers are increasingly relying on disruptive materials innovation to enable the density and performance gains required at each successive technology node. As the performance requirements for the most advanced devices become more challenging, materials have shown to have an increased contribution to device performance over scaling and design. This has led to a greater portion of the periodic table being incorporated into semiconductor processing.

The integration of new materials, such as novel photoresists, interconnect metals & alloys, ultra-pure polymers, chemically modified polymer membranes, and formulated chemicals, into the chip fabrication increases process complexity and makes yield ramps more challenging. With more process steps in the overall device build, speed to yield and process integrity are more critical than ever to achieve technology qualification schedules. This presentation will focus on Entegris’ approach to materials innovation, the integration of these novel materials coupled with co-optimized solutions enabling industry technology roadmaps and yield requirements while preserving integrity of delivery and process control.

※ Biography

1:25 pm - 1:50 pm

Sadaaki Katoh

JOINT2 Team Manager

Resonac

Advanced Packaging Materials and Evaluation Platform at Resonac

Resonac has started Packaging Solution Center as new R&D center to propose one-stop solution for customers in 2018 and established the co-creative packaging evaluation platform “JOINT2” with leading companies to accelerate the development of advanced materials, equipment and substrates for 2.xD and 3D package in October, 2021.

2.xD and 3D packages require to connect chips and components in high density, therefore, both wiring pitch and vertical interconnect dimension must be finer and finer. At the same time, in order to achieve better performance, more and more chips are integrated together and thus the package size is increasing. To meet these requirement, we are developing fine vertical/lateral interconnect technology and the study of fabrication and reliability for the extremely large 2.5D advanced package.
The presentation will cover the significance and strengths of JOINT2, and updates on research and development.

※ Biography

1:50 pm - 2:15 pm

Seongjun Heo

Process Engineering Director

Lam Research

Dry Resist for Holistic EUV Patterning

EUV lithography infrastructure has become the critical element of semiconductor industry to enable the device scaling down. It consists of not only light source, optical system but also masks, photoresist. The EUV stochastic effects present challenges to optimizing EUV resist resolution, line edge roughness, and sensitivity simultaneously. To overcome these challenges, Lam introduced the new dry resist combined with the new dry development technology.

Lam’s EUV dry resist, coupled with ASML’s EUV scanners and Lam’s holistic patterning solutions, will extend the patterning roadmap (Moore’s Law) for the next 10 years and beyond by offering a high-resolution, high-fidelity, defectivity-free, and greener solution for ≤32nm pitch L/S, and ≤40nm pitch pillar and contact hole EUV patterning in the fab. EUV dry resist technology also has been validated demonstrating superior dose-to-defectivity for <32nm pitch L/S, well suited for logic applications. Lam’s EUV dry resist is uniquely suited for future HiNA EUV patterning thanks to robust resist thickness scaling while maintaining high etch selectivity and high contrast.

※ Biography

2:15 pm - 2:30 pm

Break

Session 3: Sustainability

2:30 pm - 2:55 pm

Yongsung Kim

TL

SK hynix

Sustainability Challenges of the Semiconductor Industry

As demand for chips surge, the semiconductor industry is struggling to reduce its environmental footprint. While the environmental impacts of semiconductor (and electronic products that depend on them) have mostly been liked to ‘manufacturing’ and ‘use’ phases of products which consume a significant amount of water and energy, the attention is shifting to the 'material extraction’ and ‘end-of-use’ phases of products following concerns over the e-waste issue. In this presentation, I will focus on the latest findings of the global e-waste challenge, what this means from the materials perspective, and its implications to product design and manufacturing. I will also introduce SK hynix's strategy and targets towards improving the circularity of products, and our partnership with customers/vendors to achieve a common goal.

2:55 pm - 3:20 pm

Eunho Sohn

Head of Interface Materials and Chemical Engineering Research Center

KRICT

Trends in Regulation of PFASs (per- and polyfluoroalkyl substances) and Technological Development Strategies

Fluorine compounds exhibit exceptional physical properties that set them apart from other organic materials. Consequently, they have been utilized as core materials to enhance the functionality, performance, and value of products across various key industries including electrical and electronics, semiconductors, displays, and automobiles.
However, on March 22nd of last year, the European Chemicals Agency (ECHA) issued a report imposing restrictions on the usage of over 10,000 types of per- and polyfluoroalkyl substances (PFASs) across all industries, sparking significant upheaval within the sector.
In this presentation, we will learn in detail about the definition of PFAS, and the content, progress, and schedule of PFAS regulations in Europe and the United States, and contemplate the direction of future technology development.

※ Biography

3:20 pm - 3:45 pm

Karl Kim

APAC Semiconductor Marketing Manager

Syensqo

Sustainability Opportunities for A Diverse and Secure Fluorinated Material Supply Chain

As semiconductors become more advanced and the fabrication processing conditions more extreme, the essentiality of a sustainable and secure fluorinated material supply chain plays a vital role in the future of semiconductor manufacturing. The principles of developing this supply chain are directly aligned to support the sustainability and emission roadmaps of the semiconductor industry. Syensqo will introduce the following content:
1) Priorities when Specifying Materials for a Sustainable Supply Chain
2) The Key to Sustainability - Application Segmentation
3) Case Studies

※ Biography

3:45 pm - 4:10 pm

Jae Hwan Sim

R&D manager/Korea R&D EUV team leader

DuPont

Innovating Safe and Sustainable by Design: Strategies and Steps toward Reduction of Substances of Concern in Photolithography Materials

Growing scientific evidences suggest that certain per- and polyfluoroalkyl substances (PFAS) pose global environmental and health risks. In response, global governments are contemplating measures to limit the use of these chemicals in various industries. However, specific types of PFAS are indispensable and no substitutes are currently available for most chip manufacturing applications in the semiconductor industry. Aligned with the objective of Safer and Sustainable by Design, DuPont has launched a comprehensive program to reduce PFAS usage in photoresist and associated lithography materials. In this presentation, we will provide an overview of DuPont's innovative initiatives and technical challenges encountered in this endeavor.

※ Biography

4:10 pm - 4:35 pm

Floris Buijzen

Senior Director Product Management

Corbion

CORBION: PURASOLV® ELECT for a more Sustainable Semiconductor Manufacturing

Solvents are used extensively in the semiconductor manufacturing process. Solvents are estimated to be responsible for around 7% of the Scope 3 emissions of the semiconductor industry. The typical solvents that are used are produced from fossil resources and with that not in line with net zero ambitions. For more than 20 years Corbion has been supplying biobased ethyl lactate to the semiconductor industry under it’s brand name PURASOLV® ELECT, meeting the stringent requirements of the industry. Typical applications are photoresist for i/g-line / KrF / ArF / EUV, RRC, Edge bead removal and as thinner. Biobased ethyl lactate is sustainable and safe by design: it is produced from renewable resources, non-toxic and safe to workers, biodegradable and offers a significant carbon footprint reduction compared to incumbent solvents. Switching to biobased ethyl lactate thus enables more sustainable semiconductor manufacturing.

※ Biography

4:35 pm - 4:50 pm

Break

Session 4: Collaboration

4:50 pm - 5:20 pm

Ki-Ill Moon

VP

SK hynix

Technology and Future of Semiconductor Packaging Materials

The technological advancement of semiconductor materials is a key factor along with the technological advancement of the process. And recently, the importance of Advanced PKG is increasing, and SK Hynix has achieved the result of improving product performance by developing MR-MUF materials. This proves the importance of materials. In the future, there are more packaging challenges for high-speed memory products such as HBM, and I plan to announce Need for material development to satisfy them.

※ Biography

5:20 pm - 5:50 pm

Sungjun Park

Executive Vice President and Head of Material Development Team

Samsung Electronics

Big Challenges for Small Worlds

The number of transistors in semiconductor chip has been increased twice every two years for more than 50 years, following the famous Moore’s Law and somehow, it was taken to be granted. In reality, it was a big accomplishment with an unimaginable amount of efforts and collaborations, including the development of new materials.

New material has been developed and introduced to improve the performance and capacity of electronic devices through smaller design rules. New Photo Resists (PR) for higher resolution with smaller defects and higher uniformity were developed. And Precursors were also developed to meet the process challenges for the smaller design rules, such as higher aspect ratios. High etch selective Etchant and CMP Slurry with low scratch were requested. And the requirements in new materials are getting tougher and stronger with the evolution of AI, which needs more computing power than ever. Even materials that has never been expected in industry and has been studied only in academia are being actively considered.

Even the worse, the surrounding situation for material development and manufacturing is getting tougher. Environmental regulations are getting tighter. Gases with high global warming potential were begun to be replaced. Recently, EU announced banning PFAS materials in near future and US raised bars for PFAS materials. And carbon zero policy is coming to us slowly but firmly.

In this talk, we will discuss the current status and future direction of material research. We will discuss the development directions to improve the performance of devices and to consider environmental regulations. And we will discuss the virtue of working together as a big one-team to overcome all the obstacles mentioned above in the world of extreme technology.

※ Biography

Materials Resilience: Navigating Challenges, Embracing Opportunities

Currently, sustainablility and efficiency of global supply chains are becoming more critical to the semiconductor industry. Global political tensions are affecting the semiconductor market, which is further revealing the vulnerabilities of the supply chain. In addition, ongoing environmental regulations are also having an increasing impact on the industry. The growing demand for eco-friendly products and manufacturing processes puts companies under pressure to introduce innovative technologies and solutions along with this regulatory compliance.
These trends present new challenges and opportunities for the semiconductor industry. SMC Korea reflects these issues and discusses current market conditions and future prospects. Through this conference, we expect major companies and experts will be able to share their experiences and knowledge, find innovative solutions together, and explore the future of the industry together. Don't miss these up-to-date discussions presented by global experts.

SMC (Strategic Materials Conference) Korea 2024

May 29(Wed), 2024 | Convention Hall 2, 3F, Suwon Convention Center

Arjen Janssens, Senior Director PLD, Lam Research Corporation

Arjen Janssens initially worked on Pulsed Laser Deposition (PLD) during his Master’s Degree in Applied Physics at the University of Twente in 2001, and then during his internship at Stanford University on superconducting thin films.

Arjen started his career as a strategic consultant at Arthur D. Little, and after a year become a shareholder and consultant of Quintel Management Consultancy (spin-out of Arthur D. Little). In 2004 he started studying for his PhD. at the University of Twente, focusing on depositing Piezo materials with PLD. During his PhD, he completed the Executive MBA at TSM Business School of Technology, and co-founded Solmates. Currently Arjen is Senior Director PLD at Lam Research and is very proud of how the PLD technology has matured into a high-volume production system at Lam.

United States

Dr. Arjen Janssens

And yes, we’ve got a solution for that.

MEMS devices have become well established as critical components in a wide range of everyday applications. Accelerometers and gyroscopes improve safety in automotive applications, RF filters enable wireless connectivity in mobile phones, and MEMS microphones are at the heart of voice control technologies that connect us to an ever-increasing range of smart, consumer products.

Developers are now looking to the next generation of MEMS devices that will enable new applications and improve the performance of existing solutions. Capacitive based MEMS devices have proven to be highly successful, but after significant improvements of both design and manufacturing it is becoming increasingly difficult to improve their performance. To overcome this challenge, designers are looking to Piezoelectric based MEMS devices that can offer a paradigm shift in capability.

In this webinar, discover Lam Research’s solution– a pioneering approach to thin film deposition.

SiC—Silicon Carbide Webinar #3: Bidirectional SiC and GaN Switch Technology

There are numerous mass volume power applications where it is necessary to control the flow of bidirectional power, including electric vehicles (vehicle to grid, vehicle to home, and vehicle to vehicle), distributed and grid-tie power systems using regenerated energy and/or energy storage components, and solid-state circuit breaker protection. Silicon carbide (SiC) and gallium nitride (GaN) based bidirectional power switches can enable these applications with their compelling advantages of high efficiency, high blocking voltage capability, and low system weight and volume.  In particular, monolithic switches that allow for bidirectional symmetric conduction and voltage blocking with a chip area close to that of a similarly rated unidirectional switch are ideally suited to fuel a revolution in power electronics technology. Today, monolithic bidirectional (MBD) power semiconductor switches are not commercially available. Instead, back-to-back (anti-series) connection schemes of unidirectional power MOSFETs or IGBTs are typically used, resulting in a 4X penalty in chip area and high cost. However, various types of SiC and GaN bidirectional concepts are being investigated including bonded-wafer bidirectional IGBTs, monolithic dual-gate bidirectional GaN switches, and monolithic back-to-back connected SiC MOSFETs and JFETs.

In this presentation, the semiconductor technology of SiC and GaN bidirectional switches will be reviewed including their operating principles, and their lateral and vertical geometry configurations. The performance advantages of MBD switches will be highlighted. Promising MBD devices reported to date will be analyzed, and the key bidirectional switch applications of solid-state circuit breakers and current-source-inverters will be discussed. As SiC and GaN devices approach mass commercialization propelled by insertion in electric vehicles and consumer electronics, respectively, fabrication of SiC/GaN MBD switches is becoming economically viable enabling their wide adoption in key volume applications. 

View other webinars in the SiC Series

• Webinar #1—Silicon Carbide Material Properties, Key Applications, and Fabrication Basics: Making the Transition from Silicon
• Webinar #2—Non-CMOS Compatible SiC Power Device Fabrication in Volume Si Fabs
• Webinar #3—Bidirectional SiC and GaN Switch Technology 
• Webinar #4—Understanding SiC Chip Cost, the Impact of Defects, and the Case of Price Parity with Si at the System Level 
• Webinar #5—SiC Edge Termination Technology

Meet the Speaker

Biography

United States

Victor Veliadis, PhD

Executive Director and Chief Technology Officer,

PowerAmerica

Now Available On-Demand!

Join us online for the third webinar in the Silicon Carbide Series as we review the semiconductor technology of SiC and GaN bidrectional switches, analyze promising MBD devices, and discuss the key bidrectional switch applications of solid-state circuit breakers and current-source-inverters. 

SiC—Silicon Carbide Webinar Series

Webinar #3: Bidirectional SiC and GaN Switch Technology
February 21, 2023
9:00-10:00 AM Pacific Time

Updated time:

Day 1: 8:30 am - 5:30 pm PT
Day 2: 8:30 am - 12:30 pm PT

Registration will be closed at 12:00am on May 7.

Learning Objectives:

• Gain a comprehensive understanding of the semiconductor industry and the manufacturing process, design and eco-system of the semiconductor industry and understand the jargon, tools, and materials used in the design and fabrication of an IC
• Effectively be able to communicate semiconductor manufacturing concepts with other associates and industry professionals

Who Should Attend:

• New personnel entering the field
• Any one wanting an understanding of semiconductor manufacturing

Course Topics:

• Basic electronics and microelectronics terms and definitions
• Microelectronics and the role of integrated circuits
• Define process nodes : explanation of process nodes and how they relate to device performance and cost
• Device physics and transistor operation: understanding of the physical principles behind device operation and the functioning of transistors
• Crystal growth and wafer prep: overview of crystal growth techniques used in semiconductor manufacturing
• Explanation of wafer preparation techniques and materials used
• FDSOI, fin fets, gate all around (GAA) transistors
• Circuit design and layout
• Mask making techniques and materials used in lithography
• Clean rooms
• Lithographic techniques
• Plasma etch, wet etch and cleaning processes
• Ion implantation
• Diffusion techniques
• RTP, CVD, ALD, ALE techniques and their impact on device performance
• Electro-plating, sputtering
• Testing
• Wire bonding
• Packaging techniques
• Metrology tools and applications
• The major players in the semiconductor ecosystem

Instructor:

Denny Frye 

Course Instructor

PT International, LLC

Biography

SEMI Headquarters
673 S Milpitas Blvd
Milpitas, CA 95035
United States

The purpose of this course will provide a comprehensive understanding of the semiconductor industry and the manufacturing process of an integrated circuit (IC). The course is designed for new personnel entering the field or individuals who are looking for a well-rounded understanding of all the jargon, tools, and materials used in the IC manufacturing process.

Limited time offer!

• Members: $1295 $1195
• Non-members: $1495 $1395
• Students/Veterans: $1195 $1095

* For group orders with 10+ attendees, and for Students/Veterans discounted pricing, please contact [email protected]
* Coffee, refreshments, and lunch will be provided for all attendees, ensuring a satisfying and energizing experience throughout the day.

Overview of Semiconductor Manufacturing

In-person training
Location: Milpitas, CA

Samsung Electronics Campus
3655 N First Street
San Jose, CA 95134
United States

The Heterogeneous Integration Roadmap activities are sponsored by IEEE Electronics Packaging Society (EPS), SEMI, IEEE Electron Devices Society (EDS), IEEE Photonics Society and the ASME EPPD Division with the intention of expanding the roadmap collaboration to other IEEE Technical Societies that share interest in the Heterogeneous Technology Roadmap as well as to organizations outside IEEE that share this common vision for the roadmap. A document with definition of the mission, purpose, structure and governance for this Heterogeneous Integration Roadmap program was prepared and approved.

San Francisco
United States

UCLA
Los Angeles, CA
United States

SEMI MSIG PNT Gap Analysis Workshop

Learn About Phase 2 of the Positioning, Navigation and Timing (PNT) Funding Program

Kevin (Cheng-Hao) Ko received his Physics Ph.D. from State University of New York, Stony Brook (SUNY, Stony Brook) in 1995. During his thesis research, he worked at Beamline X1A of the National Synchrotron Light Source (NSLS) at Brookhaven National Laboratory (BNL) to construct the world's first Mult-channel Scanning Photoemission Electron Microscope (SPEM) by focusing soft X-rays using a zone plate under the supervision of Prof. Janos Kirz. After receiving his Ph.D. degree, he was invited by Taiwan Nation Synchrotron Radiation Research Center (NSRRC) to lead a team to develop X-ray Microcopy technology in Taiwan. By 1999 Ko’s team had successfully developed the world’s most advanced SPEM. After that, Dr. Ko started to devote his efforts to developing the SpectroChip technology. After nearly 20 years of research and development, Ko’s team was finally able to mass produce the SpectroChip using wafer-based methodology and founded the company SpectroChip, Inc. This technology received 9 national best innovation awards in Taiwan and one international best application award in Asia. To enable further global business development of the SpectoChip technology, in 2023, Dr. Ko and Dr. Sean Lin founded SPU System Inc.

United States

Dr. Kevin (Cheng-Hao) Ko

SpectroChip is a breakthrough technology that integrates all the functions of an optical spectrometer on a chip with the size of half an SD card.  It is designed and fabricated using X-ray lithography and microelectromechanical systems (MEMS) technology.  The current chip module includes the slit, micro concave grating and mirror and has a spectral range from 300 to 1000 nm. SpectroChip technology has the advantage of high performance with high sensitivity and accuracy while achieving chip-size miniaturization.  This technology is being applied to the development of ultra-compact optical sensors and/or devices that can deliver real-time spectral data and analysis. Examples include novel optical sensor modules and ultra-compact, high-performance spectrophotometers capable of UV/VIS and florescence analysis for research lab and educational purposes.

In this webinar Dr. Ko will describe the SpectroChip technology, its integration into optical spectrum processing units, and real-world sensing applications in Health Care, Food Safety, and Semiconductor Processing and Metrology.