Micro-electromechanical systems (MEMS) are revolutionizing how humans interact with the world. Atomic layer deposition (ALD) can be an enabling technology to improve performance of existing MEMS architectures and developing future devices.
Due to their digital growth nature, ALD processes provide a discrete and reproducible amount of film in each cycle. Multilayered films can be deposited to tune physical properties of the films, including dielectric properties, such as dielectric constant, leakage current, and breakdown voltage. These “nanolaminate” barrier films can be produced by adding discrete layers of a 2nd metal oxide, like Al2O3 or ZrO2, to a primary dielectric, like HfO2. The multilayer technique can also be exploited to drastically improve moisture and oxygen barrier properties of ALD films over a bulk film and to tune the internal film stresses.
Whether using a single-wafer system or multi-wafer batch system, extremely low ALD deposition rates have made it difficult to implement ALD into high volume manufacturing. Another barrier to adoption of ALD in MEMS applications is the inefficiency of precursor usage, which leads to unacceptable operating costs.
In this webinar, Nano Forge will present how to use ALD to tune a few different thin film properties such as electrical barrier performance, gas diffusion barrier behavior, and internal film stress. A brief description of the differentiating features and product offerings in the ALDx toolset will also be discussed.
Forge Nano’s ALDx toolset offers the fastest and most efficient single-wafer system on the market, enabling ALD to be integrated earlier in the product development cycle.
In this webinar, Forge Nano will present how to use Atomic Layer Deposition (ALD) to tune a few different thin film properties such as electrical barrier performance, gas diffusion barrier behavior, and internal film stress. This approach overcomes the perception of ALD as a barrier to high-volume manufacturing and as a material intensive process. Join Paul Carey and Matt Weimer of Forge Nano to explore a new approach.
Dynamic Control of ALD Films for Fast & Efficient MEMS Manufacturing
A MEMS Manufacturing Webinar
8:00 am - 9:00 am
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FE15-Fundamentals of Electrochemical Aptamer-based Sensing
SEMI Members: $49
Use your corporate email address during log in to be recognized as a SEMI Member.
Non-Members: $99
Students: Free
Contact Gity Samadi ([email protected]) with a picture of your student ID to receive your discount code.
Recognition methodologies for electrochemical sensing of specific analytes have been developing over many years. Creating specificity over similar analytes has been a goal, as often similar shaped molecules can bind to the sensor alongside the targeted analyte.
One of the cutting-edge ways to enable targeted electrochemical sensing is to use single strand DNA or RNA molecules, also known as aptamers, as the biorecognition elements (BRE).
This seminar will provide insights into:
Overview of strategies for Biomolecular Sensing
Electrochemical based sensing
Optical based methods
Plasmonic resonance energy transfer (PRET)
Nanoparticle surface energy transfer (NEST)
Surface plasmon resonance (SERS) biosensors
Aptameric based sensing – key design elements to target analytes displayed in recent literature
Surface binding/functionalization approaches
Reporter/redox molecules to facilitate signal generation
BRE molecular structure dynamics
The seminar will be useful for the many researchers reviewing methods for effectively and reliably identifying science-based biomarkers for a wide range of diagnoses and reporting requirements for integration into products with a wide range of consumer and healthcare uses.
About the Featured Speaker
Jack Ly is a Program Manager and Research Scientist at UES, Inc. He received his PhD in Polymer Science and Engineering from the University of Massachusetts Amherst in 2018. At UES, Inc, he supports the Air Force Research Lab in designing, fabricating, and validating specialty polymers and analyte sensing chromophores for optical sensors. Most recent relevant published work involves fabrication of implantable, degradable phosphorescent O2 sensors.
Fundamentals of Electrochemical, Aptameric-based Sensors
10:00 am - 12:00 pm
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America/Los_Angeles
Future of Computing
SEMI Member: $175
Non-Members: $225
This Event is SOLD OUT
Cancellations received on or before October 4, 2024 will be fully refunded. After this date, only substitutions will be accepted.
Please email your cancellation request to Agnes Cobar at [email protected]. Refunds will not be issued for cancellations (including no-shows) made after October 2. Substitutes are only accepted with written permission from the original registrant.
As AI proliferates rapidly, AI models and datasets are also growing rapidly in size, giving rise to two fundamental challenges. First, this growth far outpaces performance improvement in hardware systems and infrastructure, and second, the energy consumption for AI continues to grow unsustainably.
These challenges are formidable and cannot be solved by one entity or in isolated silos. SEMI (www.semi.org), a global electronics industry association with 3300 member companies, is organizing this workshop under its Smart Data-AI Initiative. We are bringing together experts to discuss the latest innovations in the entire-AI ecosystem – including novel devices, 2D materials, analog computing, advanced packaging, chiplets, photonics, hardware-software co-optimzation and energy-efficient architectures & algorithms for data centers, cloud & edge.
Please join us on March 19th in Milpitas, CA. We will start with an inspiring keynote from Tristan Holtam, GVP, CEO Chief of Staff, Corporate Strategy and Development, Applied Materials, and continue through the day with industry leaders (AMD, Arm, ASE, Google DeepMind, IBM, Intel, Lam Research, Mckinsey, Micron, Nvidia, Qualcomm, SK Hynix); exciting start-ups (Cerebras, LightMatter, Mentium) and leading-edge academic researchers (Stanford U. and U. of California). Together, let us explore collaborative, system-level solutions for sustainable progress in AI systems.
SEMI 673 S. Milpitas Blvd Milpitas, CA95035 United States
8:00 am
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8:30 am
Registration, Coffee/Tea + Pastries
8:30 am
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8:35 am
Welcome
Pushkar Apte, Smart Data-AI Lead and Strategic Technology Advisor, SEMI
8:35 am
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8:45 am
SEMI Perspective
Ajit Manocha, CEO, SEMI
8:45 am
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9:30 am
Accelerating Energy-Efficient Computing
Tristan Holtam, GVP, CEO Chief of Staff, Corporate Strategy and Development, Applied Materials
9:30 am
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10:00 am
Future of Computing Landscape- Opportunities and Challenges
Jim Sexton, Fellow, IBM
10:00 am
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10:15 am
Coffee Break
10:15 am
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11:30 am
Chair/Moderator: Gity Samadi, Senior Director of R&D Programs, SEMI
David Fried, Corporate VP, Lam Research
Eric Pop, Pease-Ye Professor of Electrical Engg., Stanford University
Geoffrey Burr, Distinguished Research Scientist, IBM Research
Saif Islam, Professor, Dept. of Electrical & Computer Engg., U. of California, Davis
Ashonita Chavan, Distinguished Member of Technical Staff, Micron
11:30 am
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11:40 am
SEMI Technology Communities
Melissa Grupen-Shemansky, VP & CTO, SEMI
11:40 am
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12:55 pm
Chair/Moderator: Melissa Grupen-Shemansky, SEMI
Steve Klinger, LightMatter, VP of Product
Jaesik Lee, VP of Package Engineering, SK Hynix
Debendra Das Sharma, Senior Fellow, Intel and Chair of UCIe & CXL Consortium
Boris Vaisband, Asst. Professor, UC Irvine
12:55 pm
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2:00 pm
Lunch
2:00 pm
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2:10 pm
Market Overview for AI
Wendy Zhu, McKinsey & Co.
2:10 pm
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2:20 pm
SEMI Smart Data-AI Initiative Overview
Pushkar Apte
2:20 pm
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3:35 pm
Chair/Moderator: Jim Sexton, IBM
Evgeni Gousev, Senior Director, Qualcomm; and Chair, Board of Directors, TinyML Foundation
Mirko Prezioso, CEO, Mentium
Wilfred Gomes, CEO, Mueon
Chloe Jian Ma, Vice President, Arm
3:35 pm
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3:45 pm
Coffee Break
3:45 pm
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5:00 pm
Chair/Moderator: Pushkar Apte, SEMI
JP Fricker, Founder and Chief System Architect, Cerebras
Hetero Integration, High Performance Computing and AI
Xin Wu received PhD and MSc from University of California Berkeley USA and Peking University, China, respectively. Since 1993, he has worked in Xilinx (acquired by AMD in 2022) from 0.6um till 2nm generations of technologies and products, from many foundries and suppliers. His responsibilities include silicon, hetero-integration, advanced packaging, thermal mechanical solutions and many other technologies development.
Mr. Moon is currently working as a technical leader (VP) for package technology development, in SK hynix. He has more than 25 years’ experience in semiconductor package development including wafer level, flip chip and 2.5D/ 3D packaging as well as conventional package.
He previously served as package development project manager for package material, process and equipment until assuming his current role in 2022. And he has been involved in the development and mass production of NAND Flash, DRAM/ Mobile, MCP, RDL, Flip chip, WLCSP and TSV.
He received degree in chemistry from Sogang University in Seoul, Korea.
The next wave of Semiconductor Innovation – Multi-die system solution
Donghan Kim is a leader of Strategy Collaboration Solution Development at Synopsys Korea. He is responsible for leading 2.5D and 3D multi-die system solution business aiming to offer a complete end-to-end solution for efficient multi-die system integration.
He has more than 20 years of experience in semiconductor industry and has worked extensively on SOC mobile chip designs such as Exynos series at Samsung Electronics. He had a strong track record of successfully developing modem, WiFi and Bluetooth chipset products.
He received MS degree in electronic engineering from Sogang university in Seoul Korea where he did research topics on wireless communications and Semiconductor.
10:30 am
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11:00 am
Stefan Chitoraga
Technology and Market Analyst, Packaging and Assembly
Yole Group
Status of High-End Performance Packaging (2.5D & 3D) - Technology and Market Trends
Stefan Chitoraga is a Technology and Market Analyst specializing in Packaging and Assembly at Yole Intelligence, part of Yole Group. Within the Semiconductor, Memory & Computing division at Yole, Stefan is focused on advanced packaging platforms and processes, substrates, and PCBs. He is involved daily in the production of technology & market reports and custom consulting projects.
Prior to Yole, Stefan served as a Package Design Engineer at Teledyne E2V for 4 years, where he was in charge of the ceramic package and glass lid development for image sensors, developing mechanical design, routing, electrical and thermal simulations.
Stefan holds a Bachelor’s in Electronics and Computer Science for Industry Applications from the Polytech Grenoble (France).
Jongsoo Choi, Ph.D. was appointed as head of marketing strategy part at Business Development Team of AVP Business, Samsung Electronics in December 2022, after completing Advanced PKG Task Force for six months. Before his new role, Dr. Choi was responsible for SoC product marketing as a director at System LSI Business from 2014.
Prior to joining the System LSI, Dr. Choi was Principal Engineer, and has led 4G mobile communication standards project at DMC R&D Center (now Samsung Research) since he joined Samsung Electronics in 2005, where he contributed to the 3rd Generation Partnership Project (3GPP) specifications which cover cellular telecommunications technologies, and also served as a vice chairman of 3GPP TSG GERAN from 2007 to 2011.
Dr. Choi received a Ph.D. degree in Electrical Engineering from the University of Ottawa, Ontario, Canada, where he focused research topics on wireless communications and adaptive signal processing.
Interconnect via scaling and challenges with hybrid bonding
Dr. Vikas Dubey, is a senior scientist at Fraunhofer ENAS since 2021 with system packaging department. He is into advanced system packaging for more than 10 years. He is currently leading the research activities related to hybrid bonding, collective die to wafer bonding and several other wafer bonding technologies for MEMS/NEMS integration. Besides, in his current role he is directly responsible for project acquisition, managing public and industrial projects and related to advance system integration, hybrid wafer bonding and assembly.
Prior to joining Fraunhofer ENAS he worked as a technology manager at national nanofabrication center (NNFC) at Indian Institute of Sciences, Bangalore. During his time at APTIV services located in hungary, he was responsible for several six sigma projects which lead to million of euros in earnings.
Dr. Dubey received his PhD degree from materials engineering department from KU Leuven, where he worked at imec with his research focused on self-aligned assembly for fine pitch integration.
3:00 pm
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3:30 pm
Dongshun Bai
Senior Technologist & Business Development Director
Brewer Science
Novel Materials for Advanced Packaging
Dongshun Bai, Ph.D. has been with Brewer Science, Inc. since 2007. Dongshun works as the Senior Technologist & Business Development Director in the Packaging Solutions Business Unit, in charge of technology roadmap direction of new material development for advanced packaging. He also leads the Business Development team and oversees the global business activities for advanced packaging materials.
Dongshun spent his first 10 years at Brewer Science in its Advanced Technologies R&D group. Working as Senior Program Manager and Senior Scientist, he led an R&D team focused on material design and development for advanced packaging. Many materials developed by his team went to commercialization and became the major products in the portfolio.
Dongshun earned a Ph.D. degree in Chemical Engineering from Vanderbilt University, Nashville, TN, USA and a Master of Engineering degree in Chemical Engineering from the National University of Singapore. Dongshun has published numerous papers and patents and delivered many talks, including invited talks at international conferences. He currently serves as a technical committee member for IMAPS and EPTC.
SeokHo Na joined Amkor Technology Korea in 1996 and worked for R&D engineer until now with responsibility of semiconductor material & process development. Major work is chip to substrate interconnection technology development such as wire bonding, Material Characterization, Flip Chip package CIP (chip to package interaction) and LAB (Laser Assisted Bonding) technology.
Prior to joining Amkor Technology Korea, Na received a bachelor’s degree and master’s’ degree in Material Science & Technology from Yeungnam University, Korea
The Advanced Packaging Summit is a conference dedicated to exploring the latest advancements in packaging technology for high-performance computing (HPC) and interconnection. The summit brings together leading experts, researchers, and industry professionals to share their insights and experiences on advanced packaging solutions that enable high-density, high-bandwidth, and low-latency interconnects for HPC systems. Topics covered at the summit include 3D packaging, hybrid bonding, LAB(Laser Assisted Bonding), heterogeneous integration, supply chain management, and more. Attendees will gain valuable insights and have the opportunity to network with experts in the industry.
Advanced Packaging Summit 2023
September 5(Tue), 2023 | Hall 3, Suwon Convention Center
9:00 am - 5:30 pm
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Add to Calendar2023-09-05 09:00:002023-09-05 17:30:00Advanced Packaging Summit 2023The Advanced Packaging Summit is a conference dedicated to exploring the latest advancements in packaging technology for high-performance computing (HPC) and interconnection. The summit brings together leading experts, researchers, and industry professionals to share their insights and experiences on advanced packaging solutions that enable high-density, high-bandwidth, and low-latency interconnects for HPC systems. Topics covered at the summit include 3D packaging, hybrid bonding, LAB(Laser Assisted Bonding), heterogeneous integration, supply chain management, and more. Attendees will gain valuable insights and have the opportunity to network with experts in the industry.Suwon Convention Center South KoreaSEMI.org[email protected]Asia/Seoulpublic
Asia/Seoul
DISCOVER APS 2025
SiC—Silicon Carbide Webinar #4: Understanding Sic Chip Cost, the Impact of Defects, and the Case of Price Parity With Si at the System Level
Silicon devices are dominating power electronics due to their excellent starting material quality, streamlined fabrication, low-cost volume production, proven reliability and ruggedness, and design/circuit legacy. Although Si power devices continue to make progress, they are approaching their operational limits primarily due to their relatively low bandgap and critical electric field that result in high conduction and switching losses, and poor high temperature performance.
SiC power chips are gaining significant market share and are projected to capture over 30% of the power chip market by 2029. Their cost, however, remains above that of similarly rated silicon chips and increases disproportionately with area. In this presentation, various elements of SiC chip cost will be qualitatively analyzed including contributions of substrate, epitaxy, and chip manufacturing. Material defects will be discussed in terms of their impact on chip area scalability and yields, and wafer test maps will be presented to elucidate their correlation. Finally, the case of system-level price parity between Si and SiC will be made, achieved primarily through reduced mass and volume of magnetic components, and simplified thermal management
View other webinars in the SiC Series
Webinar #1—Silicon Carbide Material Properties, Key Applications, and Fabrication Basics: Making the Transition from Silicon
Webinar #2—Non-CMOS Compatible SiC Power Device Fabrication in Volume Si Fabs
Webinar #3—Bidirectional SiC and GaN Switch Technology
Webinar #4—Understanding SiC Chip Cost, the Impact of Defects, and the Case of Price Parity With Si at the System Level
Join us online for the fourth webinar in the Silicon Carbide Series—Understanding SiC chip cost, the impact of defects, and the case of price parity with Si at the system level.
SiC—Silicon Carbide Webinar Series
Webinar #4: Understanding Sic Chip Cost, the Impact of Defects, and the Case of Price Parity with Si at the System Level
June 6, 2023
9:00-10:00 AM Pacific Time
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This is an FOA Members Only Event - For questions on membership or anything FOA-related contact us at [email protected]
Device Maker Morning Meeting and Speed Networking Event
9:00 am - 5:00 pm
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Device Maker Morning Meeting and Speed Networking EventMoscone Center San Francisco, CA United StatesSEMI.org[email protected]America/Los_Angelespublic
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Add to Calendar2023-10-16 00:00:002023-10-18 00:00:00Fundamentals of Product MarketingMilpitas, CA 95035 United StatesSEMI.org[email protected]America/Los_Angelespublic
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Add to Calendar2023-09-27 00:00:002023-09-29 00:00:00Key Semiconductor Account Selling & ManagementMilpitas, CA 95035 United StatesSEMI.org[email protected]America/Los_Angelespublic
Atomic Layer Deposition (ALD) Solutions for MEMS and Actuators
Micro-electromechanical systems, or MEMS, constitute many devices that combine electrical and mechanical components, range in size from a few microns to millimeters, and are often fabricated using traditional semiconductor manufacturing processes. ALD builds material up Angstroms at a time with high conformality, even on complex geometries.
For MEMS and Sensor fabrication, including inkjet heads, pressure sensors, and microfluidics, ALD offers the most precision deposition technique on the market. Beneq ALD solutions include a wide range of materials and processes, making it simple to coat tiny, complicated components with anti-stiction, piezoelectric, or barrier films.
Atomic Layer Deposition (ALD) Solutions for MEMS and Actuators
An MSIG Sensors Manufacturing Webinar
8:00 am - 9:00 am
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Dr. Sreeni Rao has been in the MEMS sensing and semiconductor sector for the last 25 years, and has previously held technical and business leadership positions at Texas Instruments, IBM, Analog Devices, Qualtre, Inc., TDK and currently is GM, Gas and Environmental Sensing at Interlink Electronics. He has a PhD in ECE from University of California, Irvine and an MBA from Northeastern University.
Radislav Potyrailo is a Principal Scientist at GE Research and the Chair of the Device Working Group of the MEMS and Sensors Industry Group. Radislav has been leading multiple programs for gas, chemical, and biological detection on inventing new sensing systems and bringing them from lab feasibility studies, to field validation, and to commercialization. He has MS degree in Optoelectronics from Kyiv Polytechnic Institute and PhD in Analytical Chemistry from Indiana University.
Ryotaro Sakauchi is a Senior Manager at Robert Bosch LLC and is responsible for Business Development of Bosch Sensortec’s MEMS sensors for the consumer market. He has been in the MEMS sensor sector for the last 13 years and has previously held technical and business positions at Bosch’s USA and Japan locations. He has a Bachelor’s degree of Liberal Arts from International Christian University in Japan.
As miniature gas sensors become increasingly popular, especially for emerging applications, it is important for the gas sensor device community to adhere to standard ways of describing them. We propose that the first step in doing so is to standardize the set of functional parameters thatform the core of a gas sensor specification.
This presentation dives into the basic list of parameters, their definitions and measurement units, and where applicable, testing procedures, that we recommend be part of a standard gas sensor datasheet.
Gas Sensor Standard Overview - SEMI MS14
A SEMI Standards STEP Course
12:00 am - 12:00 am
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