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United States

Standards

Traceability NA TC Chapter Meeting 

 

Time:
Friday, March 20, 2026
1:00-2:00 PM Pacific

via Web Conference

 

AGENDA 

(subject to change)

Last updated: March 4, 2026

 

NOTE:

Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.

If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!

1:00 pm - 2:00 pm Off Add to Calendar 2026-03-20 13:00:00 2026-03-20 14:00:00 Traceability NA TC Chapter Meeting 2026 Traceability NA TC Chapter Meeting  Time:Friday, March 20, 20261:00-2:00 PM Pacificvia Web Conference AGENDA (subject to change)Last updated: March 4, 2026 NOTE:Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today! United States SEMI.org [email protected] America/Los_Angeles public America/Los_Angeles

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Michelle Sun
Coordinator, International Standards Operations

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Date: November 13, 2025 Location: San Jose, California

yieldWerx, a leading provider of end-to-end semiconductor test data and yield analytics, today announced a strategic collaboration with iTest, a premier independent IC testing laboratory based in Silicon Valley. This partnership integrates yieldWerx’s enterprise-grade analytics platform directly into iTest’s production environment, enabling customers to access advanced data visualization, AI-powered analytics, and automated workflows—right from within the test lab, eliminating the need for complex integrations or data transfers.

The collaboration bridges a long-standing gap between test execution and data intelligence. By combining iTest’s high-performance testing capabilities with yieldWerx’s unified analytics engine, semiconductor customers will benefit from:

  • Real-Time Insights at the Source: Access dashboards, correlation analytics, and SPC control directly within iTest’s secure lab environment.
  • Accelerated Engineering Feedback: Automated lot dispositioning and outlier detection speed up yield learning and process optimization.
  • Remote Data Access & Collaboration: Engineers can securely access test data from their offices to support product engineering and test program development.
  • Faster Time-to-Market: Enterprise-grade analytics that once took months to implement are now available within days.
  • Enhanced Collaboration & Transparency: OEMs, fabless companies, and foundries gain shared visibility across data silos, improving decision-making and accountability.
  • Upskilling Opportunities: iTest customers can leverage industry-standard tools and methodologies, reducing the need to reinvent analytics processes.

    About yieldWerx

    yieldWerx’s platform unifies heterogeneous data across wafer sort, final test, and assembly into a centralized repository, offering AI-driven pattern analysis, adaptive limit setting, and root-cause correlation across product lines and sites. More importantly, it allows iTest customers to perform correlation, characterization, and Gage R&R Analysis.

    About iTest

    iTest operates one of North America’s most advanced semiconductor test facilities, equipped with ultra– high-density configurations and cutting-edge automated test systems for digital, high pin-count, and HPC/AI devices.

    Statements from Leadership

    “This collaboration marks a new era in operationalizing advanced test data analytics within leading test labs,” said Aftkhar Aslam, CEO of yieldWerx. “By embedding our platform into iTest’s environment, customers gain immediate, secure access to analytics that previously took months to deploy—reducing decision latency, lowering risk, and accelerating time-to-market.”

    “Partnering with yieldWerx enhances iTest’s service offering by delivering actionable intelligence alongside world-class testing,” said Rabbi Islam, CEO of iTest. “Together, we’re giving customers a faster path from data to decisions.”

    For further information, please visit https://www.yieldWerx.com or https://www.iTestinc.com/.

The Challenge

Ayar Labs’ engineering teams faced challenges ingesting and analyzing non-standard test data across electro-optical and final test flows while scaling to meet aggressive go-to-market timelines. They sought a test analytics partner capable of loading, validating, and extracting insights from diverse datasets while supporting real-time alerting, yield recovery, and deep engineering analytics.

The Implementation

Week 1–2: Connecting the Pipes

Within the first two weeks, a secure cloud instance of yieldWerx was deployed, and raw data files were streaming in. The platform’s flexible pipelines ingested test data without custom code. The yieldWerx team went further, helping refine business rules, improve data quality, and enrich the information for greater downstream impact.

Week 3: First Insights

By week three, live dashboards were operational. Engineers could view wafer maps, outlier signatures, and correlations that previously required manual effort and scripting. Instead of working across multiple spreadsheets, they now had traceable, drill-down analytics at their fingertips.

Week 4: Real Results

In less than a month, the system was already supporting real yield decisions. Lots that previously required lengthy reviews were dispositioned in hours. Engineers trusted the analytics, and leadership recognized the tangible impact on quality and time-to-market. Ayar Labs is now preparing to onboard additional data formats, including qualification, reliability, and characterization.

The Outcome

The 30-Day Challenge demonstrated that yieldWerx is not just another analytics solution. In weeks, not months, yieldWerx moved from fragmented data to a unified platform that drives yield improvement, accelerates ramps, and reduces risk.

About yieldWerx

yieldWerx, an industry leader in semiconductor yield management, provides a platform that enables manufacturers to collect, validate, and act on production data across the entire semiconductor manufacturing lifecycle.

About Ayar Labs

Ayar Labs, a leader in optical engines for co-packaged optics, is transforming AI infrastructure by accelerating data movement in scale-up networks. Its industry-first optical I/O solution enables customers to maximize compute efficiency and performance while reducing costs, latency, and power consumption. Based on open standards and optimized for AI training and inference, Ayar Labs’ optical interconnect solutions are backed by a robust ecosystem to easily integrate into AI systems at scale. Ayar Labs was founded in 2015 and is funded by domestic and international venture capital firms, as well as strategic investors including AMD, Applied Ventures, GlobalFoundries, Hewlett Packard Pathfinder, Intel Capital, and NVIDIA.

Statements from Leadership

“Our collaboration with yieldWerx gave us measurable results in just 30 days. Their platform ingested
our complex photonics data, and the insights have accelerated how we make yield and quality decisions.”

— Garth Thompson, CIO, Ayar Labs

“Partnering with Ayar Labs has been both inspiring and validating. Photonics test data is some of the most complex in the industry, spanning electrical, optical, and multi-dimensional signatures that traditionally take months to integrate. Delivering measurable results in just 30 days shows the power of a unified, modern analytics platform. We’re proud that yieldWerx is helping Ayar Labs accelerate their roadmap, improve yields, and bring truly groundbreaking optical I/O technology to market faster and with higher confidence. “

— Aftkhar Aslam, CEO, yieldWerx
For further information, please visit https://www.yieldWerx.com or https://ayarlabs.com/.

Registration

Standards meeting registration is free, but is required for both in-person and virtual. Coffee and tea will be provided. ASMC event and lunch are not included.

For those planning to participate remotely, please select the virtual option during registration.

ASMC Registration Discount
As a SEMI Standards Program Member, you have the option to register for ASMC at a discounted rate. ASMC registration is separate from Standards meetings. 

ASMC POSTER SESSION NETWORKING EVENT

Mingle with ASMC attendees after Tuesday's meetings!
Tuesday, May 12 | 5:30-7:30 PM ET

How do I participate in the meetings?

  • To participate in the meetings, you must be a SEMI Standards Program Member.
  • Membership is FREE
  • Complete the Application Form to become a Standards Program Member.
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Hotel

Hilton Albany

Limited spaces are available at the Hilton Albany. Call the reservation line at +1(800) 445-8667 and provide code “4ASMC” to book a reservation.

Deadline: Tuesday, April 21

Hotels near Hilton Albany: 

Click here for a full list of hotels in Downtown Albany.

Hilton Albany

Hilton Albany
40 Lodge St
Albany, NY 12207
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Only TC Chapter Meetings are listed. Please refer to FULL SCHEDULE for all other meetings.

TUESDAY, MAY 12

9:00 am - 12:00 pm

Facilities & Gases Joint North America Technical Committee Chapter Meeting

1:00 pm - 4:00 pm

Liquid Chemicals North America Technical Committee Chapter Meeting

WEDNESDAY, MAY 13

9:00 am - 4:00 pm

Information & Control North America Technical Committee Chapter Meeting

9:00 am - 12:00 pm

Physical Interfaces & Carriers North America Technical Committee Chapter Meeting

THURSDAY, MAY 14

8:00 am - 5:00 pm

Environmental, Health & Safety North America Technical Committee Chapter Meeting

1:00 pm - 3:00 pm

Metrics North America Technical Committee Chapter Meeting

Times are listed in ET (EasternTime).

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Join us for the SEMI Standards Spring Meetings IN-PERSON + VIRTUAL!

co-located with ASMC
 

Note | Some Technical Committees + Task Forces will meet virtually outside of this Meeting set. Visit the Standards Calendar for details.

FULL SCHEDULE | PDF | XLS |

All meetings are in Eastern Time.
Subject to change, please check back frequently.
Last updated: May 13, 2026

 

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Save the Date!

SEMI Standards Meetings in conjunction with SEMICON West
October 12-15, 2026 @ Moscone Center, San Francisco, California

Contact

Kevin Nguyen
Sr. Manager, International Standards Operations
(EH&S)

Laura Nguyen
Sr. Coordinator, International Standards
(Facilities, Flexible Hybrid Electronics, Gases, Liquid Chemicals, MEMS/NEMS, Physical Interfaces & Carriers, 3D Packaging & Integration)

Michelle Sun
Coordinator, International Standards
(Information & Control, Metrics, Traceability)

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United States

Sustainability

SEMI Sustainability, in collaboration with STX Group, hosted a webinar on Internal Carbon Pricing (ICP) for the semiconductor value chain. The session was anchored in a new industry report developed with input from members of SEMI’s Carbon Pricing Workgroup and will feature speakers from ASML, Delta Electronics, and Lam Research.  The webinar  highlighted the 5 key steps in creating and implementing your own ICP plan, and understand the process, its benefits and the opportunities offered.

The presentations explored key insights from the report alongside SEMI member perspectives, with speakers sharing practical examples and lessons learned—from early exploration to applied approaches—across the semiconductor value chain. 

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LOS ANGELES (Jan. 28, 2026) – EMASS, a Nanoveu subsidiary specializing in next-generation semiconductor technology, today announced the successful tape-out of its 16nm ECS-DoT system-on-chip (SoC). The device has entered fabrication at TSMC, marking the transition of EMASS’s next-generation ultra-low-power edge AI architecture from final design into production silicon.

The 16nm ECS-DoT represents a process-node and architectural scaling of EMASS’s proven 22nm ECS-DoT platform, increasing compute density, memory bandwidth and system integration while preserving the ultra-low-power design principles that define the ECS-DoT family. The move to 16nm enables higher logic density and tighter subsystem integration, supporting more complex always-on workloads within the same constrained power envelopes required at the extreme edge.

The current 22nm ECS-DoT SoC is EMASS’s commercially available platform and is actively being designed into customer products today, including applications across wearables, industrial sensors, asset tracking, smart infrastructure and other always-on edge use cases. This in-market traction provides a production-proven foundation for the 16nm ECS-DoT, enabling customers to scale existing designs to higher performance and integration without changing software workflows or system architecture.

By transitioning to 16nm, EMASS is able to expand on-chip SRAM capacity, integrate additional system-level functions and enhance AI and DSP acceleration without altering the underlying programming model or software toolchain. Wireless connectivity, dedicated AI accelerators and fine-grained power-management blocks are tightly coupled within a single SoC, reducing reliance on external components and enabling continuous, low-latency operation in battery-powered and energy-harvesting edge devices.

“Reaching tape-out confirms that our ultra-low-power edge AI approach scales cleanly to more advanced nodes,” shared Mark Goranson, CEO of EMASS. “The 16nm ECS-DoT is not just a faster or smaller device. It's proof that always-on intelligence can move into more demanding applications without breaking power, cost or system constraints.”

The 16nm ECS-DoT increases system capability while reducing external component dependency, allowing developers to build more intelligent edge devices with fewer tradeoffs. Key capabilities include:

Fully integrated BLE subsystem — Eliminates the need for external wireless ICs, reducing board area, bill-of-materials cost and design complexity.
Expanded on-chip memory — Supports larger AI models and higher-throughput workloads while minimizing off-chip memory access for improved efficiency.

Adaptive fine-grained power-management architecture — Optimizes energy use for always-on, battery-powered and energy-harvesting applications.

Dedicated object-detection accelerator — Offloads vision workloads to increase throughput and reduce inference latency for edge vision use cases.

Integrated floating-point unit (FP16/FP32) — Accelerates DSP and mixed-precision AI workflows while simplifying developer toolchains and code migration.

Despite the move to a 16nm process node, the ECS-DoT architecture maintains full software compatibility across generations. Developers can migrate applications between the 22nm and 16nm devices with minimal changes, preserving existing investments while unlocking additional performance and system headroom. This continuity allows customers to scale functionality and intelligence over time without redesigning platforms or toolchains, accelerating time-to-market for next-generation edge products.

The tape-out of the 16nm ECS-DoT further strengthens EMASS’s “Atoms-to-Apps” development philosophy, aligning application needs, algorithm design and silicon implementation into a cohesive system-level approach.

“Tape-out validates years of architectural decisions,” said Dr. Mohamed Sabry, founder and CTO of EMASS. “With the 16nm ECS-DoT now in fabrication, we’ve demonstrated that our architecture can deliver higher integration and capability without sacrificing energy efficiency. This milestone positions EMASS to support a broader range of always-on edge AI applications while staying true to the fundamentals that define our platform.”

###

About EMASS
EMASS – a subsidiary of Nanoveu Ltd (ASX: NVU) – is an advanced semiconductor company specializing in ultra-low-power AI system-on-chip (SoC) solutions for edge computing. The company's flagship ECS-DoT chip delivers high-performance AI processing for vision, audio, and sensor data directly on-device, maximizing energy efficiency through its RISC-V architecture and non-volatile memory technologies. This always-on intelligence solution is optimized for power- and space-constrained applications including drones, wearables, healthcare devices and industrial IoT systems. For more information, visit nanoveu.com/emass.

About Nanoveu
Nanoveu is a listed company advancing human–machine experiences at the edge through a portfolio that spans ultra-low-power AI and glasses-free 3D technologies. Its subsidiary EMASS designs advanced system-on-chip (SoC) solutions that deliver efficient, scalable on-device AI for smart devices, IoT applications and 3D content transformation – enhancing Nanoveu’s reach across rapidly growing AI, edge computing and 3D content markets. EyeFly3D™ is Nanoveu’s end-to-end platform for glasses-free 3D, uniting proprietary screen technology with sophisticated content processing software and, now, EMASS’s ultra-low-power SoC to bring immersive 3D to a wide range of devices and industries. The Company also develops and markets an advanced range of self-disinfecting and hydrophobic films and coatings under the Nanoshield™ brand, designed for applications including large-scale CSP and photovoltaic solar installations. Together, Nanoveu’s businesses deliver practical innovation that makes devices smarter, environments safer and experiences more immersive.

Media Contact
Zach Hynoski
[email protected]
+1 (732) 581-6237

Oxford Instruments, a leading provider of advanced plasma processing solutions, today announced a plasma equipment supply agreement with Applied Optoelectronics Inc. (AOI) (Nasdaq: AAOI), a leading provider of advanced optical and hybrid fibre-coaxial networking products that power the internet, for several etch and deposition cluster systems at their facility in Sugar Land, Texas.

The agreement will support AOI’s transformative expansion and technological advancements in indium phosphide (InP) for optoelectronic device manufacturing, as the company rapidly scales to increase production capacity within the U.S.

As AOI undergoes a significant growth phase, the company is upgrading its production capabilities to meet increasing demand for high-performance InP optoelectronic devices. Oxford Instruments’ advanced plasma etch and deposition processing systems will play a key role in this transformation by supporting AOI with fully automated 3-4-6-inch capable production systems for InP processes.

“AOI is expanding its U.S. manufacturing capacity in Texas to support demand for our optical transceivers in AI datacentres, and key suppliers like Oxford Instruments will help us continue to upgrade our fully automated production line,” said Fred Chang, Senior Vice President and North American General Manager at AOI. “With our combined technology, we can speed the processing of multiple wafer sizes, ranging from 3 to 6 inches, while improving overall quality and reducing costs.”

“AOI has been a valued long-term partner, and we are thrilled to have earned their trust as the chosen supplier for their production expansion and technology upgrades. Our unique high-temperature Electrostatic Chuck (ESC) design, which enables advanced processing capabilities, was a key factor in their decision. AOI also conducted an extensive vendor qualification process, including a visit to our brand-new purpose-built manufacturing facility in Bristol, UK, where we received high praise for our technology and production capabilities,” said Emiel Thijssen, Vice President of Sales and Business Development USA, Oxford Instruments Plasma Technology. “We are also investing significantly to ensure we continue to deliver world-class service capability in the Texas region, focusing on the availability of spares and expanding our field service and process engineering teams, to support the rapid expansion of leading manufacturers in the region such as AOI.”

###


For media enquiries, please contact:
Grant Baldwin, Head of Marketing
Oxford Instruments Plasma Technology
E: [email protected]
About Oxford Instruments plc
Oxford Instruments provides academic and commercial organisations worldwide with market-leading scientific technology and expertise across its key market segments: Materials Analysis, Healthcare & Life Science and Semiconductors. Innovation is the driving force behind Oxford Instruments' growth and success, supporting its core purpose to accelerate the breakthroughs that create a brighter future for our world. The vigorous search for new ways to make our world greener, healthier and more productive is driving unprecedented levels of R&D investment in new materials and techniques to support productivity and decarbonisation worldwide, creating a significant opportunity for Oxford Instruments to grow.

Oxford Instruments holds a unique position to anticipate global drivers and connect academic researchers with commercial applications engineers, acting as a catalyst that powers real world progress. Founded in 1959 as the first technology business to be spun out from Oxford University, Oxford Instruments is now a global company listed on the FTSE250 index of the London Stock Exchange (OXIG).

For more information, visit www.oxinst.com

About AOI 
Applied Optoelectronics, Inc. (AOI) is a leading developer and manufacturer of advanced optical and HFC networking products that are the building blocks for AI datacentres, CATV and broadband fibre access networks around the world. AOI supplies this critical infrastructure to tier-one customers across cloud computing, CATV broadband, telecom, and FTTH markets. The company has R&D facilities in Atlanta, GA, and engineering and manufacturing facilities at its corporate headquarters in Sugar Land, TX, as well as in Taipei, Taiwan and Ningbo, China. For additional information, visit www.ao-inc.com. 

REGISTRATION

Registration is required for this FREE webinar.

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U.S. National Strategic Plan for Advanced Manufacturing: Virtual Town Hall for Semiconductor Manufacturing Inputs

Join us for a town hall event designed for semiconductor experts to help shape the future of federal research and development in advanced manufacturing. Participants will share insights to help define the priorities for the 2026–2030 National Strategic Plan for Advanced Manufacturing, which guides Federal efforts to enhance the competitiveness of U.S. manufacturing. 

The plan is revised every four years to provide new federal priorities in advanced manufacturing research and development, aiming to create jobs, boost economic growth across various sectors, and strengthen national security. This town hall session augments an online Request for Information (RFI), enabling participants to share their views and catalyze deeper input into priority areas.

The White House Office of Science and Technology Policy has posted the complete set of questions in the Federal Register HERE

The National Science and Technology Council’s Subcommittee on Advanced Manufacturing will manage the RFI process, and the NIST Office of Advanced Manufacturing will collect and analyze the information. 

Register and tune in on Tuesday, March 17, 2026 at 11am PT / 2pm ET!

Webinar—11am PT / 2pm ET
United States

March 17, 2026 | 11am PT / 2pm ET

Ben Kallen, SEMI
Ben Kallen
Sr. Manager, Public Policy & Advocacy,
SEMI

Opening Remarks

Robert Rudnitsky, NIST
Robert Rudnitsky, PhD
Division Chief, Strategy and Planning Division,
National Institute of Standards and Technology (NIST)

2026-2030 National Strategic Plan for Advanced Manufacturing

• Importance of U.S. Manufacturing
• Current - Background on 2022-2026 National Strategic Plan
• Future - Stakeholder RFI on 2026-2030 National Strategic Plan

Audience Input on RFI

Join us for a town hall event designed for semiconductor experts to help shape the future of federal research and development in advanced manufacturing. 

Off Add to Calendar 2026-03-17 00:00:00 2026-03-17 00:00:00 U.S. National Strategic Plan for Advanced Manufacturing: Virtual Town Hall for Semiconductor Manufacturing Inputs Join us for a town hall event designed for semiconductor experts to help shape the future of federal research and development in advanced manufacturing.  Webinar—11am PT / 2pm ET United States SEMI.org [email protected] America/New_York public America/New_York
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Advancing Thermal Scanning Probe Lithography

Zurich, Switzerland — Following the successful introduction of the modular NanoFrazor nanolithography system in 2024, Heidelberg Instruments is proud to announce the installation of the newest NanoFrazor. The system is equipped with the recent modules, enabling parallelized thermal scanning probe lithography (t-SPL). The beta site is hosted by the research partner EPFL, the Swiss Federal Institute of Technology in Lausanne, Switzerland. The installation marks a significant step forward in joint efforts to bring next-generation nanofabrication technologies into practice, promising advances in nanoscale research and applications.

Designed for high-resolution lithography down to 20 nm, with application flexibility and increased throughput, the system features parallelized t-SPL with ten heated tips writing simultaneously, Direct Laser Sublimation (DLS), and advanced automation. “Parallelizing t-SPL was the logical next step in advancing thermal nanolithography. The implementation, however, was far from trivial.” states Dr. Emine Cagin, CTO of Heidelberg Instruments Nano AG. “Parallelization required a decade of development, culminating in a new and scalable framework for electronics and software that now powers the new NanoFrazor.”

The new module, named the Decapede, increases the throughput up to tenfold, without compromising on high-resolution capabilities. “With improved throughput, we are considering upscaling grayscale nano surfaces that enable deterministic and localized strain engineering of 2D materials from chip-level to wafer-scale for potential industrial integration”, says Berke Erbas, Postdoctoral Researcher in the Microsystems Laboratory at EPFL. “We also aim to upscale grayscale nanoimprint lithography stamps fabricated through t-SPL and dry-etching approaches.”

EPFL — A Hub for Innovation
EPFL’s expertise in t-SPL and broad nanofabrication capabilities make it an ideal beta site and mark the continuation of a long-standing, trusted partnership with Heidelberg Instruments. The consortium of research groups involved brings together a combination of deep knowledge in t-SPL and diverse nanofabrication techniques, along with fresh ideas and challenging applications. The generous commitment to providing continuous feedback will help Heidelberg Instruments further validate the system performance and refine user interfaces.

From Nanoelectronics to Quantum Devices, a Look Ahead
The EPFL beta site is not only a testing and validation site for the system’s capabilities but first and foremost a catalyst for innovation in nanolithography. Applications at the EPFL beta site span nanoelectronics, plasmonics, quantum devices, and bio-nano-sensors. Jürgen Brugger, Professor in Microengineering and Materials Science at EPFL, highlights: “t-SPL has proven to be an excellent tool for educating junior researchers due to its capabilities for fast prototyping with a low threshold to create nano-patterns in short time scales. We are excited to expand towards parallel writing capabilities.” For example, the Laboratory of Nanoscience for Energy Technologies (LNET), Professor Giulia Tagliabue, is exploring the use of its gray-scale functionalities for realizing advanced metasurfaces that can strongly confine light at nanoscale dimensions for energy conversion and probing of interfacial processes.

We are looking forward to seeing how the beta site will accelerate discoveries and enable new possibilities in nanoscale science, both in research and educational use of the NanoFrazor system.

Further information: https://heidelberg-instruments.com/product/nanofrazor/

High-tech systems developer Demcon has established a local presence in North America by opening a new office in San Jose, California. The Dutch contract engineering company brings decades of expertise and know-how in hardware research, design and development to the heart of Silicon Valley, where software and AI are the main focus areas.

Hardware-centric development and engineering

The brand-new office will function as a local point of contact for US customers, delivering direct project management and system architecting support. The full Demcon engineering power in the Netherlands is available for early-phase concept development, engineering, prototyping and testing, with manufacturing as an optional service. Demcon has over 30 years of experience in systems engineering for high-tech solutions, in amongst others semiconductors, photonics and quantum technology.

Demcon’s capabilities range from fundamental and essential domains such as mechanics, mechatronics, software and electronics, to crucial additional competences in multiphysics simulation, thermal management, optics & vision, and data science & AI. "With our extensive group of engineers and specialists, we have the critical mass necessary to uphold an extremely high level in all these domains", says Amir Bar, general manager at Demcon USA. "For every customer project and every challenge they bring, we pick and choose the best possible team to find the optimal solution for our customers."

As a decades-long engineering professional in the American semiconductor industry, with leading roles at Applied Materials and KLA Tencor, Bar knows firsthand what Demcon has to offer: "With the focus on software and AI, there is a shortage in hardware engineers in the US. The Netherlands, home to some of the world’s leading hardware-centric semiconductor companies, have a much stronger base in that area. Through Demcon’s US office, American customers can tap into that potential."

Expanding horizons in the American market
For Demcon, the expansion in North America is very much a strategic decision. The company is already active in the US market for 20 years. "But we see ample room for growth", says Eric Slakhorst, Vice President Demcon high-tech systems. "The country is home to many potential large customers that prefer to keep their research and development close by. Often, they are challenged by time-to-market demands and capacity constraints. We set ourselves apart by offering the possibility to outsource part of their R&D, without the obligation to give away IP, and by our fast development cycle, from feasibility study to functional prototype in 12-15 months."

As our engineers are deeply embedded in the research process with our customers, proximity is key. "To ensure an optimal result, we need to be close, as regular face-to-face interaction is vital," says Slakhorst. "That’s why we are building an engineering hub in the US to support local partners with project management and system architecting. Detailed engineering can take place in the Netherlands."