Nijmegen, October 20, 2025 – Chip Integration Technology Center (CITC) will become part of TNO. This strategic move marks a significant step toward ensuring the long-term continuity and stability of CITC’s research and operations. The integration emphasizes TNO’s ambition to take a leading position in the innovation of chip packaging technologies and strengthen the regional semiconductor ecosystem in Nijmegen.

“In the coming years, TNO aims to play a key role in the development of advanced chip packaging in the Netherlands,” says Arnaud de Jong, director of High Tech Industry at TNO. “By integrating CITC into TNO, we can intensify and expand our research efforts. We also contribute to the further development of Lifeport in Nijmegen as a strong, future-proof semiconductor ecosystem.” With the investment in CITC, TNO connects chip technology activities between Nijmegen and other semiconductor hubs such as Eindhoven.

Advanced chip packaging
CITC was founded in 2019 by TNO and Delft University of Technology (TU Delft), among others, as an independent innovation center for advanced chip packaging technology. Within an ecosystem of companies, research institutions and educational organizations, CITC has developed into a broad R&D hub that collaborates on technological breakthroughs in advanced chip packaging.

“CITC’s integration into TNO marks a noteworthy moment for CITC. This step underscores our shared vision for the future of chip integration and packaging technology,” says Jeroen van den Brand, general manager of CITC in Nijmegen. “This provides room for growth, accelerates innovation, and strengthens CITC’s international position as a center of expertise for chip packaging.”

Strategic choice for Nijmegen
CITC’s integration into TNO will formally take effect on January 1, 2026. CITC will become part of TNO’s High Tech Industry business unit and will remain located at the Noviotech Campus in Nijmegen. Toni Versluijs, chairman of the CITC Supervisory Board: “CITC continues on its current course. For the Supervisory Board, it is essential that, with TNO’s ambition and investment, we secure continuation of the CITC activities, while building on the existing talent and technology and give CITC room to grow further.”

Lucas van Vliet, member of the CITC Supervisory Board on behalf of TU Delft: “The collaboration between TU Delft and TNO within CITC will change form as of January 1 but remains as strong as ever. TU Delft believes in the importance and growth potential of chip packaging and sees incorporating CITC into a strong organization like TNO as an opportunity to further accelerate innovation in chip technology.”

- ENDS -

About CITC
CITC is a non-profit, joint innovation center specializing in heterogeneous integration and advanced chip packaging technology. With the aim of bridging the gap between academia and industry, CITC has created an effective ecosystem where companies, research and educational institutions collaborate. CITC was founded in 2019 with strategic partners TNO and Delft University of Technology and is supported by the province of Gelderland and Nijmegen municipality. Located on Noviotech Campus Nijmegen, CITC is perfectly situated in the heart of the Dutch semiconductor industry.
www.citc.org

About TNO
TNO is the largest independent research and technology organization in the Netherlands and one of the largest in the EU. We innovate, investigate, and orchestrate, collaborating closely with governments, universities and the private sector. We inform government on policies and empower evidence-based decision-making through rigorous investigations, cutting-edge scientific insights, and reliable measurements. By building national and international consortia and ecosystems, we drive technological and methodological breakthroughs that help to realise a secure, sustainable, healthy, and digital society, and strengthen the earning power of the Dutch economy.
www.tno.nl/en/

Contact
Christian Ketelaars, Communications Manager
E [email protected]
M +31 (0)6 48 15 42 92

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Breker Donates Advanced Test Suite Components to RISC-V International for Use in Future Compliance Activities

• Donation includes open-source system integrity tests for core and SoC certification
• Unique Breker tests complements existing test sets
• Breker’s RISC-V SystemVIP will be demonstrated at booth #P4 during RISC-V Summit North America 2025

SAN JOSE, CALIF. –– October 16, 2025––Breker Verification Systems today announced a donation to RISC-V International of a subset of its RISC-V advanced test suite developed through its work with more than 20 RISC-V core producers.

The donation is designed to be complementary to the existing Architectural Compliance Test (ACT) and ongoing ISA compliance activities, consisting of unique tests not available from other sources.

Breker provides test suites for the complete verification of RISC-V cores and SoCs from detailed microarchitectural analysis to advanced system integrity validation. The radonation will consist of a subset of these tests to target ISA compliance. The test donation will cover both core and SoC certification and will include, but is not limited to, coherency, hypervisor, vectors, advanced interrupt architecture, IOMMU and other scenarios. Each component is designed to complement existing tests.

“Breker is now working with over 20 commercial entities and other organizations to verify their RISC-V cores, providing us with unique experience of the myriad of unusual verification issues inherent in these processors,” says David Kelf, Breker’s CEO. “We are giving back to the RISC-V community by providing a subset of these tests, open source, that can target ISA compliance and for other purposes.”

The announcement of the donation coincides with the RISC-V Summit North America Tuesday, October 21, through Thursday, October 23, at the Santa Clara Convention Center in Santa Clara, Calif. As a Platinum Sponsor, Breker will exhibit in Booth #P4 and offer five presentations as part of the RISC-V Summit program.

“At RISC-V International, we greatly value the expertise of the Breker team and the contributions they have made to ongoing ISA compliance work,” remarks Andrea Gallo, RISC-V International’s CEO. “I am looking forward to Breker’s donation and the impact it can have in complementing and extending our existing ACT test suites.”

Breker’s donation provides alignment with RISC-V International programs. This will provide value to the company’s customers, as well as the RISC-V designer community, by aligning Breker’s full RISC-V verification test suite with RISC-V test developments.

In addition to existing test suites and generators, which are focused on random instruction generation for instruction set architecture testing, with SystemVIPs, Breker has been able to significantly extend testing to advanced system-level integrity. Using test suite synthesis technology, Breker is able to provide a high degree of coverage by driving cross functional stress verification and unpredictable corner case discovery. The donation will include tests generated using test suite synthesis.

David Kelf and Adnan Hamid, Breker’s Executive President and CTO, were elected Chairperson of the Requirements Working Group and Vice-Chairperson of the Test Plan Working Group, respectively, in the RISC-V International Certification Steering Committee.

Breker at RISC-V Summit North America 2025
Breker will demonstrate its RISC-V CoreAssurance and SoCReady SystemVIPs and Trek Test Suite Synthesis solutions at RISC-V Summit North America, Tuesday, October 21 through Thursday, October 23, at the Santa Clara Convention Center.

Presentations featuring Breker executives include:
Member Day: “Framework for RISCV Certification—Software, Hardware and Systems”
Nambi Ju, Lyle Technologies, LLP
Tuesday at 4 p.m. in Grand Ballroom H (Level 1)

Demo: “RISC-V AIA Expanding Interrupts: Applications, Implementation and Verification”
Adnan Hamid
Wednesday at 1 p.m.
Exhibit Hall A, Demo Theater

“RISC-V System Level Certification from Verification Foundations”
Adnan Hamid
Wednesday at 3:15 p.m.
Theater (Level 2)

Lightning Round: “Leveraging AI to understand the RISC-V ISA Specification”
Dave Kelf and Nambi Ju
Wednesday at 4:15 p.m.

“Unleashing ML Processing Power Through RISC-V Vectors: Applications, Implementation and Verification”
Brian Baker, Solutions Architect
Thursday at 2:35 p.m.
Grand Ballroom G (Level 1)

To arrange a demonstration or private meeting, send email to [email protected].

About Breker Verification Systems
Breker Verification Systems solves complex semiconductor challenges across the functional verification process from streamlining UVM-based testbench composition to execution for IP block verification, significantly enhancing SoC integration and firmware verification with automated solutions that provide test content portability and reuse. Breker’s solutions include a SystemVIP library of scenarios for RISC-V and Arm, core and SoC testing, coherency, security and other critical areas. Breker solutions easily layer into existing environments and operate across simulation, emulation, prototyping, and post-silicon execution platforms. Its Trek family is production-proven at leading semiconductor companies worldwide and enables design managers and verification engineers to realize measurable productivity gains, speed coverage closure and easy verification knowledge reuse. As a leader in the development of the Accellera Portable Stimulus Standard (PSS), privately held Breker has a reputation for dramatically reducing verification schedules in advanced development environments. Case studies that feature Analog Devices, Broadcom, IBM and other companies leveraging Breker’s solutions are available on the Breker website.

Engage with Breker at:
Website: www.brekersystems.com
Twitter: @BrekerSystems
LinkedIn: https://www.linkedin.com/company/breker-verification-systems/
Facebook: https://www.facebook.com/BrekerSystems/

TrekSoC, TrekSoC-Si, RISC-V CoreAssurance SystemVIP and RISC-V SoCReady SystemVIP are registered trademarks of Breker Verification Systems. Breker Verification Systems acknowledges trademarks or registered trademarks of other organizations for their respective products.

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FOR IMMEDIATE RELEASE

Media contact: M. Guilbert, [email protected]

RECIF Technologies Adopts Agileo Automation’s Combined Speech Scenario and E84 PIO Box Solution to Test E84 and SECS/GEM SEMI Standard Compliance of Wafer Handling and Tracking Equipment

Global French manufacturer of automated handling equipment, wafer sorters, and equipment front-end modules (EFEMs) saves significant fab equipment integration time and enhances customer satisfaction

PHOENIX, October 7, 2025 – Agileo Automation, a leading provider of control and connectivity solutions for global semiconductor manufacturing equipment, today announced at Booth #877 at SEMICON West 2025 that RECIF Technologies has adopted its combined Speech Scenario and E84 PIO Box solution to test its wafer handling and tracking equipment for E84 and SECS/GEM compliance. The global company headquartered in Toulouse Blagnac, France, which specializes in the design, manufacturing, and installation of automated equipment for semiconductor wafer handling, needed a fast and effective solution to validate the compliance of its products with SEMI’s E84 and SECS/GEM standards before they are shipped and implemented at customers’ semiconductor manufacturing sites all over the world.

Speech Scenario is a software that emulates the fab host to validate SECS/GEM tool scenarios before shipping brand-new production equipment to fabs. The E84 PIO Box is a compact and lightweight device that serves as an interface between Speech Scenario and E84 passive equipment. Used together, these products allow RECIF Technologies to generate complete test reports that can be communicated to its customers, ensure fast detection of non-compliance and errors to avoid downtime, as well as quick and reliable SEMI E84 and SECS/GEM compliance testing, especially in the management of complex cases. The company has now better control over host-sorter interactions, with customizable scenarios related to automatic carrier delivery defined in the E84 standards. With Speech Scenario, RECIF teams can more effectively replicate customer use cases when resolving anomalies.

“We were using less flexible software where automation messages were not easily modifiable and old emulation technology for validation of only the PIO part of the E84 standard, which meant that more complex cases and host-sorter interactions had to be tested and adapted in the field during machine integration at customer sites,” explains Thomas Brillouet, research and development director for RECIF Technologies SAS. “We selected Agileo’s all-in-one Speech Scenario and E84 PIO Box solution because we believe that it is the most efficient and competitive product currently on the market. The flexibility and time savings we have garnered since using Agileo’s solution has translated into enhanced overall customer satisfaction for our company.”

“Over the past 40 years, RECIF Technologies has built a solid reputation as an innovative industry leader in advanced semiconductor equipment manufacturing and as an early adopter of SEMI standards,” adds Marc Engel, CEO of Agileo Automation. “Agileo Automation, whose origins are closely tied to RECIF Technologies, benefits from a strong cultural and technical proximity with the company. We are proud to contribute to RECIF Technologies’ success, both as a technology partner and by supporting them in demonstrating quality and reliability to their customers.”

- ends -

About Agileo Automation
Since its inception in 2010 in Poitiers, France, Agileo Automation has empowered global semiconductor equipment manufacturers to optimize their production machines with control, communication, data acquisition, and testing solutions, enabling their deployment in large-scale fabs worldwide. At the heart of Industry 4.0, Agileo’s A²ECF-SEMI framework provides a robust foundation for developing equipment controller software, leveraging the SEMI SECS/GEM and GEM300 standard suites. As a member of SEMI and the OPC Foundation, Agileo Automation is a key contributor to the development and integration of industry standards such as SEMI and OPC UA. For more information, please visit our web site or follow us on LinkedIn.

About RECIF Technologies
RECIF Technologies, headquartered in Toulouse-Blagnac, France, has been providing advanced robotic solutions for semiconductor wafer handling since 1985. The company designs and manufactures reliable sorters, EFEMs, and compact handling tools that help leading semiconductor manufacturers worldwide improve productivity, ensure reliability, and reduce total cost of ownership. As a member of SEMI and the Aeneas association, RECIF Technologies actively contributes to the industry standards and collaborative projects shaping the future of the semiconductor industry. For more information, please visit our web site or follow us on LinkedIn.

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Singapore, September 17, 2025 – EUV Tech, the global leader in extreme ultraviolet (EUV) metrology equipment, today announced the opening of its first international office: EUV Tech Singapore Pte. Ltd., located at 163 Kallang Way, Mapletree Hi-Tech Park, Singapore.

This expansion marks a significant milestone in EUV Tech’s global growth strategy and reinforces its commitment to strengthening customer support across Asia’s rapidly expanding semiconductor market.

Strategic Rationale

Singapore was selected as EUV Tech’s first international office due to its robust infrastructure, business-friendly environment, and central location within Asia’s semiconductor ecosystem. While tool development will remain anchored in Martinez, California, the Singapore office will house EUV Tech’s international Customer Success Team, focused on field service engineering. It will also serve as a regional hub, enabling faster response times, enhanced service capabilities, and closer alignment with customers’ business hours.

“Customer service is at the heart of everything we do,” said Chami Perera, EUV Tech Chief Operating Officer. “By establishing a presence in Singapore, we are not just providing metrology tools. We are standing shoulder to shoulder with our customers to ensure their success in an evolving industry.”

The semiconductor industry in Asia is projected to continue its rapid growth over the next decade, with Singapore serving as a major regional hub. EUV Tech’s expansion positions the company to:

• Strengthen existing relationships with leading semiconductor fabs
• Support uptime with field service engineers on the ground
• Leverage Singapore’s ecosystem of world-class universities, government initiatives, and industry networks

With tools already installed in every major semiconductor fab worldwide, EUV Tech’s Singapore office further cements its reputation as a trusted partner driving innovation and reliability in EUV metrology. 

EUV Tech’s Singapore office is a clear signal of the company’s ambition and growth in the global semiconductor sector. “We are growing and thriving,” said Perera. As the semiconductor industry continues to expand, we will be right there with our customers, innovating, adapting, and ensuring their success.”

About EUV Tech
EUV Tech enables technology advancement in the frontiers of semiconductor manufacturing and material science through the development of world-leading EUV and soft-x-ray instrumentation and techniques.

Media Contact:

Natalie Hill, Associate Director Marketing & Communications

[email protected]

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PDF Solutions Secures Landmark Contract with Global IDM Customer
Large 2025 Contract Validates High-Volume Manufacturing Strategy

PDF Solutions, Inc. (Nasdaq: PDFS) today announced a landmark contract signing: a significant multi-year agreement to expand a prior contract and deploy eProbe® tools, Characterization Vehicle® infrastructure, and associated Exensio® analytics software across multiple high-volume manufacturing facilities of a major global semiconductor manufacturer.

Breakthrough Technology Scales to Mass Production

PDF Solutions' eProbe technology delivers contactless testing of 3D semiconductor structures using electron beam, optimized for each wafer's specific design characteristics. This agreement encompasses multiple eProbe systems with deployment in 2025, supported by PDF Solutions' comprehensive software suite for machine optimization and results analysis.

The contract marks a pivotal milestone that validates PDF Solutions' strategic vision and demonstrates the critical role of eProbe technology in both advanced node development and high-volume manufacturing.

Integration of Process characterization, Design and in-line Fabrication data

PDF Solutions combines the eProbe DirectScan™ application with Characterization Vehicle test chips and Exensio analytics software to enable faster yield learning in high-volume manufacturing environments.

This landmark contract validates the approach of integrating process characterization data with design layout data and in-line fabrication data to enhance detectability to ppb levels to accelerate root cause for yield diagnosis and variability control.

Secure Connected Solutions Drive Value

PDF Solutions will deploy eProbe tools and associated software at the Foundry’s manufacturing sites, using PDF Solutions’ secureWISE® network to provide secure remote equipment support and maintenance. This deployment exemplifies PDF Solutions' strategic vision: creating a cross-industry analytics and collaboration platform that connects key players in the semiconductor ecosystem.

Comprehensive connectivity is essential for achieving faster yield ramps and delivering on the promise of AI in semiconductors. To successfully implement AI solutions, the industry needs automated connections between data sources, tools, and enterprise software systems across the entire semiconductor supply chain.

About PDF Solutions
PDF Solutions (Nasdaq: PDFS) provides comprehensive data solutions designed to empower organizations across the semiconductor and electronics industry ecosystem to improve the yield and quality of their products and operational efficiency for increased profitability. The Company’s products and services are used by Fortune 500 companies across the semiconductor and electronics ecosystem to achieve smart manufacturing goals by connecting and controlling equipment, collecting data generated during manufacturing and test operations, and performing advanced analytics and machine learning to enable profitable, high-volume manufacturing.

Founded in 1991, PDF Solutions is headquartered in Santa Clara, California, with operations across North America, Europe, and Asia. The Company (directly or through one or more subsidiaries) is an active member of SEMI, INEMI, TPCA, IPC, the OPC Foundation, and DMDII. For the latest news and information about PDF Solutions or to find office locations, visit https://www.pdf.com.

Headquartered in Santa Clara, California, PDF Solutions also operates worldwide in Canada, China, France, Germany, Italy, Japan, Korea, Sweden, and Taiwan. For the Company’s latest news and information, visit https://www.pdf.com.

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• Read more about ElevATE Semiconductor Appoints Heather Kirkby as New Chairwoman