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CUPERTINO, Calif., Feb. 01, 2023 (GLOBE NEWSWIRE) -- Xpeedic today released Notus, an electronic design automation (EDA) platform for package/board SI/PI/thermal analysis, at DesignCon 2023 at the Santa Clara Convention Center in Santa Clara, Calif.

Notus, powered by Xpeedic’s electromagnetic and multiphysics solver engine, helps designers to meet the SI, PI, and thermal requirements in an efficient and automated way. It provides a comprehensive simulation flow, including DC IR-drop and AC impedance analysis, decoupling capacitor optimization, signal topology extraction, signal interconnect modeling, and thermal analysis.

In addition to Notus, Xpeedic also announced today upgrades to its Advanced Packaging and High-Speed Digital Solutions.

Metis, the EM simulation tool for 2.5D/3DIC advanced packaging designs, now delivers further improvement on performance. The unique speed-balanced-accuracy multi-mode capability is enhanced to achieve optimal accuracy-speed tradeoff.

Hermes, Xpeedic’s 3D EM simulation tool, further improves its adaptive mesh technology to achieve desired accuracy with faster convergence. It enhances the editing function associated with via, trace, and shape operation for package and PCB. It supports board-level antenna analysis and near-field and far-field view with integrated powerful data post-processing capability.

ChannelExpert, the diagram GUI-based circuit simulation platform, provides a fast, accurate and simple approach to analyze high-speed channels. It supports IBIS/AMI simulations and integrates compliance specs for various SerDes and DDR standards. ChannelExpert provides a comprehensive analysis for high-speed channels including frequency-domain S-parameter, time-domain eye diagram, statistic eye, and channel operating margin (COM) with parameter sweep and optimization. In this release, ChannelExpert integrates Hermes and Notus EM modeling tools for EM-circuit co-simulation and supports the AMI modeling and the latest DDR5 standard.

Other tools within the Xpeedic expert suite including SnpExpert, ViaEpxert, CableExpert and TmlExpert are improved with the usability and additional built-in templates to enable easy and quick evaluations of S-parameter, via, cable, and transmission line, respectively.

Availability and Pricing
Notus and the entire Xpeedic portfolio is shipping now. Pricing is available upon request.

Visit the Xpeedic website for additional information or requests for a demonstration. Email requests should be sent to [email protected].

Xpeedic at DesignCon
Xpeedic will be in DesignCon Booth #633 today and tomorrow, February 1 and February 2, at the Santa Clara Convention Center.

About Xpeedic
Xpeedic is a leading EDA provider to accelerate designs and simulations of next generation high-frequency, high-speed intelligent electronic products. Powered by its proprietary electromagnetic, circuit, and multi-physics solver technologies, Xpeedic is addressing challenges in designing IC in advanced nodes, 3D-IC with advanced packaging, high-speed digital, and RF systems for the markets including data center, automotive, communication, mobile, and IoT. Founded in 2010, Xpeedic has offices in both U.S. and China. For more information, please www.xpeedic.com.

Engage with Xpeedic
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Twitter: @xpeedic
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American IC manufacturers have 56% of their wafer capacity installed at fabs located in other regions of the world, according to the new Global Wafer Capacity 2023 report from Knometa Research. As of year-end 2022, American companies have installed capacity of 4.6 million 200mm-equivalent wafers per month, with 2.0 million in domestic fabs and 2.6 million in fabs at foreign sites.

Of the major IC producing countries and regions (Americas, China, Europe, Japan, Korea, and Taiwan), the Americas region is unique in that foreign capacity exceeds that of domestic capacity.

The biggest volumes of offshore capacity for American companies are in Singapore (22% share of total), Taiwan (12%), Japan (10%), Germany (4%), Ireland (3%), and Israel (2%).

  • Singapore: Micron Technology - 4 fabs, GlobalFoundries - 4 fabs
  • Taiwan: Micron Technology - 4 fabs, Diodes - 1 fab
  • Japan: Micron Technology - 4 fabs, TI - 2 fabs, Onsemi - 1 fab
  • Germany: GlobalFoundries - 2 fabs, TI - 1 fab
  • Ireland: Intel - 1 fab, Analog Devices - 1 fab
  • Israel: Intel - 2 fabs

With its many large fabs in Singapore, Taiwan, and Japan, Micron owns by far the most offshore capacity, accounting for 65% of the 2.6 million wafers in monthly capacity. GlobalFoundries is next with a 14% share followed by Intel with 9% and Texas Instruments with 5%.

In the past couple years, American companies have announced several major fab construction projects in the U.S. Some of these came about as a result of the CHIPS Act passed by the U.S. government in July 2022 to boost American semiconductor research, development, and manufacturing.

American-owned fabs under construction in the U.S. and scheduled to open during 2024-2025 include:

  • Intel - Fabs 52 and 62 in Chandler, Arizona
  • Texas Instruments - Fabs SM1 and SM2 in Sherman, Texas
  • Intel - Fab 27 in New Albany, Ohio
  • Micron - Fab in Boise, Idaho

Micron will also build a large fab site in Clay, New York, but this project is part of the company's long-term capacity expansion plans and construction will not begin until 2024 at the earliest. In January 2023, Analog Devices announced plans to double the capacity of its fab in Beaverton, Oregon.

While the share of domestic IC wafer capacity will increase some in the next several years with the opening of these large new fabs in the U.S., American companies are building or have plans to build additional fabs at overseas sites as well. Moreover, Intel's pending acquisition of Tower Semiconductor, with its fabs in Israel and Japan (as well as the U.S.), will shift the balance in the direction of more foreign capacity. Had Tower been part of Intel at the end of 2022 with the headquarters of the combined operations being in the U.S., the foreign share of American-owned capacity would be one percentage point higher at 57%.

About Global Wafer Capacity 2023
Global Wafer Capacity provides a detailed examination of existing fab capacity along with a five-year forecast to 2027. The report has been published on an annual basis since 2007, initially by IC Insights. In December 2021, IC Insights transferred business associated with Global Wafer Capacity to co-founder Trevor Yancey. Mr. Yancey became an independent contractor in 2014 but continued as the principal analyst and project manager for Global Wafer Capacity. Published in January 2023, Global Wafer Capacity 2023 is sold by Mr. Yancey’s company Knometa Research. For more information, visit https://knometa.com/gwc.

About Knometa Research
Knometa Research is a semiconductor technology and market analysis firm led by former IC Insights executive, Trevor Yancey. Mr. Yancey co-founded IC Insights in 1997 with Bill McClean and Brian Matas. In 2014, Mr. Yancey established Knometa Research to serve as an independent contractor for TechSearch International and for IC Insights until that business closed in December 2022. For more information, visit https://knometa.com.

San Francisco, CA – January 25, 2023 – Brewer Science, Inc., a global leader in developing and manufacturing next-generation materials and processes for the microelectronics and optoelectronics industries, presents solutions to optical integration challenges at the SPIE Photonics West Exhibition in San Francisco, California.

Transition to 3D wafer-scale integration is a challenge faced in new photonic integration projects

The transition from traditional separate manufacturing and packaging processes to 3D wafer-scale integration remains a challenge faced in any photonic integration project.

Augmented, virtual, and mixed reality bring their own unique set of optic integration challenges, including the need for materials with deep submicron processing capabilities and minimal defectivity.

Advanced CMOS processing and high-quality materials are critical for next-generation materials

Scaling wafers to smaller sizes, while increasing functionality, places an emphasis on material selection and leading-edge CMOS node capabilities. Experience in CMOS processing and access to high-quality materials are necessary to achieve higher-performing materials, including:

• Enhanced optical properties
• Increased uniformity
• Ultralow defectivity
• Improved stability across a wider temperature range

Brewer Science presents ppb-level defectivity and deep submicron processing capabilities at SPIE Photonics West

Having shared expertise in advanced lithography and providing next-generation packaging solutions, Brewer Science leverages an extensive marriage of capabilities that encourages scalability and economical integration.

With four decades of extensive experience serving diverse markets and customers, Brewer Science provides customers with cohesive and seamless optics integration, including materials in some of the most innovative spaces:

• Lithography enhancement materials
• Next-generation packaging solutions
• Permanent materials including:
• High and low refractive index materials
• Protective coatings (including antiscratch coatings)
• Transparent permanent adhesives
• PermaSOL® permanent wafer bonding material

Brewer Science is a high-performance and high-purity coatings manufacturer having expertise in defect-free optical, planarizing, conformal, protective, and thermally stable coatings and adhesives. This includes providing full-service analytical and application testing services, specializing in chemical, polymer, trace impurity, on-wafer, and thin film characterization.

Visit Brewer Science’s booth #2544 at the SPIE Photonics West Exhibition from January 31st through February 2nd to view samples of materials and discuss material options with a product expert. You can also visit Brewer Science’s website and submit a request at the bottom of the page to connect with a product expert.

About Brewer Science
Brewer Science is a global leader in developing and manufacturing next-generation materials and processes that foster the technology needed for tomorrow. Since 1981, we’ve expanded our technology portfolio within advanced lithography, advanced packaging, smart devices, and printed electronics to enable cutting-edge microdevices and unique monitoring systems for industrial, environmental, and air applications. Our relationship-focused approach provides outcomes that facilitate and deliver critical information. Our headquarters are in Rolla, Missouri, with customer support throughout the world. We invite you to learn more about Brewer Science at www.brewerscience.com.

RoodMicrotec N.V. reports preliminary total income of EUR 16.5 million for 2022
• The preliminary total income for 2022 of EUR 16.5 million exceeded the outlook by EUR 0.9 million
• Order book value increased by 19% compared to end of 2021
• Cash position very healthy to support further growth

Deventer, January 26, 2023 – RoodMicrotec N.V., a leading independent company for semiconductors supply and quality services, today publishes the unaudited preliminary total income for the financial year 2022. The unaudited preliminary total income for 2022 amounted to EUR 16.5 million, which is 14% higher than in 2021 (EUR 14.5 million) resulting in a second consecutive year with double-digit growth. Notably, this is the highest total income since 2000, and it shows that RoodMicrotec is focusing on the right fast-growing future-oriented markets.

In the second half of 2022, the unaudited preliminary total income was EUR 9.2 million - an increase of 28% compared to the second half of 2021 (EUR 7.2 million). In 2022, the order book increased by 19% compared to the orders booked at the end of 2021, which is a good predictor for a steady quality of the services provided and a high satisfaction level of our customers.

“Again, we managed to outperform our expectations by focusing on our core business and services. In 2022, we saw significant increases in demand from our customers both for new products as well as for existing products”, says Martin Sallenhag, CEO of RoodMicrotec. “We are very pleased with the overall development of the Company in 2022 and expect a further increase in total income for 2023. The excellent cash situation enables us to invest for future growth where necessary.”

Throughout 2022, the Test Operations unit showed a strong increase, which was related to the excellent services provided by RoodMicrotec to its new and existing customers. The Supply Chain Management unit showed a limited increase in 2022 compared to last year. The sharp increase in the second half of 2022 compared to the first half of 2022 was due to a higher demand for existing products as well as the production ramp-up in the context of new long-term contracts. In 2022, the Qualification & Failure Analysis unit saw a decrease compared to 2021. However, the total income for the second half of 2022 was 9% higher than for the first half of 2022, which shows that new customer projects are now starting.

Total income per operational unit for the financial year 2022 compared to the financial year 2021:
(x € 1,000) FY 2022 FY 2021 Change
Test Operations 10,034 7,938 +26%
Supply Chain Management 3,533 3,364 +5%
Qualification & Failure Analysis 2,980 3,230 -8%

TOTAL 16,547 14,532 +14%

Outlook
RoodMicrotec expects the total income for 2023 to be in the range of EUR 17.0 million to EUR 17.5 million, with a profit before tax of 5-10%, and thus in line with the financial targets. The geopolitical situation in the world and the current energy crisis throughout Europe could have an impact on the Company’s business. The Management is keeping a close eye on the situation and is doing everything possible to mitigate any potentially negative impact.

Audit
The financial data in this press release have not been audited.

Forward-looking statements
This press release contains a number of forward-looking statements. These statements are based on current expectations, estimates and prognoses of the Board of Management and on the information currently available to the Company. The statements are subject to certain risks and uncertainties which are hard to evaluate, such as the general economic conditions, conditions of the worldwide semiconductor industry, interest rates, exchange rates and amendments to statutory laws and regulations. The Board of Management of RoodMicrotec cannot guarantee that its expectations will materialize. Furthermore, RoodMicrotec does not accept any obligation to update the statements made in this press release.

Financial calendar
April 13, 2023 Trading update quarter 1-2023
April 20, 2023 Publication annual report 2022
April 20, 2023 Conference call for media, analysts and shareholders
June 6, 2023 Annual general meeting of shareholders
July 20, 2023 Publication interim report 2023
July 20, 2023 Conference call for media, analysts and shareholders
October 19, 2023 Trading update quarter 3-2023

About RoodMicrotec
RoodMicrotec is a leading independent company for semiconductor supply and quality services. With more than 50 years of experience in the semiconductor and electronics industry, RoodMicrotec is well-established as a highly valued partner for many companies worldwide. The Company provides full-turnkey ASIC services for complex microchips that are customized to handle specific applications for individual customers. In cooperation with strong partners, RoodMicrotec manages the entire development and production flow of ASICs in the target volume, ranging from low quantities up to multiple millions per year. The turnkey solution includes project management, wafer test, assembly, final test, qualification, failure analysis and logistics. All services comply with the industrial and quality requirements of the high reliability, aerospace, automotive, healthcare and industrial sectors.
RoodMicrotec’s headquarter is located in Deventer, Netherlands, with operational units in Nördlingen and Stuttgart, Germany. For more information visit https://www.roodmicrotec.com

This press release is published in English and German. In case of conflict between these versions the English version shall prevail.

REGISTRATION PRICING

  • Member: $250
  • Non-Member: $275 
     

CANCELLATION POLICY:
Cancellations received on or before August 15, 2026 will be fully refunded. After this date, only substitutions will be accepted. 

United States Stone Creek Golf Club Business
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Become a Sponsor

Sponsorship is an excellent way to promote your brand, especially on the golf course where many business transactions take place.
Sponsorships are tailored to meet your branding and marketing objectives.

To learn more please contact Tim Janes ([email protected] | 1.720.939.4992). 

MULLIGANS + RAFFLE TICKETS

PURCHASE A TICKETSUPPORT THE SEMI PACIFIC NORTHWEST STEM SCHOLARSHIP

The scholarship will be awarded to a deserving university and/or college in the region. Mulligans and Raffle Tickets are sold onsite, $5 per ticket. 

Proceeds from the sales directly fund the scholarship. Players and non-players are welcome to participate.

To donate a raffle prize please contact—Krish Raghunath | [email protected]

 

REGISTRATION INCLUDES   

  • Golf Cart
  • Grab & Go Breakfast
  • Contests and Prizes
  • Beverage Ticket
  • Award Ceremony and Lunch

 

PLAYER AWARDS                                                                   

  • Closest to Pin
  • Longest Drive
  • Putting Contest
  • Best Foursome
  • Needs Most Improvement

 

DRESS CODE

Stone Creek Golf Club requires generally accepted dress for golf tournaments. Shirts and shoes must always be worn. Stone Creek Golf Club is a soft-spike only facility. Following is a list of unacceptable clothing:

  •  Tank tops
  • Cut-offs
  • Swimwear
  • Gym shorts

 

Stone Creek Golf Club
14603 South Stoneridge Drive
Oregon City, OR 97045
United States

Tuesday, September 15, 2026 | 7:00am–3:00pm Pacific Time

7:00 am - 8:00 am

Registration | Breakfast | Networking

8:00 am - 1:00 pm

Shotgun Start

1:00 pm - 3:00 pm

Award Ceremony | Lunch | Networking

4th Annual SEMI Oregon Golf Classic

Join us for a morning of golf, fun, and networking at the beautiful Stone Creek Golf Club in Oregon City, Oregon. Whether you're a beginner or a proenjoy friendly competition and camaraderie with your colleagues and customers. 

The Stone Creek Golf Club is a a Peter Jacobsen/Jim Hardy designed golf course. Presenting spectacular views of Mt Hood, the course perfectly depicts the Pacific Northwest. Stone Creek is laid over 165 acres of land with old growth Douglas Firs, Lakes, and features some of the best greens in Oregon (OR).

Visit Stone Creek Golf Club for additional course details.

7:00 am - 3:00 pm Off Add to Calendar 2026-09-15 07:00:00 2026-09-15 15:00:00 SEMI Oregon Golf Classic 4th Annual SEMI Oregon Golf ClassicJoin us for a morning of golf, fun, and networking at the beautiful Stone Creek Golf Club in Oregon City, Oregon. Whether you're a beginner or a pro—enjoy friendly competition and camaraderie with your colleagues and customers. The Stone Creek Golf Club is a a Peter Jacobsen/Jim Hardy designed golf course. Presenting spectacular views of Mt Hood, the course perfectly depicts the Pacific Northwest. Stone Creek is laid over 165 acres of land with old growth Douglas Firs, Lakes, and features some of the best greens in Oregon (OR).Visit Stone Creek Golf Club for additional course details. Stone Creek Golf Club 14603 South Stoneridge Drive Oregon City, OR 97045 United States SEMI.org [email protected] America/Los_Angeles public America/Los_Angeles REGISTER NOW
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Yield Engineering Systems, Inc. (YES), a leading manufacturer of process equipment for semiconductor advanced packaging, life sciences, and “More-than-Moore” applications, today announced that it has sold a VertaCure XP G2 system to Korea’s LB Semicon. The VertaCure XP G2 is the latest generation of YES’s flagship VertaCure vacuum curing system, and LB Semicon’s will be the first such system to be installed in Korea. Delivery is expected at the end of March.

Key factors in the purchase decision were the VertaCure XP G2’s superior throughput, exceptional particle performance, and thorough PI/PBO curing capability – all benefits derived from its proven vacuum-based process. The system will support a bump/RDL application for wafer-level chip scale packaging (WLCSP). It accommodates both 200mm and 300mm wafers, providing valuable flexibility for this and future applications.

“As semiconductor chip manufacturers seek to produce ever-smaller products with higher performance and lower power consumption, wafer bumping technology is expanding its application scope and creating greater value. In order to keep up with this trend, LB Semicon is deeply committed to continuous research and development,” said LB Semicon’s CEO, Dr. Nick (Namseog) Kim. “We believe that YES’s VertaCure XP G2 curing system will enable our company to deliver the cutting-edge technology needed as Korea continues its growth as a world-class semiconductor powerhouse.”

“We are pleased and proud that our VertaCure XP G2 was selected for this leading-edge application,” said Bioh Kim, President of YES Korea. “This order showcases YES’s growing role as a trusted global partner in the production of innovative technologies. We look forward to supporting LB Semicon’s efforts, now and into the future.”

About YES
Yield Engineering Systems, Inc. (YES) is a preferred provider of high-tech, cost-effective equipment for enhancing surfaces and materials. The company’s product lines include thermal processing systems, chemical vapor deposition (CVD) systems, and wet process equipment used for the precise surface modification of semiconductor substrates, semiconductor and MEMS devices, LED displays, and biodevices. Customers ranging from startups to Fortune 100 companies rely on YES systems to create and volume-produce innovative products in a wide range of markets. YES is headquartered in Fremont, California, with a growing global presence. For more information, please visit yieldengineering.com.

About LB Semicon
Based in Pyeongtaek, South Korea, LB Semicon provides bumping, probe test, back-end, and WLCSP services for display driver integrated circuits (DDI), CMOS image sensors (CIS), and power management integrated circuits (PMIC) used in electronic devices such as TVs, monitors, and mobile phones.
LBS has continuously developed and evolved its technology since the company’s founding in 2000, starting with gold bumping for TFT LCD and OLED DDIs, and expanding over the years into solder bumping, Cu pillar bumping, and WLCSP. The company maintains solid partnerships with top semiconductor chip manufacturers in Korea and elsewhere, and has more than a thousand employees. For more information, please visit www.lbsemicon.com.

Registration

PRICING

$25 Members, $50 Non-Members

Paul Cohen
1.978.769.2106 
[email protected]

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United States Register Now Business Executive

The discussion will help attendees understand why and how governments implement trade controls, what “exports” are and how they take place in different business contexts, and common due diligence methods – such as customer screening – that United States companies use to incorporate regulatory compliance into their business processes. Finally, the discussion will address recent regulatory updates which address current issues such as US-China trade relations and the anticipated effects of those regulations on the US semiconductor design ecosystem.

 

Meet the Speakers

Ada Loo

Ada Loo
Group Director and Associate General Counsel,
Cadence Design Systems

Biography

William Duffy

William Duffy
Corporate Counsel (Government and Trade, Cadence Legal)

Biography

Hosted by

SEMI ESDA                Cadence        

Cadence Design Systems
2655 Seely Avenue
San Jose, CA 95134
United States

ESD Alliance

The ESD Alliance Export Committee will hold a seminar called “The Impact of New Regulations on the Semiconductor Design Ecosystem.” This seminar is presented by the ESD Alliance, a SEMI Technology Community, and will be hosted by Cadence Design Systems at their San Jose Headquarters. The Cadence Government and Trade Team will cover general trade compliance concepts, how export control and sanctions regulations affect the industry, as well as current trends and emerging issues. 

Breakfast Hosted by Cadence

8:30 am - 11:00 am Off Add to Calendar 2023-04-26 08:30:00 2023-04-26 11:00:00 ESD Alliance Export Seminar The ESD Alliance Export Committee will hold a seminar called “The Impact of New Regulations on the Semiconductor Design Ecosystem.” This seminar is presented by the ESD Alliance, a SEMI Technology Community, and will be hosted by Cadence Design Systems at their San Jose Headquarters. The Cadence Government and Trade Team will cover general trade compliance concepts, how export control and sanctions regulations affect the industry, as well as current trends and emerging issues.  Breakfast Hosted by Cadence Cadence Design Systems 2655 Seely Avenue San Jose, CA 95134 United States SEMI.org [email protected] America/Los_Angeles public America/Los_Angeles 1

PRESS RELEASE | Nijmegen, the Netherlands, January 19, 2023

Chip Integration Technology Center (CITC) will intensify its cooperation with acoustic microscopy expert PVA TePla Analytical Systems GmbH. The cooperation offers exciting opportunities for both organizations to benefit from the synergies that exist between them.

Successfully determining which materials and processes are reliable for packaging is crucial to the mass commercialization of power and WBG semiconductors. Flawless basic materials are the key to flawless products. Cracks, cavities, detachment, or inclusions result in failures during the subsequent production process, which can be avoided with the help of reliable material analysis.

To realize this in its Thermal High-Performance packaging program, CITC is going to use the PVA TePla Scanning Acoustic Microscopy (SAM) 302 HD2 system. The microscope system provides non-destructive quality control capabilities and will therefore allow CITC to assess the reliability of the sinter die attachment to the leadframe.

The collaboration will also see both parties sharing information with their respective businesses to showcase the technical capability and infrastructure on offer at both organizations. Finally, PVA TePla and CITC will be exploring opportunities to jointly develop research opportunities.

Peter Czurratis, Managing Director of PVA TePla is excited about the partnership: “CITC is an upcoming and leading research center focused on new semiconductor wafer technologies and new trends in packaging and systems integration. Their cooperation with semiconductor companies and universities provides us with an excellent research platform for defining our future roadmap for the next generation of acoustic microscopes.”

CITC Business Development Manager, Marco Koelink, is also looking forward to this collaboration: “PVA TePla is one of the leading suppliers of Scanning Acoustic Microscopes. Through this collaboration, CITC will gain access to advanced analytical capabilities that will help us not only to analyze and identify bond layer failures, but also better understand material performance and predict failures at an early stage. That is a crucial capability in the development of robust and reliable bonding technologies.”

About CITC
Chip Integration Technology Center (CITC) is a non-profit joint innovation center specializing in heterogeneous integration and advanced chip packaging technology. CITC has created an effective ecosystem in which companies, research and educational institutes work on bridging the gap between academics and industry. CITC’s contribution to the ecosystem is to provide access to innovation, infrastructure and education.
www.citc.org

About PVA TePla
With experience and know-how, PVA TePla AG has for many years supported important manufacturing processes and technological developments, primarily in the semiconductor, hard metal, electrical/electronics, and optical industries, but also in the forward-looking fields of energy, photovoltaics, and environmental technology.
https://www.pvatepla.com/en

United States Register Now Smart Manufacturing Business Executive Technical

The Fourth Industrial Revolution, or Industry 4.0, revolutionized automation monitoring, enhanced production efficiencies, and improved product quality. Industry 5.0 is the next industrial revolution coming to the forefront. 

Industry 5.0 builds and adapts the components of Industry 4.0 (robotization, automation, IoT, connected machines, smart systems, data analytics, AI, ML) with a focus on sustainability, environmental, social, and well-being of the worker, and optimized human-robot interactions.  
With the renewed interest in on-shoring manufacturing in the United States, this breakfast forum is a great opportunity to learn about Industry 5.0 and the ecosystem partners developing these future ideas.  

Join the conversation on— 

  • Market Trends, Forecast & Outlook

  • Industry 4.0 + Transition to 5.0—Challenges + Solutions  

  • Digital Journey–AI/ML, Autonomous Solutions, Digital Twin, etc.  

  • Supply Chain / Disruptions: Linear to Circular Economy and Localized Sourcing

  • Green Factories of Future—Sustainability

  • Talent Gap for Upcoming Transformation  

 

Hosted by

Analog Devices

 

 

 

Event Contact

Lin Tso | Sr. Program Manager | [email protected]

Analog Devices—ADI
OR
United States

FRIDAY, MAY 12, 2023 | PACIFIC TIME

8:00 am - 8:30 am

Check-In and Breakfast

Analog Devices
8:30 am - 8:35 am
Ann Hao
Anne Hao
GSM Technical Strategy
Intel Corporation

Welcome Remarks - SEMI Pacific Northwest Chapter Co-Chair

8:35 am - 9:00 am
Fred Bailey, Corporate Vice President, Fab Operations
Fred Bailey
Corporate Vice President, Fab Operations
Analog Devices

Keynote —Analog Devices— Reinventing a Legacy Wafer Fab

9:00 am - 9:25 am
Diana Tang, Management Consultant, McKinsey & Company
Diana Tang
Management Consultant
McKinsey & Company

Semiconductor Construction in United States

9:25 am - 9:50 am
Heath Fewel
Heath Fewel
Associate Director, Equipment Engineering
Microchip Technology Inc.

Smart Manufacturing: Legacy Fab Life Extension

9:50 am - 10:00 am

Break

10:00 am - 10:25 am
David Hanny Automation Product Group, Senior Director, Strategy & Marketing Applied Materials
David Hanny
Automation Product Group, Senior Director, Strategy & Marketing
Applied Materials

Methods to Mature Your Automation Intelligence

10:25 am - 10:40 am
David Corey
David Corey
Vice President, Semiconductor Industry
Siemens Digital Industries Software

Digitalization: An Evolution to Improve Productivity and Sustainability

10:40 am - 10:55 am
Brian Taylor
Brian Taylor
Semiconductor Business Manager Siemens Digital Industry Software
Siemens Digital Industries Factory Automation

Digitalization: An Evolution to Improve Productivity and Sustainability

10:55 am - 11:20 am
Jade Mende, Operations Systems Architect, Tektronix
Jade Mende
Operations Systems Architect
Tektronix

Enhancing the Work Experience

11:20 am - 11:40 am

Tour of Analog Devices

IN-PERSON AND VIRTUAL EVENT

Hosted by Analog Devices
Presented by the SEMI Pacific Northwest Chapter

8:00 am - 11:30 am Off Add to Calendar 2023-05-12 08:00:00 2023-05-12 11:30:00 [Pacific Northwest Forum] Smart Manufacturing—What Does a Smarter World Look Like With Industry 5.0? IN-PERSON AND VIRTUAL EVENT Hosted by Analog Devices Presented by the SEMI Pacific Northwest Chapter Analog Devices—ADI OR United States SEMI.org [email protected] America/Los_Angeles public America/Los_Angeles

Health and Safety

We Are Excited to Welcome You Back to the Pacific Northwest Forum

Your health and safety are our top priority. SEMI Americas (“SEMI”) monitors developing federal, state, and local health and safety recommendations and requirements to determine the most appropriate safety protocols for our in-person events.

SEMI will comply with and follow current facility and local government jurisdiction guidelines of the venue's location. The health and safety guidelines outlined below continue to evolve and will be updated as necessary to help support a safe experience for all attendees onsite.  

FACE COVERINGS 

  • Although masks are not required, attendees are encouraged to determine use based on their own personal comfort level as well as to be respectful of other's individual choice.

RELEASE AND WAIVER FORM

  • This was included in your online registration.

ADDITIONAL SAFETY PROTOCOLS

  • Please practice social distancing.
  • Wash and sanitize your hands frequently.
  • Avoid handshakes.
  • Wear your attendee badge at all times to indicate that you have gone through the health screening process.

SEMI is committed to upholding the health and safety standards outlined on this page. We will continue to monitor the guidance of public health authorities and government agencies going forward and will make appropriate adjustments in the future based on that guidance. Additional details about policies and procedures will be posted here as they are made available.  

Subject to Change. Updated August 18, 2022

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Event format

On-Demand Registration

Member: $49
Non-Member: $99

Registrants will receive the presentation recording and PDFs of Webinar #2 

Taylor Zhao
Manager, Programs & Committees
[email protected]

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United States REGISTER NOW Business Technical

SiC—Silicon Carbide Webinar #2:

Non-CMOS Compatible SiC Power Device Fabrication in Volume Si Fabs

SiC devices are displacing their incumbent Si counterparts in several high-volume power applications. As SiC market share continues to grow, the industry is lifting the last barriers to mass commercialization that include higher than Si device cost, relative lack of wafer planarity, the presence of defects like basal plane dislocations, reliability and ruggedness concerns, and the need for a workforce skilled in SiC power technology to keep up with the rising demand. To enable cost-effective manufacturing, high-yielding SiC fabrication in conventional Si fabs is desirable.

In this webinar, I will summarize key aspects of SiC fabrication technology and outline non-CMOS compatible processes that have been streamlined to allow for mass SiC chip fabrication in conventional Si mature fabs. The SiC industry has successfully leveraged the Si fab infrastructure and has made the relatively small financial investments required to allow existing Si fabs to process SiC. Consequently, SiC chip fabrication in volume fabs alongside Si has emerged as a “cost reduction” model that exploits “silicon” manufacturing economies of scale. Today’s SiC fab infrastructure is vibrant, mirrors that of silicon, and is rapidly expanding. 

 

View Previous Webinar in the SiC Series

  • Webinar #1—Silicon Carbide Material Properties, Key Applications, and Fabrication Basics: Making the Transition from Silicon
  • Webinar #2—Non-CMOS Compatible SiC Power Device Fabrication in Volume Si Fabs
  • Webinar #3—Bidirectional SiC and GaN Switch Technology 
  • Webinar #4—Understanding SiC Chip Cost, the Impact of Defects, and the Case of Price Parity with Si at the System Level
  • Webinar #5—SiC Edge Termination Technology


 

Meet the Speaker

Biography

United States

Victor Veliadis, PowerAmerica
Victor Veliadis, PhD
Executive Director and Chief Technology Officer,
PowerAmerica

Now Available On-Demand!

Join us online as we dive into SiC fabrication technology and non-CMOS compatible processes that have been streamlined to allow for mass SiC chip fabrication in conventional Si mature fabs.

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