This article is the third in a series highlighting the vital importance of SEMI Standards to commemorate the publication of the 1000th SEMI Standard in July 2019. Find the entire series here.SEMI Standards are the bedrock of the modern microelectronics industry. Without standards for wafer dimensions – which SEMI Standards first defined through a collaborative process involving semiconductor manufacturers and wafer suppliers in 1972 – the semiconductor equipment industry as we know it would not exist today. The late Robert Noyce of Intel noted in this 1992 video “being good at producing semiconductors will mean we have better, more consistent, better controlled equipment than we have in the past. Standards are going to play a vital role in that. Standards saves money and time for everyone.” Noyce also called standards a bellwether to surges of innovation in critical process technology. This is still true today as, for example, important standards-setting activity is afoot in panel-level packaging, electron microscopy and energetic materials. Will a surge of innovation follow?Panel-level packaging: a chicken-egg scenarioFrom advanced materials to more efficient production tools, one hallmark of the microelectronics industry is our fearless exploration of new technologies that will spawn change across the industry by improving performance and reducing cost. Advanced packaging techniques, such as panel-level packaging (PLP) – which moves semiconductor packaging to a larger-panel format – is one of those critical catalysts. Citing PLP’s potential to shrink costs by improving efficiency and economies of scale, research firm Yole Développement predicts a remarkable 63% CAGR for PLP from 2017-2023.[i]It’s no stretch to say that we are close to realizing a burst of innovation in packaging. With a just-published SEMI Standard (SEMI 3D20) specifying panel sizes, equipment companies will find it economically viable to invest more in developing the much-needed production tools that enable PLP. “It is really important to create standards so we come together and work much more efficiently. Creating those fundamentals allows you to be more productive in the long term,” said Christina Chu, ASM Semiconductors, and co-leader of the Panel Level Packaging Task Force, and one of five industry leaders recognized for their outstanding accomplishments in developing SEMI Standards for the electronics and related industries at the recent 1000 SEMI Standards reception during SEMICON West 2019. “This effort came up from the trenches,” said Richard Allen, NIST Quantum Measurement Division, and a co-leader of both SEMI’s 3D Packaging and Integration Committee and its Panel Level Packaging Task Force. “Equipment vendors told us that they wanted to serve the market, but they couldn’t do so without some standards. To respond to their request, our committee surveyed the market and discovered at least 15 different panel sizes in development.”“As no vendor is going to make over a dozen unique tools for the same process, we worked with the manufacturers and tool companies to write a specification that standardizes on two of the most widely accepted sizes,” Allen said. “For the first time, the industry will have a real market for panel-level packaging tools, and that will spur commercialization of new technologies that never would have seen the light of the day without standardization.”Allen pointed out that evolution of standards in microelectronics reflects the dynamism of the microelectronics industry itself. “Given the rate of technology advancement in microelectronics, SEMI Standards committee and task force members know that a newly-published standard is often just a starting point, and change will likely follow,” he said. “The Panel Level Packaging Task Force, for example, is currently determining how to best support this packaging technology, whether through possible enhancements to 3D20 or by creating new PLP standards.”Process automation is key for TEMTransmission electron microscopy (TEM) is another area where industry cooperation will fuel progress.“People throw around the phrase ‘exponential growth,’” said James Amano, senior director, International Standards at SEMI. “It’s usually a gross exaggeration, but not when it comes to TEM data. That’s because demand for more TEM data, which uniquely enables innovations around smaller feature sizes, has exploded. At the same time, TEM data is a bottleneck in the fab. Operators literally use tweezers to carry around electron microscope samples by hand, and that is untenable.” TEM sampling standards are currently being formulated under the SEMI Standards development process. “Applying a model that we have employed successfully time and time again through SEMI Standards, we are gearing up for process automation in TEM,” Amano said. “We’ll start by establishing a grid carrier standard for electron microscopy. Through ongoing standards efforts, we may realize a fully automated TEM process within just a few years. That achievement will enable exponential growth in shrinking design geometries.”Energetic materials gain safety standardAlong with wafer-level packaging and design shrinks, the push for safety in materials’ usage is a hotbed of innovation. This is especially true with energetic materials, the potentially hazardous process chemicals used increasingly in semiconductor manufacturing to spur advances in materials purity, integrity and quality.“When you’re working with energetic materials, if you don’t get it right, you may face serious yield and cost issues, and most important of all, safety risks,” said Paul Trio, senior manager of strategic initiatives at SEMI. “This isn’t a theoretical concern. Real problems occurring in fabs have made an energetic-materials standard a high priority for the industry.”“After years of collaborating with companies across the supply chain to address this significant challenge, we recently published our 1000th SEMI Standard around safe usage of energetic materials,” Trio said. “Now manufacturers can turn to a new standard – which will evolve dynamically in response to industry changes – as they employ energetic materials in their quest to achieve higher yields while controlling costs and managing safety risks.” Whether it’s packaging, design shrinks, materials or other key innovations, standards are essential to progress in microelectronics. From equipment and materials suppliers that provide the most advanced, efficient and safest tools, materials, and processes to device manufacturers that get products to market, all stakeholders in the microelectronics ecosystem benefit from SEMI Standards. Are you curious about the areas of process technology where innovations are likely to occur? Would you like to get involved in standards efforts that could have an impact on your business? Take a look at the activity of SEMI Standards Committees and Task Forces. Because that’s where innovation, pragmatism and a commitment to harness industry resources come together.Use your voice to affect standardization in and around the microelectronics industry. Learn about SEMI Standards – and become part of the solution. Heidi Hoffman is senior director of technology communities marketing at SEMI. Hoffman and her team shine a spotlight on the work of the more than 20 technology communities under the SEMI electronics manufacturing supply chain collaboration platform. Actively engaging community members in marketing programs that showcase their unique value, Hoffman’s team helps companies to grow and prosper through the power of connection, collaboration and innovation. [i] Status of Panel Level Packaging report, Yole Développement, 2018

No, that wasn’t a fancy chandelier on the periphery of ES Design West’s exhibit area, the co-located event at SEMICON West. It was IBM’s Q quantum computer, a striking bit of industrial design that looks like a chandelier from a stately ballroom.While it resembled an ornate lighting fixture, IBM Q does much more than illuminate a room. The Q contains 20-quantum bits (20 qubits), equivalent to 2**20 or two to the 20th power classic bits. Impressively, IBM is currently readying (or may already have) a 50-qubit computer.During ES Design West, IBM demonstrated the Q Experience quantum cloud services platform and Qiskit, an open source quantum software framework. IBM’s booth staff showed how Q can solve problems beyond the practical reach of even today’s conventional supercomputers. Examples include the Traveling Salesman Problem (TSP) of finding the shortest route to enable the salesman to visit every city once and return to the starting point. Other examples are chemistry, drug and medicine discovery, weather and climate modeling, and security and advanced cryptography.The demos did even more, highlighting just how far semiconductor design and manufacturing advances have come to make quantum computing architecture possible.We have Dr. Jeffrey Welser, vice president of IBM Research–Almaden, to thank for bringing Q to SEMICON West and ES Design. During his keynote, The Future of Computing: Bits + Neurons + Qbits, he noted that Quantum computing holds the potential to solve problems even the most powerful classical computers cannot and challenges our community to drive innovation from materials to devices to systems. Both he and the booth staffers made the point out that Q will not replace conventional computing but augment it to solve complex problems beyond computational limits and/or the storage capacity of conventional computers.Challenges of Quantum Computing are not insignificant, however, and start with coherence time or the time interval over which the qbit is in a quantum state. The 20-qbit Q shown at ES Design West has a coherence time of 90 microseconds. Noise and variance are other challenges. The IBM booth staff said that a typical program must be run at least 1,000 times. Results are filtered with the extremes removed to get the most consistent result.Fault tolerance is high on the list of challenges as well because a solution for fault tolerance in quantum computing has yet to be discovered. Users like us take fault tolerance for granted in modern classical computers, addressed in hardware and firmware. Programmers don’t need to be concerned about it because the computer takes care of it through error correction.Finally, Q and most other quantum computers require near 0 Kelvin temperatures to operate. The refrigeration systems are large, expensive and not easily portable. Research is ongoing to find materials, such as carbon nanospheres, that will allow quantum computing at room temperature.Most experts agree that we are years away from practical deployment of large quantum computer systems. IBM’s open system for users around the world to access a Q computer to run programs is helping drive the way forward.Robert (Bob) Smith is Executive Director of the ESD Alliance, a SEMI Strategic Association Partner. He is responsible for the management and operations of the ESD Alliance, an international association of companies providing goods and services throughout the semiconductor design ecosystem.

On July 1st, Japan’s Ministry of Economy, Trade and Industry (METI) announced updated licensing policies and procedures on the export and transfer of controlled items and their relevant technologies to the Republic of Korea (ROK). METI’s stated purpose for the actions were “in order to ensure appropriate implementation of export control.”In particular, METI will tighten controls on certain items and their relevant technologies as follows: Remove the ROK from its “white list” of trusted partners, limiting the ROK’s preferential treatment for exports Mandate individual licenses for exports of certain chemicals including fluorinated polyimide, photoresist, and hydrogen fluoride – all used in semiconductor and electronics manufacturing – and technology transferred with exports of manufacturing equipment to the ROK. Bulk licenses for the chemicals will no longer be available. METI has indicated that its actions were not intended as punitive, but rather as necessary to ensure proper management of the export control system and the effective tracking of chemicals, materials and technologies that could be used to develop weapons of mass destruction (WMDs). Nevertheless, the trade actions are cause for concern as they could have a negative impact on our members operating in Korea and Japan and the global supply chain in general.After the METI announcement, SEMI immediately consulted its International Board of Directors and assembled a global advocacy response team comprised of SEMI member companies and SEMI regional presidents in both Japan and Korea to assess risks to SEMI members operating in both regions and to the industry’s global supply chain. Additionally, SEMI conveyed its concerns to Japan and ROK trade officials, stressing that the semiconductor industry will bear the brunt of the new measures if the trade dispute escalates.SEMI president and CEO Ajit Manocha said: “We informed both governments of potential impacts of an escalation to SEMI members, their economies and the global supply chain and are encouraging them to resolve their differences. SEMI’s focus is to ensure the global microelectronics supply chain remains strong and intact.”SEMI member companies have stated that METI and the Japan government have provided assurances that trade with the ROK will not be encumbered and that semiconductor companies will see minimal impact regarding export license approvals. To this end, SEMI will continue to engage our members in Korea and Japan, monitor the dispute as it continues to unfold, and facilitate regular meetings between industry and the involved governments to ensure that industry impacts are identified and risks are mitigated. In the event the dispute escalates, SEMI is prepared to take action in accordance with its Global Trade Principles.SEMI released its Global Trade Principles last year to provide guidance to governments around the world in developing policies that benefit both regional economies and the industry. These trade principles are based on SEMI’s four trade pillars of free and fair trade, open markets, supply chain growth, and respect for IP and national security.Member companies negatively impacted by any changes in Japan’s regulatory policies or with any questions should contact their regional SEMI office or Jay Chittooran, Public Policy Manager, SEMI Global Advocacy, at [email protected] Russo is Vice President of Global Industry Advocacy at SEMI.

Every day it seems like a new portable voice-first device is coming to market. From smart speakers small enough to fit in your pocket to tiny wireless earbuds and voice-activated TV remote controls, we are using voice increasingly to play music, select TV shows, turn on the lights or interact with our smart thermostat. While the popularity of voice-first interfaces has spawned massive diversity in device type, as long as these devices are portable, they have one thing in common: They’re battery-powered, and that could be a problem for consumers who are tired of frequently recharging or replacing batteries. Change the Architecture, Reduce the PowerThe issue lies in the traditional hardware architectures of today’s voice-first devices, which are notoriously inefficient when it comes to power consumption. Such devices rely on a “digitize-first” model of processing voice data in which the heaviest power-consumers, like the analog-to-digital converter (ADC) and the digital signal processor (DSP), do all the heavy lifting up front, right at the start of the audio signal chain. They continuously digitize and analyze 100% of the ambient sound data as they search for a wake word, even if speech is not present and the only sound is noise. Because voice is spoken randomly and sporadically, that continuous digitization of sound wastes up to 90% of battery power.To tackle the battery drain in portable voice-first devices, we need look no further than the human brain. Our brain processes sound very efficiently. Imagine that you are outside your house having a conversation with your neighbor. You are able to focus on what your neighbor is saying because your brain can differentiate between sounds that it should send to the deeper brain for speech processing and sounds that it shouldn’t bother processing further (e.g., dog barks, sirens or car traffic). The brain spends minimal energy up front to decide whether it should spend additional energy on processing down the line. In other words, it saves the most power-intensive processing only for the important sounds.We can mimic the brain’s approach to signal processing by enabling a new “analyze-first” architecture for voice-first devices. This analyze-first approach requires ultra-low-power analog processing technology that can differentiate voice from noise before the sound data is digitized. This keeps the higher-power capabilities in a voice-first system, such as the wake-word engine, in a low-power mode when just noise is present. This approach only wakes up the higher-power chips in the system, e.g., the DSP or ADC, when it detects speech. Like our brain, a voice-first system uses an analyze-first architecture to conserve energy most of the time, saving the heavy lifting, i.e., the wake-word listening, for times when speech is present. The analyze-first architectural approach to always-on listening analyzes the analog microphone prior to digitization, saving considerable power in portable voice-first devices that run on battery. This architectural shift to analyze-first is well worth the investment because it reduces the system’s power consumption in a battery-powered voice-first device by up to 10x. That’s the difference between a portable smart speaker that runs for a month on battery instead of a week or smart earbuds that last for a whole day instead of a few hours on a single charge. Longer battery life in portable voice-first devices generates more good will among consumers, creating another key differentiator for manufacturers engaged in the ultra-competitive race for more users.For more information on the analyze-first architectural approach to voice-first devices, please view our video.Tom Doyle is CEO and founder of Aspinity. He brings over 30 years of experience in operational excellence and executive leadership in analog and mixed-signal semiconductor technology to Aspinity. Prior to Aspinity, Tom was group director of Cadence Design Systems’ analog and mixed-signal IC business unit, where he managed the deployment of the company’s technology to the world’s foremost semiconductor companies. Previously, Tom was founder and president of the analog/mixed-signal software firm, Paragon IC solutions, where he was responsible for all operational facets of the company including sales and marketing, global partners/distributors, and engineering teams in the US and Asia. Tom holds a B.S. in Electrical Engineering from West Virginia University and an MBA from California State University, Long Beach. For more information, visit www.aspinity.com. Aspinity is a member of SEMI-MEMS Sensors Industry Group, which connects the MEMS and sensors supply network, allowing members to address common industry challenges and explore new markets.

This article is the second in a series highlighting the vital importance of SEMI Standards to commemorate the publication of the 1000th SEMI Standard in July 2019. Find the entire series here.Chip traceability. It’s one of the next big things for the technology industry. The benefits are enormous, and the upsides — which include enhancing yields by identifying the sources of reliability issues, fighting counterfeiting, and growing the overall technology market by enabling new applications — are plentiful.But the implementation challenges of chip traceability are also big and will require considerable effort to overcome. Perhaps the biggest hurdle of all is that we need to transcend industry fears by demonstrating that we can secure IP when it is shared across the hardware supply chain. What will drive the technology industry to make the necessary investments in traceability? “Automotive will drive traceability,” asserted Doug Suerich, product evangelist at PEER Group and an active participant in the SEMI Standards Traceability Committee. “If I had to guess, the autonomous car in particular will drive a traceability-standard effort.”Where Reliability is CriticalWhen your laptop crashes, it’s annoying. But when a car crashes because of a system failure, the damages can be severe and catastrophic It’s also one that is poised to get exponentially larger as we see ever greater amounts of silicon content in vehicles.Fortunately, everyone can agree on the nature of the solution. The industry needs to create a standard for traceability throughout the supply chain. When lives are at risk, we must find and fix the manufacturing source of any defects that affect reliability. That’s understood. Now it’s the not-so-small matter of figuring out the details.Of course, it’s not just about cars. Manufacturers and users of medical devices and military platforms also put a premium on extended, high levels of reliability. In the technology industry, however, the automotive market represents such enormous growth potential that we view it as integral to future industry success.At a market size of more than $1 trillion, automotive is steadily becoming a high-tech market as cars transform into advanced technology platforms that offer partially or fully autonomous features. Vehicles are fast becoming semiconductors on wheels. With leaders from Google to General Motors investing heavily in chip advances, the automotive industry will demand a supply chain that requires chip and device traceability from all its participants.The SEMI Technology Communities and Standards Committee have made some inroads toward solving the traceability challenge with their development and publication of a SEMI Standard enabling traceable device-level identification (ID) throughout the IC manufacturing, test, and assembly processes to the point of use in the final system. The standard is a meaningful first step but overcoming the challenges of counterfeiting and information sharing remain and will require greater industry collaboration.“It comes down to a safety issue,” said Suerich. “We need the ability to collect data across the supply chain, so we can trace down the source of a reliability issue, analyze the data and take corrective actions around applications for which safety is critical. Automotive, medical and aerospace devices need to keep working over five, 10 or even more years. For the semiconductor industry, that means redefining yield.”Traceability Roadmap“It’s going to be a major challenge to share data throughout the supply chain, not just technologically, but culturally as well,” added Suerich. “It will take a concerted effort, and we’re just in the early stages of figuring out some of the IP protection issues.”While traceability is new ground for the culture of the semiconductor industry, the automotive industry has long embraced tracing the sources of defects. In some cases, automotive suppliers have issued wide-ranging product recalls due to safety concerns. The Takata airbag defect, for example, resulted in tens of millions of recalled airbags. As the automotive and semiconductor supply chains increasingly overlap, SEMI committees and task forces are in an ideal position to model traceability best practices in after those implemented by the automotive industry.“We’re going to need an organization like SEMI to coordinate and organize this,” observed Suerich. “While we’re still in the early phases of figuring this out, the market potential around automotive has attracted a critical mass of powerful companies who want a solution. We need to standardize a way to tag which information can flow up and down the chain, and which is protected. I think we’re looking at more than five years of hard work around new standards.”Semiconductor companies are understandably cautious about sharing data related to their proprietary processes because the value of the intellectual property and need to protect data is simply higher than in many other industries. “Automotive offers the perfect confluence of factors to drive traceability in semiconductors,” Suerich concluded. “There is increasing silicon content as well as lives and big money at stake, and motivated players at leading companies and within government institutions want to see progress.”Use your voice to affect standardization in and around the microelectronics industry. Learn about SEMI International Standards – and become part of the solution. Learn more about SEMI's traceability activities. Heidi Hoffman is senior director of technology communities marketing at SEMI. Hoffman and her team shine a spotlight on the work of the more than 20 technology communities under the SEMI electronics manufacturing supply chain collaboration platform. Actively engaging community members in marketing programs that showcase their unique value, Hoffman’s team helps companies grow and prosper through the power of connection, collaboration and innovation.

AI vs. energy. Quantum for everyone. Biofabrication of human organs on a mass scale. Slowing advancements from Moore’s law.In the midst of a market dip, optimism reigned as keynote and AI Design Forum speakers addressed both looming challenges and explosive market opportunities during July 9-10 presentations at SEMICON West 2019 in San Francisco. SEMICON West again proved to be a magnet for visionaries who laid out the path to electronics innovation over the coming years.“The current business environment demands that the industry looks ahead toward issues that need attention sooner, not later – especially since we are approaching a once-in-a-generation inflection point that has the potential to be a $10 trillion opportunity,” observed SEMI Americas president Dave Anderson.Market forecasts punctuate the point: The microelectronics supply chain is on the verge of what has the potential to be the longest-lived electronics era.“Inflection points like this are rare, but not unprecedented,” Anderson added, citing 2007 as the inflection of the growth curve from new technologies that led to last year’s historic high semiconductor sales.SEMICON West squarely focused on the future, with a number of industry leaders noting that chip, tool and materials makers need to look beyond their immediate suppliers and customers in developing strategic partnerships. Dr. Cliff Young, data scientist with the Google Brain Team, for one, invited semiconductor and equipment firms to explore chip codesigning opportunities with his Google.The recently formed Quantum Economic Development Consortium – and its 50 members including Boeing, Google and IBM – debuted roadmapping activities devoted to the pursuit of U.S. leadership in the rapidly emerging global quantum computing industry. IBM’s Jeff Welser showcased the IBM Q Computer model built upon decades of semiconductor industry advances. Markets that could see staggering leaps from a quantum computational capacity include automotive, medical, financial and energy. Today, anyone can dabble with the future quantum computing capabilities by connecting online with IBM’s 16-qubit quantum computer. Dr. Aart de Geus, chairman and co-CEO of Synopsys, suggested that software and other programming tends to develop more quickly if it is open sourced. He recommends an open source model that allows semiconductor and equipment companies to work together in the cloud to speed chip development.Nate Baxter, TEL development and production group general manager, advocated sharing big data with competitors in pre-competitive spaces to ensure data quality, improve measurement and solve problems faster. The key is security. “Yes, we can share data while protecting it,” he said. “We’re quickly seeing opportunities that we didn’t know existed.”Gary Dickerson, Applied Materials president and CEO, said that embedding artificial intelligence (AI) in chips will drive significant long-term industry growth by processing far more big data computations much faster than humans can.That is, if there is enough electricity. Almost invisibly, AI-enabled machines already are crunching massive amounts of data while gulping power in the process. As AI use rapidly expands, current power grids will be stressed as never before. Dickerson added that speed of innovation, societal acceptance, security and safety will guide how well and quickly AI is adopted. A potential hurdle, however, is sustainability. He warned power constraints could be “very high” and a “barrier to AI adoption if we don’t drive innovation” in substantially reducing the power draw of power-hungry AI chips.Of the five members of a venture capitalist panel, four agreed that Moore’s Law as we knew it is dead. The promising news is that the average age of a first-time mobile phone user is 10, more than 40 percent of the world population is now under 25 and about to wield considerable market influence, and 5G is on the cusp of helping connect trillions of devices. AMD CEO Lisa Su noted “there’s a tremendous amount of innovation yet to come” from microarchitectural advances, chiplets and die stacking, and heterogenous platforms.And there’s nothing more innovative – or intriguing – than regenerating human organs in mass volume. Legendary inventor Dean Kamen laid out his well-funded plans to biofabricate the viscera of human existence but warned of two crucial missing pieces – scale and talent. “I’m here at SEMICON West to beg for high-tech’s help in getting artificial human organs out of labs and ramped up for volume manufacturing and widespread distribution,” Kamen said during his keynote. “The basic science already exists, but researchers can’t bring it to scale like Silicon Valley can.”The talent Kamen needs to fulfill his dream will come from the pool of skilled workers the microelectronics industry is feverishly working to recruit to make good on its own ambitions. As if on cue, SEMI endorsed Kamen’s FIRST Global program, establishing a united effort to encourage young people worldwide to pursue engineering careers. “Together, we can better help provide a path to success for generations to come,” SEMI’s Anderson said.Scott Stevens, SEMI

Renesas, one of the world’s very top MCU manufacturers, is heralding its new FD-SOI based R7F0E017 for energy harvesting applications. In an in-depth article in the May 2019 edition of EENews Embedded, Renesas Product Marketing Manager Graeme Clark detailed the new chip, which is sampling this year. It’s a fascinating read, with lots of explanations about how SOI enables the cutting-edge features (like an integrated energy harvesting controller) – you won’t want to miss it. BTW, here at ASN we’ve been covering the origins of this technology since 2005.They call it SOTB, for Silicon On Thin Box, but it is indeed their flavor of FD-SOI. The work started at Hitachi in cooperation with Renesas with a paper that debuted at IEDM 2004, then moved along through the series of mergers that resulted in the offering at what is Renesas Electronics today. Here are some key quotes from the article:“The new SOTB process can now offer active mode current of less than 20 µA/MHz and leakage currents down to 150 nA, while still allowing the development of devices with reasonably high clock rates, large embedded flash memories and SRAMs on chip. This combination of integration and power consumption will make devices developed on this process ideal for energy harvesting applications. The result of this new process is that we can develop a new generation of microcontroller products.” “The use of the Silicon on Thin Buried Oxide technology on this new device has resulted in some unique low power characteristics. The first device has the following features and future devices using this process could offer even lower power consumption. Active current of 20 µA /MHz Standby Current of 200 nAADC operation 3 µA @ 32 kHz256 Kbyte SRAM with 1 nA / Kbyte standby current” “The R7F0E017 is able to run safely from a pure energy harvesting power source due to the operation of the Energy Harvesting Controller. The device can operate from a wide range of potential energy sources including solar power, vibration, pressure and temperature difference, and many others. The integrated energy harvesting controller, supported by very few inexpensive external components, completely manages the cyclic wake-up sequence of the microcontroller, only using the extremely low energy harvesting source current.”Click here to read the full article on the eenewseurope website.

2019 will be a busy fall for the SOI Consortium and our members.First off are the SOI Consortium events in Shanghai and Tokyo, which are very popular indeed. We now have the dates locations locked in, so you’ll want to mark your calendars:Shanghai: 16 17 September 2019, FD-SOI Forum / RF-SOI Workshop. Both days will be held at the Pudong Shangri-La Hotel in Shanghai. The first day will focus on FD-SOI. The second day is all about 5G and RF-SOI. These are huge events – to get an idea of the magnitude, you can read our coverage of the 2018 event. Tokyo: 30 31 October 2019, Japan SOI Design Workshops. This year both days of workshops will take place in the Yokohama Landmark tower. The first day will be devoted to FD-SOI; the second day turns to More-Than-Moore – especially photonics and MEMS. Last year’s workshops were packed with excellent presentations and panel discussions, which we covered here. The SOI Consortium and members will also be giving talks at Semicon Europa, which is being held 13 – 15 November 2019 in Munich, Germany. The programs are currently being finalized. As soon as they’re ready, we’ll be sure to let you know so you can register and/or share the news with your colleagues and clients. But in the meantime, make sure you save the dates.Would you like to check out the presentations given at Consortium events in previous years? If you hover your cursor over the Events tab at the top of our home page, you’ll get a drop-down menu of events for the last five years (we’re working on adding more – we’ve been doing these events for over a decade!). Click through to any past event and you’ll land on a page where you can download most of the presentations that were given there. Of if you’re looking for past presentations given by any particular company, use the search engine at the bottom of any page on our website. S3SYou’ll also find many of our members at the IEEE/EDS S3S Conference in San Jose, CA, October 14 – 19th. S3S (formerly known as The SOI Conference) has been running in various forms for over 30 years. They always have an excellent line-up of speakers, plus it’s a great opportunity for networking with researchers from across the worldwide SOI ecosystem. BTW, while the deadline for general paper selection has already closed, papers of exceptional merit are currently being accepted for their Late News Sessions. See the 2019 Call for Papers for more information – those Late News papers need to be received by 23 August 2019 for consideration. Also, IEEE S3S Conference will once again host a full-day short course and a half day tutorial. These are very popular. The short course this year will be on SOI Design and Technology for Analog and Mixed Signal. As of this writing, the program is still being finalized, but more will be announced in the next few weeks, so check back on their website soon for updated information.Member EventsAnd finally, don’t forget to learn more about the offerings from and in support of the SOI ecosystem at our members’ events around the globe, including: GlobalFoundries – GTC | Samsung Foundry – SFF | ST – Technology Tour | Synopsys – SNUG | Cadence – CDNLive | Silvaco – SURGE | Arm – TechCon | NXP – Tech Days | Leti – Events | imec -Events |

This article is the first in a series highlighting the vital importance of SEMI Standards to commemorate the publication of the 1000th SEMI Standard in July 2019. Find the entire series here. More than 40 years after establishing the SEMI International Standards program, SEMI recently announced its 1000th SEMI Standard – a safety guideline for handling energetic materials. Creating a resource for unpredictable changes in materials is the type of challenge the SEMI International Standards program is often called upon to tackle – where the standard is merely the end of the beginning. The semiconductor industry has learned to expertly control its facilities, equipment and components. The next logical step is materials. It’s common knowledge that the industry drives innovation with new process materials and enabling safer material exploration is critical to the industry’s success. Classification Schema The 1000th SEMI Standard provides three classifications of energetic materials and byproducts based on three criteria: Hazardously exothermic (large amount of heat released following a trigger event such as heating or a physical shock) Pyrophoric (self-igniting upon air exposure) Water-reactive (releasing a large amount of energy or flammable gas upon contact with water) Unsafe handling of any of these byproducts can, to put it mildly, result in a bad day for a fab or lab. The leader of the Energetic Materials Task Force and an expert in process and equipment risk assessment at his company Safety Guru, Eric Sklar recounted one of the stranger incidents. A cleaning crew detached a pipe from a piece of equipment associated with a process recipe that used no energetic materials. The team set it in a sink, sprayed some water to begin cleaning it, and the pipe ignited in flames. Remarkably, although the initial materials weren’t energetic, the process created new byproducts that were very much so. Standardizing on Shifting Ground Energetic materials are new ground for standards and that ground is shifting, with much more material innovation to come. The upshot is that it is particularly important that the energetic materials standard is dynamic. By design, all SEMI Standards are malleable – continuously shaped by the demands they aim to meet. The release of this document is nowhere near the end of the work, as the standard will evolve to keep pace with continuing materials innovation. Creating a Robust Materials Supply Chain SEMI Standards create the conditions for a more robust materials supply chain and sustain the needs of business. If the standards safeguards are too burdensome, they will never be adopted. Conversely, without protections, people and equipment are unnecessarily put in harm’s way and innovation slows. SEMI’s Energetic Materials Task Force members realized early on that the industry needed a standard that would be practical to implement and flexible enough to be optimized over time. They understood that collaboration and compromise, while time-consuming, are also essential for standards’ creation. They determined roles and responsibilities across the supply chain, and they struck delicate balances between sharing no information about the intended uses of potentially dangerous materials and sharing everything about proprietary process recipes. The sheer scope of this standard necessitated a multi-year timeline. “The effort began with SEMATECH assembling its members’ views about energetic materials safety,” said Eric Sklar. “It then required years of effort from SEMI to bring the key industry participants together to create pragmatic guidelines that address the challenges around energetic materials in the supply chain.” Only Getting Started Despite all the work, one certainty is that the standard isn’t perfect for the present and can’t reflect future demands. This is why the energetic materials standard is not a static document, but a living process that is in its germinal stages. Key players continue to shape the standard, and that’s fundamental to enabling future materials innovation and ultimately reducing the number of unexpected energetic materials reactions in fabs. The variables in standards development are numerous and ever-changing. Energetic materials only magnifies the need for the broad collaboration that SEMI has facilitated for more than 40 years. While the risks posed by energetic materials are substantial, the criticality for continued innovation is undisputed. Now, with its adoption, the work of adapting and modifying this 1000th SEMI Standard is only about to begin. Use your voice to help drive standardization in and around the semiconductor industry. Learn about SEMI Standards – and become part of the solution. Register to receive Standards Watch, SEMI’s quarterly e-newsletter. Heidi Hoffman is senior director of technology communities marketing at SEMI. Hoffman and her team shine a spotlight on the work of the more than 20 technology communities under the SEMI electronics manufacturing supply chain collaboration platform. Actively engaging community members in marketing programs that showcase their unique value, Hoffman’s team helps companies grow and prosper through the power of connection, collaboration and innovation.

Global business conditions remain uncertain but the electronic sectors appear poised for growth in late 2019 or early 2020. Normal seasonality will fuel short-term sales increases through late autumn but real growth is still a ways off.