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A short trip to Monterey, California provided an exciting glimpse into what is in store for the future. Along with 550 attendees and 60 exhibitors, I took a quick visit through the aisles and conference venue to find several exciting developments this year!So many exciting new products are on the horizon. Dr. Peter G. Hartwell, CTO of InvenSense, A TDK Group Company, provided a view future of the way sensors including optical, audio, balance, direction, location, and chemical will provide improvements over human capabilities. A glimpse into our future experiences with a 360-view winter wonderland experience of riding a snow mobile using two 180°C fisheye lens cameras with his presentation “Sensors: Where Reality Meets Virtual.” The only warning was that with so many cameras and social media privacy is lost!Dr. Hans Stork, CTO, ON Semiconductor discussed some of the recent investigations his company has made on the many LiDAR sensors. He enlightened listeners with more details of the optical/LiDAR Fusion with FUSE ONE that was unveiled at CES 2019. Future cars will have a combination of cameras, LiDAR, radar, and ultrasonics. No one sensor has it all. There are many companies offering LiDAR for automotive applications, but the products are still too expensive and the market will shake out over the next few years. Douglas Hackler, CEO, American Semiconductor presented the company’s achievement in flip chip on flex circuit assembly for a variety of applications, including pharmaceuticals, wearable wristbands, and IoT communications. Interconnects supported include ACA, ACF, advanced z-axis materials, and low temperature solder. He also described flexible hybrid electronics using printed electronics and a wafer CSP assembly for sensors. With this operation located in Idaho, products can be assembled in the U.S. Jean-Charles Souriau from CEA-Leti described the organization’s detailed research in developing in flip chip assembly on a flexible label with a thin die. A gold stud bump flip chip and thermo-compression bonding with glue is used to attach the die to a flex substrate. A polymer fabricated on thin glass was also demonstrated. Clearly, much progress has been made in flexible printed electronics in the last year with many presentations describing progress. Results of a benchmark study conducted at Cal Poly examined some of the key developments in bump materials and interconnect methods. Key areas such as antennas, batteries, PV and energy harvesting, a variety of sensors, and audio technology were investigated. Dr. Pradeep Lall presented work examining developments in conductive inks for 3D printed electronics.Dr. Subu Iyer and his student, Arsalan Alam, of UCLA presented some exciting research on heterogeneously integrated foldable display on elastomeric substrate, FlexTrate™, using vertically corrugated interconnects. This can be considered fan-out wafer level packaging. The work holds much promise for applications including foldable displays, wireless powered systems and surface electromyography systems. Fine pitch ≤40 micron interconnects bendable to 1 mm bending radius passed more than 6,000 bending cycles. Dr. Mark Poliks of Binghamton University described their work on the development of a wearable flexible hybrid electronics ECG monitor. While the work is in the early stages, human trials will soon begin and the results look promising. New materials will be key in the future products. Reliability test data was also presented on aerosol-jet printed traces on Upilex-S, including tensile, peel and bend testing, as well as “healing” of the damage. New product introductions included U.K’s Peratech’s EDGE force-sensing solution targeted form smartphones, wearables, and tablets. In this HMI solution, Peratech’s thin sensors are mechanically integrated into key areas of the smartphone to capture a user’s natural single-handed grip, ergonomic finger movements, intuitive pressure sand squeezes to control key functions. It even works with the users has wet hands or is wearing gloves! This eliminates the need for physical button openings and allows the implementation of a thinner, more contoured device with a rigid-metal chassis. Next year’s event will be in San Jose during the last week of February. Stay tuned to SEMI’s website for more details.Jan Vardaman is president and founder of TechSearch International, Inc., which has provided market research and technology trend analysis in semiconductor packaging since 1987. She is the co-author of How to Make IC Packages (by Nikkan Kogyo Shinbunsha), a columnist with Printed Circuit Design Fab/Circuits Assembly, and the author of numerous publications on emerging trends in semiconductor packaging and assembly. She is a senior member of IEEE EPS and is an IEEE EPS Distinguished Lecturer as well as a member of SEMI, SMTA, IMAPS, and MEPTEC.
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SEMI is excited to recognize Katie Maloney of Edwards Vacuum as the SEMI Spotlight on Women Honoree for Q1 2019!Spotlight on SEMI Women celebrates the many accomplished women who work in the global microelectronics industry. Nominees in the quarterly spotlight include women who are beacons of knowledge, leaders of organizations and initiatives, hidden heroes and innovators in our industry. They are volunteers, protectors, intellectual disruptors and activists. Learn how you can nominate a woman for Spotlight on SEMI Women.With nearly 20 years in the microelectronics industry, Katie Maloney has always been a leader and agent of change. She launched her career pathway as a student at the University of Notre Dame on an ROTC scholarship. Her passion for science and technology led to a degree in aerospace engineering. After graduation, Katie began her military commission in the United States Navy as a Division Officer and Command Training Manager within the Nuclear Engineering school. Katie ultimately decided she wanted to manage people while continuing to focus on technology as a fundamental aspect of her career. Driven by a vision for her future, Katie worked full-time and attended the University of Central Florida, earning a master’s degree in engineering management. Katie’s leadership continued to shine despite her workload, and during Katie’s commission the U.S. Navy recognized her for multiple accomplishments. Most notably Katie was awarded “Instructor of the Year” for her classroom teaching.Katie’s journey at Edwards Vacuum began 10 years ago as a site manager for its largest customer. Through her strong leadership skills, Katie has made a difference at Edwards Vacuum, exemplified the semiconductor industry skill set, and helped customers meet their goals. The Edwards executive management team has recognized Katie’s creative thinking. After her recent promotion to business line manager responsible for a Global Account team, Katie put her ideas and leadership to work by mobilizing her team to drive significant improvements in EUV development, contract management and team building at Edwards. Katie’s military experience shaped her career, a formative influence that inspired her passion early on to support military veterans by helping them transition from military to civilian life. She understands the valuable skillsets veterans bring to the microelectronics industry and she dedicates time to help them understand how their skills can translate into opportunities.Cristina Sandoval is manager of Workforce Development at SEMI.
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At the SEMI FLEX 2019 and MEMS Sensors Technical Congress (MSTC) (MSTC) February 18-21 in Monterey, California, I had the pleasure of meeting many old friends and colleagues as well as making some great new acquaintances. With MEMS and sensors still a relatively young industry, I am delighted that our community is thriving. We continue to see double-digit growth rates, there is plenty of innovation, and the technology generates massive amounts of data that gets everyone excited about artificial intelligence, deep and machine learning, and blockchain. Those are all the buzzwords that any tech startup needs for funding these days.While it is hard to single out any one presentation at conferences, I was particularly struck by Nadia Shakoor’s keynote address, “Driving Advances in Crop Breeding and Smart Farm Management.” From Nadia I learned that the world’s largest agriculture sensing platform was a mere 45 minutes south of where I live in Phoenix, Arizona. This is a major embarrassment to admit as I have lived here for almost 30 years, have been involved in MEMS and sensors for a decade, and have a particular passion for the use of sensors in agriculture and food to improve crop yields and food quality, and to reduce food waste. This humongous sensor was hiding in plain sight right under my nose!After Nadia’s keynote, I just had to speak to her at the break. Nadia is the senior research scientist and project director for TERRA-REF at the Danforth Plant Science Center based in St. Louis, Missouri. Nadia’s work employs field-level crop phenomics, the biological study of the set of physical and biochemical traits belonging to a given organism (phenomes). Phenomes are fascinating because they change in response to genetic mutation and environmental influences. The Danforth Plant Science Center and its partners are involved in many phenotyping projects using autonomous vehicles, drones, field scanners, satellite imaging and more.After the FLEX MSTC event, I emailed Nadia to ask if I could visit the field scanner and her partner team at the University of Arizona in Maricopa, Arizona. She kindly introduced me to Maria Newcomb, a plant research scientist at the site, who gave me a good look at this mother of all field scanners: the Transportation Energy Resources from Renewable Agriculture Phenotyping Reference Platform (TERRA-REF). TERRA-REF aims to transform plant breeding by using remote sensing to quantify plant traits such as plant architecture, carbon uptake, tissue chemistry, water use and other features to predict the yield potential and stress resistance of 400+ diverse sorghum lines. The TERRA-REF Field Scanner at the University of Arizona Maricopa Agricultural Center. It’s the largest field crop analytics robot in the world, one that’s critical to the crop research underway at the Donald Danforth Plant Science Center in St. Louis, Missouri. Source: Steve Whalley TERRA-REF’s Lemnatec Field Scanalyzer is the largest field crop analytics robot in the world. This high-throughput phenotyping field-scanning robot has a 30-ton steel gantry that autonomously moves along two 200-meter steel rails that have recently been extended another 170 meters. It continuously images the crops growing below it by using a diverse array of cameras and sensors to observe the field at a dense-collection frequency with high resolution. These sensors include RGB stereo; thermal, chlorophyll fluorescence imaging system; hyperspectral cameras; a 3D laser scanner; and environmental monitors.Plant breeding is currently limited by the speed at which phenotypes can be measured, and the information that can be extracted from these measurements. Current instruments used to quantify plant traits do not scale to the thousands or tens of thousands of individual plants that need to be evaluated in a breeding program. The TERRA-REF field scanner system, on the other hand, uses sensors to scan over one acre of plants, collecting thousands of daily measurements throughout the growing season, and these are used to determine plant phenotypes and inform breeding decisions. TERRA-REF’s advanced sensor technologies include: Hyperspectral (250nm-2500nm) Thermal Infrared 2D and Stereo RGB PSII chlorophyll fluorescence 3D laser Environmental sensors The TERRA-REF field scanner platform features a massive sensor-rich scanner head. Source: Steve Whalley The humongous TERRA-REF field-scanner was certainly a sight to behold, looming like a cargo-ship container crane in the vast flat plains of the Arizona desert landscape. I’ve only scratched the surface of what this enormous sensor platform can accomplish so if you are a MEMS/sensor company interested in agriculture and food production, I encourage you to get more information at terraref.org and pay a visit next time you are in the area.Steve Whalley, CEO, Strategic World Ventures, is a strategic consultant to SEMI-MEMS Sensors Industry Group (MSIG). He also consults with established and emerging semiconductor, MEMS and sensors companies.
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Technologies promising huge growth such as Artificial intelligence (AI), 5G, machine learning, high-performance computing, and telematics are ratcheting up pressure on semiconductor manufacturers in the race among product makers to accelerate time to market and capture share. To support rapidly evolving end markets for these and other technologies that are key drivers of industry growth, chipmakers are boosting semiconductor performance, producing more wafer sizes and improving manufacturing efficiency.At the same time, chip manufacturers must enable unprecedented end-product reliability for exploding markets such as automotive and healthcare markets where, with lives at stake, products can’t afford even the slightest lapse in reliability. In response, chip suppliers are retooling their manufacturing processes to support 3D stacking, package-level integration and miniaturization. But they must do more. Bringing high efficiency to all phases of manufacturing including design and materials is the new imperative. The key to quality management is not in the traditional post-production testing and damage control but in prevention. Delivering the highest quality and reliability must start in the earliest stages of production with manufacturing and testing design – an approach that reduces not only the cost of downstream testing but minimizes product defects that can damage a supplier’s credibility and lead to lost business.To that end, SEMI has launched its Quality Assurance Special Interest Group (SIG) consisting of representatives from industry leaders such as Infineon, NXP, TSMC, UMC, ASE, Unimicron, and GCE. The group's goal is to establish quality requirements spanning the supply chain to meet new, higher reliability standards and help safeguard Taiwan’s competitive edge in the global microelectronics industry. Meeting for the first time earlier this month, the companies exchanged ideas for improving quality management in semiconductor manufacturing and ultimately deliver the reliability the market needs.The company representatives unanimously agreed that the first step is to ensure a QA-friendly environment with quality requirements for various stages of chipmaking ranging from design, manufacturing, packaging and testing to even PCB and CCL production. The SEMI Quality Assurance SIG this year plans to build on its current membership by enlisting companies from various fields to address critical areas of reliability including statistical process control, surface-mount-technology-based board level reliability control, and 0 dppm quality control for automotive chips. SEMI Quality Assurance Special Interest Group consists of leading companies in the industry, including Infineon, NXP, TSMC, UMC, ASE, Unimicron, and GCE. “SEMI’s comprehensive platform of exhibitions, programs, forums, trade meetings and matchmaking events is instrumental in bringing together key industry players to enhance quality management practices and meet the growing reliability requirements of the end markets we serve,” said Terry Tsao, chief marketing officer at SEMI and president of SEMI Taiwan. “The Quality Assurance Special Interest Group is a shining example of how SEMI continues to support the crucial role of Taiwan’s semiconductor industry in the international community.”For more information about the SEMI Quality Assurance Special Interest Group or to become a member, please contact Emmy Yi at [email protected] Yi is a marketing specialist at SEMI Taiwan.
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The world's SOI wafer leader, Soitec is posting strong sales and issuing a steady stream of compelling announcements. This is clearly good news for everyone in the SOI ecosystem, as the outlook for the various families of SOI wafers is excellent. Soitec CEO Paul Boudre told ASN, “I'm excited because of the fundamentals behind the growth. Reaching down the supply chain gives us the ability to help our customers with the next generation. We're not in a technology push, but in a technology pull. It's long-term growth we're seeing.” [caption id="attachment_15532" align="alignleft" width="239"] Paul Boudre, CEO, Soitec[/caption] Soitec has brought people from the device side into the company to better understand the solutions customers need, he said. They're talking to the carmakers, telcos and more, working one-on-one with them to understand the constraints and the problems they are trying to fix, in order to deliver a solution based on the Soitec product roadmap. Boudre is particularly excited about 5G. It's not just new handsets and systems: the entire infrastructure will require a massive upgrade, across which Soitec has a role to play supplying SOI wafers. They also have other SOI and engineered substrates for specific markets like filters, displays, imaging and power. He adds that they're seeing nice growth in SOI wafers for photonics, driven by cloud computing, and for smart power in markets like automotive and white goods. Here's a roundup of some recent developments. Chips made on RF-SOI wafers are in every mobile phone made on the planet these days, so lets look at what they're doing there first. We'll follow that with an update on the surge of activity on FD-SOI wafers. Simgui, RF Power It's no secret that the runaway success of RF-SOI for front-end modules (FEMs) in mobile phones has stretched wafer capacity mightily. To help address this, in February 2019 Soitec and China's SOI wafer leader Simgui announced an enhanced partnership and increased production capacity of 200mm SOI wafers in China, securing future growth. The two companies redefined their manufacturing and licensing relationship to better serve to better serve the growing global market for RF-SOI in mobile and Power-SOI in automotive and consumer electronics. [caption id="attachment_15535" align="alignright" width="936"] (Image courtesy: Simgui)[/caption] Since the two companies signed their original licensing and technology transfer agreement in May 2014, Simgui has mastered Soitec’s Smart Cut™ proprietary process to deliver world-class RF-SOI and Power-SOI products. Simgui’s strategic partnership with Soitec allows them to use the same tools and processes to deliver the same products meeting the same specifications. Simgui has invested in their Shanghai fabrication line in order to double annual 200mm SOI wafer production capacity from 180,000 to 360,000. The fab is production ready, having been qualified by multiple key customers inside and outside China. Simgui CEO Dr. Jeffrey Wang notes, “China has design, wafer manufacturing and good momentum in the IC industry. We are committed to our strategic partnership with Soitec to keep advancing SOI as China’s key differentiator.” With China Mobile China Mobile's interest in the SOI ecoystem is clear: they've presented at the SOI symposia in Shanghai for two years running now. In a February 2019 press release, Soitec announced that they've joined the China Mobile 5G Innovation Center – and they're the first materials supplier to do so. The China Mobile 5G Innovation Center is an international alliance chartered to develop 5G communication solutions for China, the world’s largest wireless communications market with 925M mobile subscribers. The Center aims to accelerate the development of 5G by establishing a cross-industry ecosystem, setting up open labs to create new products and applications, and fostering new business and market opportunities. Soitec's RF-SOI wafers have been critical in the deployment of 4G communications, and the opportunity in 5G is even bigger. Plus the company's FD-SOI wafers enable the technology that brings unique RF performance, making it an ideal solution for many applications including mmWave communications such as 5G transceivers. They are also enabling full RF and ultra-low-power computing integration for IoT and edge computing. For Samsung Foundry In January 2019, Soitec announced that they have expanded their collaboration with Samsung Foundry on the FD-SOI wafer supply, securing the high-volume Samsung needs to meet industry's current and future demands in consumer, IoT and automotive applications. The agreement is built on the existing close relationship between the companies and guarantees wafer supply for Samsung’s FD-SOI platform starting with the 28FDS process. “Samsung has been committed to delivering transformative industry leading technologies,” said Ryan Lee, Vice President of Foundry Marketing at Samsung Electronics. “FD-SOI is currently setting a new standard in many high-growth applications including IoT with ultra-low-power devices, automotive systems such as vision processors for ADAS and infotainment, and mobile connectivity from 5G smartphones to wearable electronics. Through this agreement with Soitec, our long-term strategic partner, we hope to lay the foundation for steady supply to meet high-volume demands of current and future customers.” “This strategic agreement validates today’s high-volume manufacturing adoption of FD-SOI,” said Christophe Maleville, Soitec’s Executive Vice President, Digital Electronics Business Unit. “Soitec is ready to support Samsung’s current and long-term growth for ultra-low power, performance-on-demand FD-SOI solutions.” Silicon Catalyst Partner In February 2019 Soitec announced they'd become a strategic partner in Silicon Catalyst's start-up incubator. Silicon Catalyst is a Silicon Valley-based incubator providing silicon-focused start-ups access to a world-class network of advisors, design tools, silicon devices, networking, access to funding and marketing acumen needed to successfully launch their businesses. [caption id="attachment_15534" align="alignright" width="300"] (Image courtesy: Soitec, Silicon Catalyst)[/caption] Soitec will engage in this start-up ecosystem to gain insight into the newest technologies and applications across high-growth markets, and to guide nascent technologies to successful market penetration. “As a Strategic Partner of Silicon Catalyst, Soitec has a unique opportunity to grow our visibility among early-stage semiconductor companies,” said Thomas Piliszczuk, Executive VP of Global Strategy for Soitec. “Engineered substrates give semiconductor related start-ups a competitive edge in developing new high-performance, energy-efficient solutions." Pete Rodriguez, CEO of Silicon Catalyst said, “Soitec is creating technical advances that are enabling the next generation of products across many market segments. Their SOI technology is a key ingredient to meet the diverse challenges for breakthrough differentiated semiconductor products, combining ultra-low power with excellent analog/mixed-signal performance.” Energy Harvesting with Renesas And finally, jumping back a few months, at the end of 2018 Soitec announced that their SOI wafers are at the heart of a new Renesas SOTBTM energy harvesting chipset, opening a self-powered future for IoT devices. SOTB is how Renesas refers to its FD-SOI technology. [caption id="attachment_15533" align="alignleft" width="300"] (Image courtesy: Renesas)[/caption] (BTW, here at ASN we've been covering the work that Renesas has quietly done on this technology since 2005 (!). And we did a piece about an EETimes Japan article back in 2015 that revealed the launching of the 65nm work. ) Soitec supports the Renesas SOTB chipset with a special version of its FD-SOI wafer product line. The new Renesas SOTB-based chipset overcomes the energy constraints of IoT devices and reduces the power consumption to approximately one-tenth that of the existing products in the market today. That makes the chipset perfectly suited for extreme low-power, maintenance-free and energy harvesting applications including wearable devices, smart home applications, smart watches, portable appliances, infrastructure monitoring systems, industrial, business, agricultural, healthcare, as well as health and fitness apparel, shoes, drones and more. Renesas has developed its energy harvesting chip using its unique SOTB 65nm process technology that achieves both low active current of 20 μA/MHz and deep standby current of 150 nA. As a result, Renesas’ SOTB chipsets offer enhanced control of the transistor electrostatics and reductions in both the standby and active currents to levels never before achieved. Additionally, Renesas has successfully delivered the dopant-less channel to suppress Vth variability for the ultra-low voltage operation, and the ultra-low power back bias control to reduce the standby current at the same time. “To spur innovations in IoT and consumer applications, we have integrated our exclusive energy-harvesting SOTB technologies into our Energy Harvest Controller,” said Mr. Toru Moriya, Vice President of Renesas’ Home Business Division, Industrial Solutions Business Unit. “We are confident that our SOTB technology built on Soitec’s ultrathin substrates can deliver unmatched capabilities for developing maintenance-free IoT devices that never require power supply or replacement, giving rise to a new IoT global market based on endpoint intelligence.” [caption id="attachment_15714" align="alignleft" width="300"] (click to enlarge) Block diagram of the Renesas R7F0E Embedded Controller, their first device based on their SOTB (aka FD-SOI) technology. Target applications are battery-free connected IoT sensing devices with endpoint intelligence. (Image courtesy Renesas)[/caption] The new R7F0E Embedded Controller is the first device based on Renesas’ SOTB technology. Developers can now design applications that need no battery or recharging. The R7F0E features: an Arm® Cortex® -M0+; operating frequency up to 32 MHz, and up to 64 MHz in boost mode (that's body bias in action!); memory of up to 1.5 MB flash, 256 KB SRAM; and active current consumption while operating at 3.0V of just 20 µA/MHz, and in deep standby of 150 nA with real-time clock source and reset manager. As of this writing, Renesas indicates it's engaging select customers through July 2019, with mass production in 4Q19. Read more about the RE Family SOTB™ Process-Based Energy Harvesting Embedded Controllers on the Renesas website.
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The SEMI Europe Industry Strategy Symposium (ISS Europe) returns in Milan, Italy, this year from 31st March to 2nd April, 2019 to explore new opportunities and challenges in the digital economy. Serena Brischetto of SEMI spoke with GreenWaves Technologies CEO and co-founder Loïc Lietar about the semiconductor start-up and its Internet of Things (IoT) ultra-low-power processing technology ahead of the summit.SEMI: What are the mission and vision of GreenWaves Technologies? Lietar: GreenWaves Technologies is a fabless semiconductor start-up that is designing disruptive ultra-low power embedded solutions for image, sound and vibration artificial intelligence (AI) processing in sensing devices. It was founded in late 2014 with the mission to enable the market for intelligent in-device sensors using ultra-low energy and cost-efficient computing solutions. As a result, the GreenWaves GAP8 is the industry’s first ultra-low-power processor to enable battery-operated AI in Internet of Things (IoT) applications.SEMI: How did you move from the semiconductor industry to the start-up ecosystem?Lietar: I worked 25 years for STMicroelectronics then four years ago left because a project didn’t materialize. At the same time, I became involved a bit by chance in the founding of GreenWaves, which turned out to be an amazing journey that I rapidly got entirely – and deadly – committed to.SEMI: Semiconductors are usually not associated with the idea of start-up. What is the key to the success of GreenWaves and its positioning? Lietar: Start-ups have played a significant role in the formation of our industry and in bringing innovations and disruptions to the market. But as it became more complicated to finance start-ups because of exploding development costs, the number of semiconductor start-ups shrank significantly in the past 10 years.At GreenWaves we develop and sell IoT application processors – processors tuned for a given class of applications. In our case, we focused on machine learning inference processors and more generally signal processing and IoT for ultra-low power. We typically process and analyze images, sounds and vibrations and our technology is more than one order of magnitude more energy efficient than existing processors. For example, our processor, coupled with an infra-red sensor, can count the number of people present in a room once a minute for more than five years on a single charge. Our architecture uses RISC-V cores. This free and open Instruction Set Architecture is seeing huge momentum and a rapidly growing community. Second, we leverage an open source project called PULP developed by the Italian Università di Bologna and the Federal Polytechnical School ETH in Zurich. While open source is a well-established model for software, this is pretty unchartered territory in the semiconductor industry. It is working very well for us, as we benefit from robust technology we can incrementally innovate on. This is why we have been able to develop our first product with 4 million Euro.Competition is now emerging, and this is a good sign: We are not alone in believing in this market but we remain very differentiated!SEMI: One of the reasons why semiconductor start-ups were no longer attractive to VCs is the amount of capital that start-ups need to invest. Did public funding help you too?Lietar: Yes, public funding played a crucial role at the beginning. We received rather classically 300K Euro of French grants and then we were lucky enough to win a very selective H2020 grant, the SME instrument, for 1.2M€. In France there is a very powerful scheme of research tax credit that covers more than 30 percent of our R D costs and French banks know how to lend money to start-ups, with a state warranty.SEMI: What is particularly exciting about GreenWaves?Lietar: When we defined the target market more than three years ago, frankly, we were alone in the market. Now, it sounds obvious, but we have a three-year time advantage over our competitors. The technology is really impressive and great in serving this market, and it goes beyond what we had thought about it at the beginning. And finally, the open source model that we are validating is yet another rather unique attribute of ours. The combination of those three aspects is thrill!SEMI: Can you name some applications?In the consumer space we can name, autonomous nano-drones, smart toys, home surveillance and wearables. We also enable important applications in smart buildings and smart cities related to counting people and things, and within the industry 4.0 with applications in advanced fault detection.SEMI: What are your expectations regarding the summit in Milan, and for the future ahead? What is the status of the semiconductor funding ecosystem?Lietar: I look forward to comparing my recent entrepreneurial experience with other colleagues and peers in the industry. It is true: Financing a semiconductor start-up is a challenge, but things are improving. Ironically, in the U.S. and China, we are in the middle of an over-heated hype around AI, which will ultimately burst and make it even more difficult to fund semiconductor start-ups than it was before. But we are used to it in this industry. Loïc Lietar is a co-founder and CEO of GreenWaves Technologies, a fabless semiconductor start-up that develops GAP8, the industry's first loT application processor featuring ultra-low power for images, sounds and motion. Prior to co-founding GreenWaves Technologies, Loïc worked 25 years for STMicroelectronics, where he led several product divisions. He also served as Chief Strategy Officer and co-founded and managed the corporate venture fund at STMicroelectronics. Serena Brischetto is a marketing and communications manager at SEMI Europe.
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The recent FLEX 2019 and MEMS Sensors Technical Congress (MSTC) showcased autonomous mobility sensors, more than 100 market and technical presentations, and 60 exhibits but also highlighted the industry’s future. The event also highlighted the best student research in the student poster session. A committee of industry volunteers ranked posters created by bright, young minds on originality, clarity, data sources, analysis and conclusions, visuals, presentation and creativity before selecting the top three. This year the awards went to some outstanding researchers at the beginning stages of their promising careers in flexible and printed electronics. Michael Crump, University of Washington – 3D Printed Stretchable Strain Sensors with Conductive Ionogels Goutham Ezhilarasuv, University of California, Los Angeles – A Flexible, Heterogeneously Integrated, Wireless Powered System for Implantable Applications Using Fan-out Wafer-level Packaging on Elastomeric Substrates Tony Varghese, Boise State University – Additive Manufacturing and Photonic Sintering of Flexible Thermoelectric Generators for Wearable Applications Stefanie Harvey, FlexTech (left) and Stephen Farias, NanoDirect LLC (right) present the awards to Michael Crump, University of Washington (center left) and Tony Varghese, Boise State University (center right). SEMI-FlexTech and SEMI-MSIG are pleased to recognize the work of all of the students and their faculty who participated in this year’s event and competition. We look forward to seeing you on the stage presenting at a future event.Stefanie Harvey is the R D program manager at SEMI-FlexTech.
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Yesterday, President Trump extended the deadline for List 3, which would have raised U.S. tariffs on $200 billion worth of goods from China. SEMI welcomes the deadline extension.Over the past three months, the United States and China have engaged in bilateral discussions to address structural issues like intellectual property protection and requirements for the use of joint ventures as well as trade balance concerns. President Trump announced that these talks have yielded significant and substantial progress in all areas. That said, it’s been reported that discussions on structural issues, such as forced technology transfer, have seen limited progress.Certainly, questions remain on the specifics of liberalization, the structure of the agreement and, most notably, enforcement. Any new commitment will be toothless without a firm and binding enforcement mechanism. While the date of the new deadline hasn’t been clarified, we believe that the tariffs won’t be increased before Presidents Trump and Xi meet, which could happen in late March at Mar-a-Lago.List 3 covers a range of items, including a number of consumer goods, but also directly impacts items critical to the semiconductor manufacturing process, including materials and machines. SEMI estimates that all U.S. and Chinese retaliatory tariffs – which hit machines and tools central to the semiconductor industry, including equipment used to manufacture wafers, boules, and chips as well as test, inspection and sensing equipment – will cost members more than $700 million in annual duties.While SEMI strongly supports stronger protections for valuable intellectual property (IP), tariffs will not help address Chinese trade practices and will ultimately have significant and unintended consequences. SEMI asserts that these tariffs will harm companies in the semiconductor supply chain by increasing business costs, introducing uncertainty, and stifling innovation. The tariffs seem to target U.S. firms for simply operating in China.Given that chips, tools, and materials are extremely complex, precise, and difficult to manufacture, it is not reasonable to believe that any component can easily be replaced with a part from another source. Further, this U.S. government approach does not take into account that many items subject to these tariffs are not available, at sufficient quality and cost, from domestic sources, or even non-Chinese sources. We stand steadfast in our belief that this trade action will raise prices, put thousands of high-paying and high skill jobs at risk, and curb growth.SEMI will continue monitoring new developments in this area. Any SEMI members with questions should contact Jay Chittooran, Global Public Policy Manager at SEMI, at [email protected].
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GlobalFoundries and Dolphin Integration are collaborating on the development of a series of adaptive body bias (ABB) solutions to improve the energy efficiency and reliability of SoCs on GF’s 22nm FD-SOI (22FDX®) process technology for a wide range of high-growth applications such as 5G, IoT and automotive. The goal of the IP is to accelerate energy-efficient SoC designs and push the boundaries of single-chip integration. The design kits with turnkey ABB solutions will be available starting in Q2 2019. As part of the collaboration, Dolphin and GF are working together to develop a series of off-the-shelf ABB solutions for accelerating and easing body bias* implementation on SoC designs. ABB is a unique feature of FD-SOI that enables designers to leverage forward and reverse body bias techniques to dynamically compensate for process, supply voltage, temperature (PVT) variations and aging effects to achieve additional performance, power, area and cost improvements beyond those from scaling alone. The ABB solutions in development by GF and Dolphin consist of self-contained IPs embedding the body bias voltage regulation, PVT and aging monitors and control loop as well as complete design methodologies to fully leverage the benefits of corner tightening. GF says its 22FDX technology offers the industry’s lowest static and dynamic power consumption. With automated transistor body biasing adjustment, Dolphin Integration can achieve up to 7x energy efficiency with power supply as low as 0.4V on 22FDX designs. “We have been working with GF for more than two years on advanced and configurable power management IPs for low power and energy efficient applications,” said Philippe Berger, CEO of Dolphin Integration. “Through our ongoing collaboration with GF, we are focused on creating turnkey IP solutions that allow designers to realize the full benefit of FD-SOI for any SoC design in 22FDX.” “In order to simplify our client designs and shorten their time-to-market, GF and our ecosystem partners are helping to pave the way to future performance standards in 5G, IoT and automotive,” said Mark Ireland, vice president of ecosystem partnerships at GF. “With the support of silicon IP providers like Dolphin Integration, new power, performance and reliability design infrastructures will be available to customers to fully leverage the benefits of GF’s 22FDX technology.” As STMicroelectronics Fellow and Professor Andreia Cathelin has beautifully noted, “Body biasing is not an obligation. It’s an opportunity.” And GF/Dolphin clearly aim to make that opportunity a much easier and more powerful one to take advantage of. ~ ~ ~ *A note on terminology: the terms back bias and body bias are used interchangeably. Likewise the terms adaptive and dynamic when used in the FD-SOI context. Here is a quick explanation of how it works, from an ST paper from several years ago: Back-biasing consists of applying a voltage just under the BOX of target transistors. Doing so changes the electrostatic control of the transistors and shifts their threshold voltage VT, to either get more drive current (hence higher performance) at the expense of increased leakage current (forward back-bias, FBB) or cut leakage current at the expense of reduced performance. While back-bias in planar FD is somewhat similar to body-bias that can be implemented in bulk CMOS technology, it offers a number of key advantages in terms of level and efficiency of the bias that can be applied. Back-biasing can be utilized in a dynamic way, on a block-by-block basis. It can be used to boost performance during the limited periods of time when maximum peak performance is required from that block. It can also be used to cut leakage during the periods of time when limited performance is not an issue. In other words, back-bias offers a new and efficient knob on the speed/power trade-off. For another good discussion of body biasing in FD-SOI, you might want to check out The Return Of Body Biasing by Semiconductor Engineering's Ann Steffora Mutschler from a couple years ago.
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