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Kitchener, Ontario, July 15, 2025 – PEER Group®, the largest supplier of innovative factory automation software products for the semiconductor industry has launched a new service offering to help OEMs comply with the SEMI® Cybersecurity Standard E187: Specification for Cybersecurity of Fab Equipment.

“PEER Group’s new PEER® E187 Compliance Assessment is a comprehensive third-party service for OEMs that provides the essential training, assessment, documentation, and guidance to help their equipment comply with SEMI E187,” says Doug Suerich, PEER Group’s Director of Marketing.

Released in 2022, SEMI E187 provides a baseline level of security for new equipment being shipped to factories. It applies specifically to computing devices installed on fab equipment that run Microsoft Windows or Linux. Already mandatory at some factories, SEMI E187 is being increasingly adopted as part of factory acceptance requirements.

“PEER Group is uniquely positioned to assist with E187 compliance thanks our leadership in SEMI’s Semiconductor Manufacturing Cybersecurity Consortium (SMCC), participation in SEMI Standards development, and our decades of experience working with both OEMs and factories to meet fab specification requirements and achieve SEMI Standards compliance,” shares Suerich, who also serves as an SMCC Governing Council member.

To help educate OEMs on how to comply with SEMI E187, PEER Group is hosting a free webinar on July 24, 2025. For more information, including how to register, visit: https://attendee.gotowebinar.com/register/7410295402908186710?source=se…

About PEER Group
PEER Group® is the leading global supplier of innovative factory and tool automation and connectivity software for the semiconductor industry. Since our founding in 1992, we have been committed to developing best-in-class solutions that help OEMs and factories reduce their time to market, risk, and costs by solving their most challenging automation, connectivity, and SEMI Standards compliance problems. Follow PEER Group on. Follow PEER Group on LinkedIn.

This cutting-edge panel-level wet processing demo tool handles large 510 × 515 mm substrates, delivering world class, high density Through Glass Vias (TGV) formation and ultra-small taper angles essential for advanced packaging in high performance computing.

Gütenbach, Germany – July 15, 2025 – RENA Technologies, a leading manufacturer of wet processing equipment for semiconductor and advanced packaging production, today announced the ramp-up of its dedicated glass core substrates facility in Germany. This new line, designed for substrates up to 510 × 515 mm, immediately opens for customer test lots, underscoring RENA's proven expertise in glass processing and creating new opportunities for process development and customer sample production. “As experts in precision wet processing, we can now offer large panel demo services for high aspect ratio through glass via (TGV) formation on various glass types,” said Dr. Holger H. Kuehnlein, SVP Technology at RENA. “Our alkaline based TGV process delivers extremely small taper angles, low sidewall roughness, and exceptional dimensional control at panel scale, enabling high density via applications. Customers can begin validating these capabilities today.”

Why Glass, and Why Wet Processing?
Glass substrates offer significant advantages for advanced electronics, including ultra-flat surfaces, low dielectric loss, and superior thermal stability. However, realizing these benefits at scale requires defect free surface preparation and the formation of uniform, high density TGVs with minimal taper angles. RENA's wet processing systems are specifically designed to address both challenges:
1. Surface Engineering – Our systems ensure precise cleaning and stress relief across 600 x 600mm panels with submicron total thickness variation (TTV).
2. Chemically Formed TGVs – Following initial laser modifications performed by our specialist partners, RENA’s proprietary chemistries form, enlarge and shape each via to exact specifications. This process consistently delivers very small taper angles and smooth sidewalls, ideal for subsequent metallization.

By collaborating with leading German and international laser partners, RENA offers customers the flexibility to choose their preferred laser vendor while ensuring all downstream wet processing steps are handled by our advanced equipment.

Key Highlights of the New Facility
Panel Size: Focus on 510 x 515mm and up to 600 × 600mm, smaller possible
Tool Set: Alkaline TGV etching, advanced rinse/dry, optical inspection & metrology
Field-Proven Recipes: Process conditions migrated from high volume tools
On-Demand Access: Customers may run demo substrates, qualify custom chemistries, or request full process flows
Sustainability: Low temperature chemistries and closed loop water reclamation reduce energy and ultrapure water (UPW) consumption

Market Impact
High-Performance Computing (HPC) as well as 5G/6G RF modules increasingly require new package designs, including panel-level fan-out and trend towards more complex chiplet architectures. Glass substrates, long considered the “holy grail” for core and interposer material, effectively eliminate the limitations imposed by warpage and dielectric loss in organic substrates. By combining laser modification from our vetted partners with RENA's chemistry driven via shaping, designers can now validate glass packaging concepts on the lab-platform proven at 600x600mm dimensions.
“With this lab-tool, we've created a great opportunity for semiconductor manufacturers to perform demos on panel level glass substrates,” added Peter Schneidewind, CEO of RENA. “From surface preparation to via formation, our wet process flow is ready for customers substrates to support TGV technology breakthroughs. This is world class made in Black Forest.”

Availability & Engagement Model
• Testing available now
• Flexible collaboration: Bring your own laser modified substrates, or leverage RENA’s ecosystem partners to benefit from joint process development support, and metrology services for process validation.

About RENA Technologies GmbH
RENA Technologies is a leading global supplier of production machines for wet chemical surface preparation. RENA products are used in path-breaking application fields such as semiconductors, MedTech, renewable energies, the glass industry and additive manufacturing. RENA equipment is used to treat or modify surfaces of, for example, semiconductor wafers, solar cells, glass, optical substrates, 3D-printed metal components or other high-tech products using wet chemical processes. RENA offers proven standard machines as well as customer-specific solutions and process support.

CONTACT
Sales:
Felix Fink
Phone: +49 7723 9313-403
E-Mail: [email protected]

Press:
Dirk Hensel
Phone:+49 7723 9313-914
E-Mail: [email protected]
www.rena.com

Espoo, Finland, July 14, 2025 – Beneq, a global leader in Atomic Layer Deposition (ALD) technology, is proud to announce significant progress in the microLED display market, underscored by repeat orders from industry-leading technology innovators. MicroLED technology is revolutionizing the future of displays across sectors including consumer electronics, augmented and virtual reality (AR/VR), and the automotive industry. With unparalleled brightness, contrast, energy efficiency, and durability, microLED represents a paradigm shift in how displays are designed and manufactured – enabling ultra-fine pixel resolution, seamless scalability, and longer device lifetimes. As demand for next-generation display solutions accelerates, microLED is poised to become the backbone of future visual interfaces.

According to Yole Group, global microLED display shipments are projected to grow at a compound annual growth rate (CAGR) of 180.6% from 2022, reaching 42.4 million units by 2029. Despite its promise, microLED development presents formidable challenges, particularly in scaling down pixel sizes to below 10 micrometers while maintaining uniformity, stability, and manufacturability. As pixels shrink, precise material control and surface passivation become critical to device performance. Atomic Layer Deposition offers a unique solution, enabling ultra-thin, conformal coatings with atomic-level precision. ALD addresses key barriers in microLED production, such as surface defect passivation, sidewall protection, transparent conductive oxides and final passivation, thereby improving both device efficiency and long-term reliability.

“Our top-tier customers rely on ALD technology to advance monolithic integration of microLEDs and driver electronics on a single chip. This integration paves the way for a new class of smaller, more powerful display products – delivering faster data transfer, lower power consumption, and a significantly more compact footprint,” says Mikko Söderlund, Head of Semiconductor ALD Sales.

“These repeat orders validate Beneq’s solution and demonstrate the company’s commitment to support customers through both the demanding development phase and the critical transition to volume manufacturing.”

Beneq’s Transform® ALD cluster platform stands at the forefront of this technological evolution. Designed for high-throughput production and advanced technology development, the Beneq Transform combines modularity, flexibility, and productivity, making it an ideal tool for microLED manufacturers. Its multi-chamber architecture supports a wide range of materials and processes, enabling customers to fine-tune optical and electrical properties while seamlessly scaling from lab to fab. By equipping microLED pioneers with the tools needed to overcome manufacturing barriers, the Beneq Transform is helping accelerate the commercialization of microLED displays – paving the way for brighter, smarter, and more sustainable electronic experiences.

About Beneq

Beneq pioneered industrial Atomic Layer Deposition (ALD) with the introduction of the first commercial ALD equipment in 1984. Today, Beneq advances ALD technology adoption and validation with a portfolio that includes Transform®, Transform® 300, and Prodigy™ for specialty semiconductor device fabrication; TFS 200 and TFS 500 for R&D; innovative spatial ALD platforms such as the C2R™, and Genesis for roll-to-roll processing. Beneq’s products support process innovation from lab to fab, enabling integration of ALD in high volume manufacturing. Headquartered in Espoo, Finland, Beneq operates globally to help customers scale ALD solutions for the future of semiconductors, optics, and functional coatings.

Press Contact

Charlotte Bärlund
Event and Communications Lead
[email protected]

Lie Luo
Head of Marketing
[email protected]

Kitchener, Ontario, July 8, 2025 – PEER Group®, the largest supplier of innovative factory automation software products for the semiconductor industry, is hosting a webinar that will provide critical information to help equipment suppliers comply with the new SEMI® Cybersecurity Standard E187: Specification for Cybersecurity of Fab Equipment.

“SEMI E187 is one of a growing group of cybersecurity standards that have been developed to help secure the semiconductor manufacturing supply chain and build resilience in the face of an increasing threat of cyberattacks,” says Doug Suerich, PEER Group’s Director of Marketing and Governing Council member of the Semiconductor Manufacturing Cybersecurity Consortium (SMCC), “this webinar will provide OEMs with a crash course on the new cybersecurity standards and detail best practices on how to comply with E187.”

A popular speaker at a variety of industry conferences and tradeshows, Suerich will be the main speaker during the webinar, titled SEMI Cybersecurity Standard E187: Are you ready? During the 45-minute presentation, Suerich will delve into the history, development, and industry-wide collaboration that has resulted in the publication of SEMI’s new cybersecurity standards. This will be followed by an in-depth break down of SEMI E187, with Suerich explaining what equipment makers must do to achieve compliance and meet the factory specification.

Mike Barrett, Vice President, Global Sales at PEER Group will host the webinar. “As a software supplier to both semiconductor OEMs and fabs, we have deep knowledge and experience helping our customers meet the strict requirements outlined in factory specifications,” shares Barrett, while noting: “One thing we’re starting to see is that factories are beginning to require SEMI Cybersecurity Standards compliance as part of the factory purchase specification. Considering the risk and financial damages that come with a cyberattack, we expect to only see this requirement increase.”

The webinar is free to attend but requires registration. It will take place live on July 24, 2025, at 1:00 p.m. EDT.

To learn more, and to register, visit: https://attendee.gotowebinar.com/register/7410295402908186710?source=se…

About PEER Group
PEER Group® is the leading global supplier of innovative factory and tool automation and connectivity software for the semiconductor industry. Since our founding in 1992, we have been committed to developing best-in-class solutions that help OEMs and factories reduce their time to market, risk, and costs by solving their most challenging automation, connectivity, and SEMI Standards compliance problems. Follow PEER Group on. Follow PEER Group on LinkedIn.

CEA LID World Summit, Grenoble, France, June 17, 2025 – Agileo Automation, a leading provider of control and connectivity solutions for global semiconductor manufacturing equipment, today announced the future expansion of its A²ECF-SEMI automation framework to include SEMI’s EDA (Equipment Data Acquisition) standards suite. This integration that already includes Agil’GEM and Agil’GEM300 will empower OEMs to deliver structured, high-bandwidth data to manufacturing facilities and drive process improvements with artificial intelligence (AI) by leveraging large amounts of reliable, actionable data. EDA standards, built on the legacy of SECS/GEM and GEM300, are transforming equipment communication and enabling high-speed, data-driven manufacturing. As semiconductor fabs become more connected and automated, the ability of OEM equipment to integrate seamlessly and deliver high-quality, structured data has become a competitive differentiator. 

Agileo Automation has carried out EDA Freeze 2 client and server tests with equipment manufacturers already supporting EDA and is working with these early adopters on the integration on their equipment using A²ECF-SEMI, Agil'GEM, and Agil'GEM300. The company will soon be providing a comprehensive offer for OEMs in need of EDA Freeze 2 or 3. EDA is increasingly required in RFQs that equipment manufacturers must address.

“EDA is going to enable fabs to realize superior yields, faster innovation cycles, and a sustainable competitive advantage in an ever-accelerating market,” explains Marc Engel, CEO of Agileo Automation. “Agileo is proud to be a major contributor to this global effort and pleased to support OEMs in all market segments with a complete and scalable product suite.”

About Agileo Automation

Since its inception in 2010 in Poitiers, France, Agileo Automation has empowered global semiconductor equipment manufacturers to optimize their production machines with control, communication, data acquisition, and testing solutions, enabling their deployment in large-scale fabs worldwide. At the heart of Industry 4.0, Agileo’s A²ECF-SEMI framework provides a robust foundation for developing equipment controller software, leveraging the SEMI SECS/GEM and GEM300 standard suites. As a member of SEMI and the OPC Foundation, Agileo Automation is a key contributor to the development and integration of industry standards such as SEMI standards and OPC Unified Architecture (OPC UA). For more information, please visit our web site or follow us on LinkedIn.

Nordson Electronics Solutions, a global leader in reliable electronics manufacturing technologies, has developed several solutions for panel-level packaging (PLP) during semiconductor manufacturing. In one particular case, Nordson’s customer, Powertech Technology, Inc. (PTI) saw underfill yields improve to greater than 99% as they plan to transition from wafers to panels in their manufacturing operations. For details about this solution developed in late 2024 and 2025, download the case study here: Customer Success: Powertech Technology Inc. (PTI) Advances Panel Level Packaging with Nordson.

PTI, one of the world’s top OSAT (Outsourced Semiconductor Assembly and Test) companies, worked with the Nordson applications team to set up a comprehensive PLP demonstration that achieved high-quality, void-free underfill results at scale, using the industry-leading ASYMTEK Vantage® Series fluid dispensing system, equipped with the ASYMTEK IntelliJet® Jetting system. Nordson’s precision technology mitigated warpage and optimized fluid flow while decreasing cycle time by almost 30%.

PLP offers a path to managing the complexity of larger die sizes and higher-density designs while maintaining manufacturability and cost efficiency as the semiconductor industry transitions from 300-mm wafers to panels. PTI is enabling PLP applications that are designed to meet the semiconductor industry’s growing demands to serve AI, high-performance computing (HPC), and chiplet-based architectures.

Underfill has been pivotal in semiconductor packaging since the adoption of flip-chips in the 1990s. As applications have become more demanding, particularly in high-performance CPUs, GPUs, and advanced architectures like flip-chip and 2.5D/3D ICs, the importance of underfilling to enhance mechanical reliability and thermal performance has grown. Since the beginning, Nordson developed innovations for underfill processes as the industry evolved from PC board, substrate, wafer, and now panel applications.

Nordson’s distributor, Jetinn Global Equipment Ltd., supported the advancements discussed in this case study by investing in demonstration equipment and providing expert technical support.

WATCH ON-DEMAND

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Are We There Yet? Metrology and Inspection for Angstrom-Level Manufacturing ​

In the semiconductor industry where we routinely pattern sub-wavelength structures and require atomic-layer precision in our manufacturing processes, it’s easy to assume that we can simply measure everything we’re doing and all the structures we create. In reality, though, metrology and inspection have the challenging task of not just keeping up with device technology but staying far enough ahead that we can actually “see” our results and confirm the progress we’re making.

In this webinar, co-hosted with the Electronics business of Merck KGaA, Darmstadt, Germany; we will explore the metrology and inspection space to learn more about technological advances driving this vital segment of semiconductor manufacturing.

The webinar will feature presentations by Eric Beyne, PhD, Senior Fellow, VP R&D and Director of 3D System Integration Program for imec, and Dario Alliata, PhD, Senior Application Director for Metrology & Inspection at the Electronics business of Merck KGaA, Darmstadt, Germany.

Following the presentations, an interactive Q&A segment will allow attendees a chance to deepen their understanding of how materials innovation and advanced metrology intersect at the leading edge of manufacturing.

Join us to engage with peers and pioneers working at the forefront of materials science and semiconductor innovation!

 

United States

Dario Alliata
Dario Alliata, PhD
Senior Director of Applications
The Electronics business of Merck KGaA, Darmstadt, Germany

The Role & the Challenge of Metrology and Inspection in Advanced Packaging of AI Chips

The massive adoption of social networking and artificial intelligence has pushed the semiconductor industry to develop devices capable of supporting the required infrastructures. Increasingly powerful computer process units (CPU) are used to allow data centers to process trillions of information exchanges, while faster graphic process units (GPU) enable virtual and assisted reality.
Cost leveraging is now reachable with the integration of multiple dies in the same package, each one fabricated to handle specific functionalities with the most cost-effective technology node, which is a form of heterogeneous integration. This session highlights some examples of metrology and inspection solutions aimed at securing the manufacturability of devices for High Computing Power fundamental for AI applications. More in detail, it explores the challenge of the fabrication of chip-to-chip interconnections that are key for the heterogeneous integration of active components with vertical stacking like DRAM for High Bandwidth memories, where process tolerances are increasingly narrow and conditions to measure more and more extremes.

Biography
Dr. Dario Alliata joined Unity-SC, now part of the Electronics business of Merck KGaA, Darmstadt, Germany in the U.S. and Canada. In 2016 as product manager and is now Sr. Director of Applications with focus on Advanced packaging and Specialty substrates & devices.
He worked in the semiconductor industry for more than 25 years, initially in R&D centers and later in equipment makers. He spent his entire career developing process control solutions for securing the manufacturing chain in the semiconductor industry.
He received a MD in Physics from the University of Milan (Italy) and hold a Ph.D. in Physics & Chemistry from the University of Berne (Switzerland).

EB
Eric Beyne, PhD
VP R&D / Program Director 3D System Integration Program / Senior Fellow
imec

Sub-Micron Pitch Scaling of Hybrid Bond Interconnects: Metrology Challenges

Advanced 3D integration technology will increasingly rely on hybrid bonding technology for both wafer-to-wafer and die-to-wafer bonding. This allows for micrometer and sub-micrometer pitch interconnects, resulting in very high 3D interconnect densities, compatible with the back-end-of -line interconnect layers of active logic and memory die. The results are “seamlessly” interconnected die. Off-chip interconnects become equivalent (or better) than on-chip interconnects.
These great system-level benefits however come at some challenges. Small overlay errors or surface imperfections can prevent defects, resulting in yield loss. Critical process, steps, such as CMP, wafer dicing and surface cleaning steps, need to be monitored with higher accuracy to maintain a good process. New parameters, such as wafer shape, distortion, surface profile slopes, and copper pad recess levels need to be measured and continuously monitored. This poses significant challenges to metrology related to hybrid bonding. The presentation will highlight these needs and show some practical solutions.

Biography
Eric Beyne obtained a degree in electrical engineering in 1983 and the Ph.D. in Applied Sciences in 1990, both from the Katholieke Universiteit Leuven, Belgium. Since 1986 he has been with IMEC in Leuven, Belgium where he has worked on advanced packaging and interconnect technologies. Currently, he is imec senior fellow, VP R&D and program director of imec’s 3D System Integration program.

Michael Weigand
Michael Weigand
Senior Application Manager
Brewer Science

Moderator

Biography
I'm a seasoned Senior Application Manager at Brewer Science with over two decades of experience in Semiconductor industry. I lead application teams at Brewer Science Inc, focusing on advanced materials for the semiconductor industry. With a background in Material Science, I enjoy tackling technical challenges, from optimizing critical processes to finding creative ways to characterize materials.

EMG

Sponsored by the Electronics business of Merck KGaA, Darmstadt, Germany 

10:00 am - 11:00 am Off Add to Calendar 2025-09-17 10:00:00 2025-09-17 11:00:00 Are We There Yet? Metrology and Inspection for Angstrom-Level Manufacturing ​ Sponsored by the Electronics business of Merck KGaA, Darmstadt, Germany  United States SEMI.org [email protected] America/Los_Angeles public America/Los_Angeles WATCH NOW
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As world leaders act to secure access to these minerals, companies come under pressure to follow due diligence guidelines to promote ethical sourcing of these materials for their supply chains.  Regulations such as the US Dodd-Frank Wall Street Reform and Consumer Protection Act (Section 1502), EU Regulation 2017/821 and the EU Corporate Sustainability Due Diligence Directive require companies to trace materials through their supply chains and report to the public about their use of conflict minerals. 

Several industry associations, including the Responsible Business Alliance’s Responsible Minerals Initiative, were created to help companies with their due diligence efforts. Reports such as those issued by the US Government Accountability Office on Conflict Minerals offer insights into the efficacy of these regulations and suggest improved approaches for industry engagement. 

The SEMI Responsible Supply Chain (RSC) working group was recently formed to host discussions on these topics. This webinar will provide insights from speakers Jennifer Peyser, Responsible Business Alliance Senior Vice President of Responsible Sourcing, and Kimberly Gianopoulos, Managing Director for the International Affairs and Trade team at the U.S. Government Accountability Office (GAO).

United States

8:00 am - 8:05 am
Kim Harrison
Dr. Kimberly Harrison, Ph.D
Senior MEMS Engineer
AMFitzgerald & Associates

Welcome and Introductions of RSC working group

Dr. Harrison is a MEMS Engineer with AMFitzgerald & Associates, a design firm located in the Bay Area California. She has a doctoral degree in mechanical engineering from Stanford University, and has worked as a designer and process engineer in the semiconductor industry for 10 years. She was nominated as a 2022 MEMS & Sensors Industry Group Emerging Leader. As a founding member and leader of the SEMI Responsible Supply Chain Working Group, she hopes to bring SEMI members together to discuss solutions to human rights issues in the semiconductor supply chain.

Conflict Minerals Supply Chain Overview

8:05 am - 8:35 am
Kimberly Gianopoulos
Kimberly Gianopoulos
Managing Director for the International Affairs and Trade
U.S. Government Accountability Office (GAO)

Report Review

Director Gianopoulos oversees a 140-person team that reviews a wide variety of federal government oversight issues, including International Security Assistance, Bilateral and Multilateral Foreign Assistance, International Trade and Finance, and U.S. Diplomatic Presence and Management. She serves as a facilitator in GAO’s Learning Center and participates in recruiting activities. Ms. Gianopoulos has received several awards, including a Distinguished Service Award, a Meritorious Service Award, a Client Service Award, and several Results Through Teamwork awards. Ms. Gianopoulos earned a Bachelor’s degree in Mathematics and a Master’s degree in Public Analysis and Administration from the State University of New York at Binghamton. She is a Certified Government Financial Manager and a member of Pi Alpha Alpha, the Global Honor Society for Public Affairs and Administration.

Jen Peyser
Jennifer Peyser
Executive Director
Responsible Minerals Initiative

RMI Activity Overview

“The RMI supports over 500 downstream, midstream, and upstream member companies with a suite of due diligence standards and tools, data, guidance, training, and other resources for global responsible sourcing and regulatory compliance. Our facility and supply chain due diligence standards are rooted in longstanding international norms while reflecting emerging corporate and stakeholder priorities for regulatory compliance, managing sustainability risks and impacts, and fostering responsible mineral supply chains.”

8:35 am - 8:55 am

Q&A

8:55 am - 9:00 am

Summary and Closing Remarks

SCM 8:00 am - 9:00 am Off Add to Calendar 2025-07-09 08:00:00 2025-07-09 09:00:00 Critical Minerals, Due Diligence and the Semiconductor Supply Chain United States SEMI.org [email protected] America/Los_Angeles public America/Los_Angeles Register for On-demand
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Toulouse, 5 June 2025 – RECIF Technologies is pleased to announce the launch of R.PACK, the next-generation software suite designed for RECIF sorters. With an emphasis on usability, efficiency, and innovation, R.PACK introduces a suite of advanced features aimed at simplifying the management of wafer sorting equipment.

Built for Speed, Designed for Precision

R.PACK enhances operational efficiency for users of RECIF’s COMPACT and SMART sorters, featuring advanced capabilities and a modern interface designed to streamline wafer sorting processes

Key Features of R.PACK:

  • Refined User Interface: The design of R.PACK makes it easier than ever to create recipes and monitor jobs, ensuring smoother operations and increased productivity.
  • Seamless Transition: Current users will experience minimal disruption when transitioning to R.PACK, thanks to its intuitive interface that simplifies adoption.
  • Ongoing Software Enhancements: R.PACK is built on a forward-compatible framework, with updates released annually to deliver new features and performance improvements. The first major update was rolled out in January 2025, with the next release scheduled for Q1 2026 — part of an ongoing roadmap to enhance user experience and expand system capabilities.

Commitment to Innovation and User Experience

The release of R.PACK reinforces RECIF Technologies’ ongoing commitment to providing high-performance solutions for the semiconductor industry. By focusing on a more intuitive and efficient wafer sorting process, R.PACK marks the first in a series of improvements designed to elevate both the user experience and operational efficiency.

"We believe R.PACK will significantly enhance our customers' workflows and performance," said Thomas Brillouet, the R&D Manager at RECIF Technologies. "By providing enhanced features and a modernized interface, we empower our customers with tools that maximize safety, enhance efficiency, and optimize equipment performance with minimal effort."

Availability and Future Updates

The first major update for R.PACK is available now, with additional updates scheduled annually every Q1. R.PACK is compatible with RECIF sorters (COMPACT & SMART) and will fully replace the WISE software by 2027.

For more information on R.PACK, including system requirements and update schedules, visit www.reciftech.com.

Regular Pricing

SEMI Members: $75

Non-Members:  $149

SEMI Members: Use your corporate email address during log in to be recognized as a SEMI Member.

Students:  Free

Contact Andreia Smith-Moritz ([email protected]) with a picture of your student ID to receive your discount code.

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In this engaging two-hour Masterclass organized by SEMI, we explore the groundbreaking role of magnetic materials, particularly magnetic nanoparticles (MNPs), in biomedical fields. The session commences with an in-depth review of the physics and synthesis of MNPs, including comprehensive discussions on fundamental theories, synthesis methods, and advanced MNP surface functionalization strategies. Attendees will gain insights into the characterization techniques used to analyze the physicochemical properties of MNPs.

The Masterclass transitions to the applications of MNPs in therapeutic and diagnostic contexts. We will review cutting-edge MNP-based therapies, such as magnetic hyperthermia therapy, targeted drug and gene delivery, and magnetic neurostimulation. In addition, we will discuss various MNP-based diagnostic techniques, including magnetoresistive (MR) sensing, nuclear magnetic resonance (NMR), magnetic particle spectroscopy (MPS), magnetic resonance imaging (MRI), and magnetic particle imaging (MPI). A critical focus of this Masterclass will be on safety and biocompatibility issues associated with the use of MNPs in vivo, examining the toxicity of MNPs, immune responses, and their circulation time in the human body.

The latter part of the session will introduce participants to the innovative field of micromagnetic neural stimulation, an infant yet extremely promising field. We will delve into the design and efficacy of micromagnetic devices, such as the Magnetic Pen (MagPen) and Magnetic Patch (MagPatch) Array, which utilize micrometer-sized coils (μcoils) for targeted neural activation. This is particularly for patients with spinal cord injuries (SCI) and for reducing opioid dependency, with insights drawn from current research supported by the NIH Blueprint Medtech Program. By the end of the Masterclass, attendees will have a comprehensive understanding of the potential clinical applications of MNPs and MEMs-based micromagnetic neurostimulators.

 

ABOUT THE SPEAKER

Dr. Renata Saha, Senior Scientist, Dupont

Dr. Renata Saha is a Senior Scientist at DuPont located in Wilmington, DE. She holds a PhD in Electrical and Computer Engineering from the University of Minnesota, Twin Cities, which she earned in August 2023. Her undergraduate degree in Electronics & Communication Engineering was obtained from the National Institute of Technology in Durgapur, India. During the summer of 2017, she was an undergraduate research intern at Conseil européen pour la Recherche Nucléaire (CERN), located in Geneva, Switzerland working on the ALICE experiment upgrade.

Dr. Saha is the recipient of 3-year College of Science & Engineering Fellowship, Women in Technology Scholarship 2021-2022 from Cadence Design Systems, and the Graduate Neuromodulation Research Fellowship 2022-2023 from MnDRIVE. She was also elected an iREDEFINE Fellow in 2022 by ECEDHA and was named a Rising Star in EECS. She has published over 30 journal articles, 3 US patents, and 2 book chapters.

Her expertise and research interests involve designing and developing microelectromechanical systems (MEMs) devices for neuromodulation and cardiovascular monitoring, characterizing magnetic nanoparticles (MNPs) for potential biomarkers. Outside of her research and work, Dr. Saha is trained in Indian classical dance form, Odissi, and enjoys performing and choreographing the art form.

United States

Renata Saha
Renata Saha
Senior Scientist
Dupont
Gity Samadi
MODERATOR
Gity Samadi
Sr. Director, R&D Programs
SEMI
NBMC Smart MedTech ESD Alliance FlexTech

In this two-hour Masterclass, Dupont Senior Scientist Renata Saha delves into the biomedical applications of magnetic nanoparticles (MNPs), covering their manufacturing, functionalization as well as therapeutic and diagnostic uses including safety considerations such as biocompatability and toxicology. 

10:00 am - 12:00 pm Off Add to Calendar 2025-10-29 10:00:00 2025-10-29 12:00:00 FEMC #26 Innovations in Magnetic Materials: Applications in Biomedical Engineering In this two-hour Masterclass, Dupont Senior Scientist Renata Saha delves into the biomedical applications of magnetic nanoparticles (MNPs), covering their manufacturing, functionalization as well as therapeutic and diagnostic uses including safety considerations such as biocompatability and toxicology.  United States SEMI.org [email protected] America/Los_Angeles public America/Los_Angeles Watch Now!
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