sustainability

At SEMICON Europa 2025, the Executive Forum programs brought together experts from across the semiconductor value chain to address two critical challenges shaping the industry’s future in Europe: the transformation of the automotive sector and the pursuit of smarter, more competitive manufacturing.Smart Mobility in a Changing MarketKnut Krümmel, Senior Partner Automotive at Porsche Consulting, set the tone with a stark question, “Are we facing a Detroit scenario in Europe, especially in Germany?” – a reference to the decline since the 1990s of the famous “Motor City.” He pointed out that all three of Germany’s giant OEMs, Volkswagen, Mercedes-Benz and BMW, are rapidly losing market share in China in the face of a destructive price war, and have suffered large declines in reported earnings. Krümmel outlined four strategic imperatives for Europe’s auto industry: reduce complexity and increase standardization, become software-defined, design regulation that supports innovation, and build stronger partnerships across the ecosystem. He emphasized, “A new mindset is needed—people need to be hungry to win and prepared to suffer in pursuit of victory.”Knut Krümmel, Senior Partner Automotive, Porsche Consulting GmbHAndreas Aal, Head of Semiconductor Strategy at Volkswagen AG and Chair of Europe at SEMI Smart Mobility Global Automotive Advisory Council (GAAC), introduced a proactive approach to redefine the market. He shared Volkswagen’s vision for mobility-as-a-service, exemplified by its roboshuttle pilot in Hamburg. “It is very difficult for a traditional OEM to go into the full digital services world. But this is what we want to do,” said Aal.Andreas Aal, Semiconductor Strategy Volkswagen AG and Chair of Europe GAAC, VolkswagenJan-Philipp Gerhmann, Vice President of Marketing and Strategy for Automotive at NXP Semiconductors, added that the traditional value chain is being upended. The industry is shifting from a hierarchical supply chain to vertical integration, with companies like Tesla designing their own chips. Gehrmann introduced NXP’s CoreRide platform, a modular “skateboard” architecture enabling plug-and-play Advanced Driver Assistance Systems (ADAS) and infotainment features for future vehicles.Jan-Philipp Gehrmann, Vice President of Marketing Strategy, NXPA perspective on the future of semiconductors in autonomous vehicles was provided by Dieter Hoffend, Business Director for Automotive at imec: “For autonomous vehicles, you need a higher-end compute capability, which needs a transition to smaller nodes – and that is very costly. In fact, semiconductor companies will not want to commit volume to automotive customers for their most expensive leading-edge ICs. This means that a chiplet architecture will be the most cost-effective approach for vehicles, and will provide the greatest supply chain resilience. To support this, imec’s vision is of an open chiplet marketplace of heterogeneous chiplets which are interoperable.”Dieter Hoffend, Business Director Automotive Sector, imecAchieving End-to-end Manufacturing ExcellenceThe Executive Forum then shifted to a discussion of smart semiconductor manufacturing. Giovanni Notarnicola, Partner at Porsche Consulting, highlighted the untapped potential of AI in fabs. “AI requires massive amounts of data—but fabs often don’t own or control their data. And second, AI talent doesn’t typically reside in semiconductor companies,” said Notarnicola. His recommendation: “AI is not an IT issue—it’s a cross-functional technology. Isolating AI in the IT department is an old-fashioned view which will deter AI talent from joining the industry.”And Notarnicola encouraged the industry to leverage the new white paper, From Hype to Impact—Realizing AI's Potential in Semiconductors Manufacturing, produced by SEMI End-to-End Smart Manufacturing Group, which provides an in-depth report on the application of AI in semiconductor fabrication. Giovanni Notarnicola, Partner, Porsche ConsultingOliver Aubel, Corporate Lead for Automotive Solutions at GlobalFoundries, echoed the opportunity. “We have 1 billion sensors in a fab, but 30% of the signals are statistical noise. AI could help us make better sense of the data.”Oliver Aubel, Corporate Lead for Automotive Solutions at GlobalFoundriesA session on smart manufacturing brought to light other proven methods for improving the performance of fabs. Dr. Holland Smith, Director of Data Science at INFICON, described fab control technology that INFICON had helped STMicroelectronics to deploy. As Thomas Gimmig, Director for Industry 4.0 at STMicroelectronics, said, “Our model was a highway control room – a place where a single person controls 220km of road monitored by 400 cameras, and handles one alert every three minutes on average. This is only possible with a huge amount of automation.”Left: Thomas Gimmig, Director for Industry 4.0 at STMicroelectronics; Right: Dr. Holland Smith, Director of Data Science at INFICONAt STMicroelectronics, the new fab control room mimics this model, automating anomaly detection and problem solving. Smith described how the system will not be limited to detecting and handling anomalies which have already occurred. “There is a plan to look ahead at problems which could emerge in future, and to configure it to make proactive suggestions which will prevent anomalies from occurring in the first place,” said Smith. Jamie Potter, co-founder and CEO of Flexciton, showcased how intelligent scheduling tools based on real-time fab capacity are transforming operations. “In the modern fab decisions must be made more frequently, with more intelligence and with fewer people. And that is why fabs need to be made more autonomous,” said Potter.Jamie Potter, CEO Cofounder, Flexciton Ltd“Our tool is based on a dynamic capacity model of the fab, so WIP optimization is based on knowledge of what the fab can actually do now, rather than – as is normally the case in fabs today – on an abstract algorithm which is derived from operational results observed in the past.” Potter said. Robert Wallace, Solutions Architect at Seagate, which has deployed the Flexciton technology, confirmed the impact: “We increased throughput without increasing cycle times, and saw a 30% drop in deviations from forecast completion times.” Robert Wallace, Solutions Architect at SeagateAntoine Amade, President (EMEA) of Entegris, emphasized the importance of benchmarking to guide performance improvements: “We have a robust library of fab case studies. These benchmarks can become the foundation for best practices.” Antoine Amade, President (EMEA) of EntegrisRegulatory Burdens and Regional Challenges In a panel session, the discussion turned to the issues that European semiconductor manufacturing faces in particular. Herbert Blaschitz, Executive Vice President of Advanced Technology Facilities at Exyte, put a strong emphasis on the drag that European regulation imposes on the construction of new fabrication plants: “There is three times more paperwork to complete in Europe than in Asia.” Blaschitz made the contrast with Taiwan, “where they have standard codes of regulation specifically for a wafer fab. In Europe, we have regulations for skyscrapers, we have regulations for building family homes. But we have nothing for wafer fabs.”It could be worse for companies building all new fabs. According to Stephen Rothrock, President and CEO of ATREG, “We are affected by permits and politics most of all when trying to push through the repurposing of fabs.”From Left to Right: Mark Puttock, Sr. Director - Technology and Innovation, Entegris; Giovanni Notarnicola, Partner, Porsche Consulting; Stephen Rothrock, President/CEO, ATREG; Jean-René Lèquepeys, Deputy Director and Chief Technology Officer, CEA-Leti; Herbert Blaschitz, Executive VP of Advanced Technology Facilities, Exyte; Oliver Aubel, Corporate Lead Automotive Solutions, GlobalFoundriesSustainable Manufacturing Practices: A Source of Competitive Advantage?The forum ended with a debate on the value of and problems with Europe’s commitment to sustainability. As Mark Puttock, Senior Director for Technology and Innovation at Entegris, acknowledged concerns that sustainability practices could raise costs and reduce process efficiency. But Jean-René Lèquepeys, Deputy Director and Chief Technology Officer at CEA-Leti, countered: “sustainability can be a competitive advantage. For instance, the industry is under pressure to eliminate PFAS from its processes. CEA-Leti is working on this problem, and the whole world is looking for a solution.”The event concluded with a moment of celebration: Ilya Zabelinsky, Co-founder of the International Subfab Research Labs (ISRL), won a diamond prize sponsored by Nanores Lab,Left: Jakub GawczyńskiJakub Gawczyński, Head of Nanores Lab; Right: Ilya Zabelinsky, Co-founder of the International Subfab Research Labs (ISRL)On behalf of SEMI, we extend our sincere gratitude to the speakers, sponsors, and participants who contributed their expertise and vision to the programs at SEMICON Europa 2025.SEMI ContactAna Bernardo, Senior Manager of Technology Programs SalesEmail: [email protected]

The GENESIS EU project is reshaping how Europe thinks about semiconductor manufacturing. Its goal is simple but ambitious: reduce usage of harmful chemicals from chip production, cut emissions and waste, and make the industry more circular and resilient.Launched on 1 May 2025, GENESIS – GENerate in Europe a Sustainable Industry for Semiconductor – is a research and innovation project co-funded by the European Union through Chips JU and its participating member states. In addition, Swiss partners are supported by the Swiss State Secretariat for Education, Research and Innovation (SERI).Coordinated by CEA-Leti in Grenoble, GENESIS brings together 58 partners from across the semiconductor value chain: materials and chemistry suppliers, equipment manufacturers, semiconductor fabs, research and technology organisations (RTOs), universities, small and medium-sized enterprises (SMEs), recycling specialists and communication experts. Together, they are working to build a resilient, circular and environmentally responsible microelectronics sector aligned with the European Green Deal and the European Chips Act.Mission and VisionGENESIS exists to future-proof the European semiconductor industry. The project focuses on:Eliminating or replacing per- and polyfluoroalkyl substances (PFAS) and other hazardous substances used in manufacturing processes;Reducing waste and greenhouse gas emissions throughout the production chain;Securing access to critical materials through smarter use, reuse and circular strategies;Deploying advanced monitoring and sensing solutions for gas and liquid environments in fabs.Six Work Packages, One Integrated ApproachTo reach its objectives, GENESIS is structured into six work packages.Work Package 1 – Management, Specifications, and MethodsLead: CEA-LetiWP1 keeps the project on track. It manages the technical, administrative and financial coordination of GENESIS and defines common specifications and methodologies. This includes setting technical recommendations and carrying out environmental impact assessments so that shared targets and consistent methods guide all subsequent work.Work Package 2 – Process, Monitoring Sensing Hardware and SolutionLead: CSEMWP2 develops real-time monitoring technologies capable of detecting and quantifying emissions from process gases such as NF₃, CF₄ or SF₆. By improving transparency and enabling process feedback, GENESIS contributes to the transition toward low-emission semiconductor fabs aligned with EU climate goals.Work Package 3 – Environmentally Friendly Materials AlternativesLead: imecWith global PFAS restrictions tightening, the semiconductor sector urgently needs high-performance, safe alternatives. GENESIS in WP3, is designing and qualifying materials for key manufacturing steps including lithography, etching, cleaning, deposition, and packaging, that reduce industry dependence on PFAS and higher GWP gases while ensuring compatibility with industry performance requirements.Work Package 4 – Minimisation of Waste and EmissionsLead: FraunhoferWP4 addresses the complexity of semiconductor waste streams and explores innovations to enhance abatement efficiency. GENESIS develops recycling, recovery, and closed-loop solutions for gases, slurries, and solvents, with the aim of significantly reducing waste across fabs.Work Package 5 – Materials Scarcity Impact MitigationLead: Università degli Studi di Roma Tor VergataEurope’s dependence on critical raw materials—including gallium, indium, and rare earth elements—represents both an environmental and strategic challenge. GENESIS in WP5 focuses on reducing CRM usage through process innovation and strengthening circularity to enhance supply chain resilience.Work Package 6 – Regulations, Dissemination, Communication and ExploitationLead: SEMI EuropeWP 6 is dedicated to ensuring that GENESIS creates meaningful and lasting impact beyond its technical achievements. It integrates regulatory monitoring, dissemination, communication, and exploitation activities to connect the project’s innovations with industry needs, European policy developments, and wider society. WP6 is coordinated by SEMI Europe, supported by expert partners across the consortium, and serves as the bridge between GENESIS’s scientific work and its real-world influence.Long-term strategyGENESIS is built with one goal in mind: making sure the work happening inside the project translates into real change across Europe’s semiconductor ecosystem. To support this, the project focuses on four key impact areas that help move ideas from research into industry, policy and long-term community engagement.Helping Industry Put Results to WorkA core part of GENESIS is understanding how each partner can use the project’s results in their own environment. Whether it’s new materials, smarter monitoring solutions or better waste-reduction approaches, partners define clear pathways for adoption so GENESIS innovations can move naturally into real industrial use.Staying Connected to Europe’s Policy AgendaSustainability and chemical regulations in Europe are evolving fast, and GENESIS stays close to these developments. The project brings technical insights to discussions around the Green Deal, PFAS regulation, and critical raw materials. This makes sure GENESIS is not only aligned with policy trends, but also contributes to shaping them.Making Knowledge Accessible and Future-FocusedOpen access is an essential part of GENESIS. The project shares its research outputs publicly and supports the creation of educational material for universities and training programmes. This helps the next generation of engineers and specialists build on GENESIS knowledge and carry it forward.Keeping GENESIS Visible and RelevantGENESIS maintains a strong presence across events, conferences, publications and expert discussions. This ongoing engagement ensures that project results remain visible, understood and connected to wider conversations on sustainable semiconductor manufacturing—helping extend the project’s influence well beyond its duration.Towards a Sustainable Semiconductor FutureGENESIS shows that high-performance chips and environmental responsibility can coexist. By uniting materials science, process engineering, monitoring technologies, environmental assessment and policy insight, GENESIS is helping define what responsible, future-ready semiconductor manufacturing will look like tomorrow.Jatin Mendiratta, Communications CoordinatorSEMI Europe Phone: +49 160 402 8899Email: [email protected]

The CxO Summit at SEMICON Europa 2025 spotlighted Europe’s ongoing efforts to build a resilient and globally competitive semiconductor industry, while calling for greater ambition, speed, and unity in execution. Following global disruptions with the automotive supply chain crisis, the European Union launched a continent-wide strategy through the EU Chips Act. While the Act has already spurred significant developments, including construction of the new ESMC fab in Dresden, Europe remains far from its goal of achieving a 20% share of global semiconductor production by 2030. The CxO Summit, part of the SEMICON Europa event in Munich, provided an opportunity for industry leaders to share ideas about how to catalyze the next phase of the European industry’s growth.Ajit Manocha, President and CEO of SEMI opened the summit by describing today’s industry landscape with one word: “unprecedented.” Manocha said, “The global growth of the industry is unprecedented, with 107 new fabs set to come online by 2028, but the uncertainties are unprecedented, from geopolitics to the talent shortage to environmental concerns. So we need unprecedented solutions.” Ajit Manocha, President and CEO, SEMILaith Altimime, President of SEMI Europe echoed the mood of uncertainty, describing Europe as caught “in a perfect storm.” Altimime said, “As we face a combination of internal challenges and intensifying external competition, collaboration is not optional — it is mission critical.” Laith Altimime, President, SEMI EuropePierre Chastenet, Head of the Unit for Microelectronics and Photonics, European Commission, highlighted the tangible progress made under the EU Chips Act. “We now have a proper toolbox to handle a future crisis in the supply chain. The Chips for Europe initiative has led to the creation of five pilot lines for advanced technologies such as FD-SOI and wide bandgap semiconductors.” Chastenet added, “Europe must now capitalize on its strengths, from materials and equipment to design tools and cutting-edge research emerging from our RTOs.”Pierre Chastanet, Head of the Unit for Microelectronics and Photonics, European CommissionEchoing the call for action, Oliver Schenk, Member of the European Parliament, urged stronger regional unity. “Europe must act together, act faster, and act with much bigger ambition,” Schenk said, reinforcing the need for cross-border commitment to strengthen the continent’s semiconductor position.Oliver Schenk, Member of the European Parliament, European ParliamentHighlighting Europe’s most critical technology gap, Luc Van den hove, President and CEO of imec, unveiled plans for a new advanced fab backed by €2.5 billion in investment from the EU, the Flemish government, and ASML. Van den hove urged Europe to commit wholeheartedly to advanced technologies: “We must be more ambitious, and focus on disruptive breakthroughs rather than incremental change if we want to ensure a prosperous future.”Luc Van den hove, President CEO, imecAt the CxO Summit, CEA-Leti and ASML signed a memorandum of understanding (MoU) to deepen their collaboration and accelerate innovation in mainstream semiconductor technologies. Building on promising results in hybrid bonding, the partnership will now target 'More-than-Moore' innovations, including heterogeneous integration and novel substrates like SiC and GaN. “We aim to combine ASML’s world-class lithography expertise with CEA-Leti’s system-level innovation,” said Sébastien Dauvé, CEO of CEA-Leti. The collaboration is set to strengthen Europe’s ecosystem by shortening the path from early research to industrial impact.Left: Anne Hidma, Senior Vice President EUR US, ASML; Right: Sébastien Dauvé, CEO, CEA-LetiTurning to Europe’s industrial base, Christian Senger, CEO of Volkswagen Autonomous Mobility, emphasized the need to shift from risk-aversion to opportunity. While the region’s automotive sector faces intense global competition, particularly from China, Senger highlighted that Europe has the potential to lead in new mobility markets. “The market for autonomous roboshuttles for people transport in large cities is forecast to be worth €400 billion in the US and Europe alone,” he said. With American firms like Waymo and Uber leading the robotaxi space, Senger stressed that Europe must “act swiftly to create an environment that supports an autonomous mobility industry here.”Christian Senger, Member of the Board for Fully Autonomous Mobility and Transport CEO of ADMT GmbH, VolkswagenEurope’s Potential to Create Advanced TechnologyOne of these RTOs, CEA-Leti, is responsible for the FAMES pilot line for FD-SOI technology. Sébastien Dauvé, CEO of CEA-Leti, agreed with Pierre Chastenet that the pilot lines show great promise. He said, “FD-SOI is a big trend in semiconductors, because it enables very low power consumption in embedded devices. We think that adoption of the technology will grow in the coming years, and that is good, because most of the technology is produced in Europe.”Sébastien Dauvé, CEO, CEA-LetiEurope is also widely recognized to be the leading global voice on sustainability – a huge issue of concern to the semiconductor industry. Henri Berthe, President of the Semiconductor and Battery Segment at Scheider Electric, told the summit that 500 million tonnes of CO2 emissions per year are attributable to the semiconductor industry – “more than the whole of Mexico emits!” he said. “We need to make fabs more efficient, and that is why Schneider Electric has launched a new playbook with Applied Materials for sustainable energy abundance for the industry.”Henri Berthe, President of the Semiconductor Segment, Schneider ElectricAnother aspect of Europe’s playbook is support for new fabs. The flagship is ESMC, the joint venture between TSMC, NXP Semiconductors, Bosch, and Infineon. Christian Koitzsch, president and managing director of ESMC, reported to the summit that the project to build in Dresden a 12nm FinFET foundry and a 28nm CMOS line, requiring a total investment of €10bn, is on schedule. “We are now developing local supply chains, hosting a series of ESMC Supplier Days which are open not only to German but generally to European suppliers,” said Koitzsch.Christian Koitzsch, President and Managing Director, European Semiconductor Manufacturing Company (ESMC)As Manfred Horstmann, General Manager and Senior Vice President of Global Foundries, pointed out, the building of the ESMC fab means that Dresden is established as the center of a cluster of semiconductor industry companies. “Global Foundries has its Fab 1 and a mask center in Dresden. In fact, one-third of the chips produced throughout the whole of Europe now comes from Dresden.”Manfred Horstmann, General Manager and Senior Vice President, GlobalFoundriesAn example of ambition was given by Terence Gan, Executive Director of the Institute of Microelectronics of Singapore. Gan told the summit how Singapore has used pilot lines to stimulate research and development in new technologies. He said: “We started research into advanced packaging as long ago as 2011. Most people thought we were mad! But today, there is strong demand for our advanced packaging capabilities because of the rise of AI and its need for high-performance computing.”Terence Gan, Executive Director, Institute of MicroelectronicsBreaking Barriers to ProgressDespite momentum, bureaucratic inefficiencies continue to hamper progress. Narjiss Haddaoui, Managing Director of European Economics called for faster decision-making: “In global competition, speed is a decisive factor. To act fast enough, the EU must change its ‘software’ - the processes by which it considers and makes decisions.” Narjiss Haddaoui, Managing Director, European economicsThe stifling character of European bureaucracy is reflected in the region’s approach to building fabs. Herbert Blaschitz, Executive Vice President of Advanced Technology Facilities at Exyte, compared fab construction timelines: 20 months in Taiwan, 34 in Europe, and 38 in the U.S., attributing delays in Europe to paperwork bottlenecks.Herbert Blaschitz, Executive VP of Advanced Technology Facilities, ExyteFabio Gualandris, President for Quality, Manufacturing and Technology at STMicroelectronics raised another concern — 100% of raw materials used in European fabs come from outside the region. Christophe Frey, Vice-President for EU Engagements at Arm France, added that geopolitical tensions are clouding the path forward: “We are a bit lost in the smoke from the big fire in the world’s semiconductor industry.” Fabio Gualandris, President Quality, Manufacturing Technology, STMicroelectronics Christophe Frey, Vice-President of EU Engagements, Arm FrancePlaybooks For Future SuccessSo amid the uncertainty and global tension, what lessons can the industry learn from successful regional examples? Tuomas Korpela, Business Development Senior Manager at Nokia, credited Finland’s strategic procurement and policy tools with enabling a vibrant semiconductor ecosystem: “Finland creates demand for advanced chips using industrial policy tools, alongside strategic procurement in sectors such as defense and aerospace, and connectivity.” Tuomas Korpela, Business Development Senior Manager - Corporate Development Organization, NokiaAt a regional level, Joerg Schulze, Director of the Bavarian Chips Alliance, said that his organization was supported by the Bavarian State Ministry of Economic Affairs, as well as by companies and universities. “We help semiconductor companies to establish themselves and grow here through help with site searches, networking and contacts, funding and support, and talent acquisition,” said Schulze.Joerg Schulze, Spokesperson for the Bavarian Chips Alliance, Director of the Fraunhofer IISB, Bayern Innovativ GmbHCompanies in the European semiconductor supply chain also provided the summit with their insights into the roots of global success. André Grede, Chief Technology Officer of Comet, described how his company’s strategy is not to wait for customers to tell it what they need, but to be “ahead of the curve.” Grede said: “Is staying in sync with the customer enough? Not for us - we are deeply embedded with our customers, and constantly looking to broaden our relevance to them.”André Grede, CTO, CometChristophe Maleville, Chief Technology Officer of Soitec, provided a real-world example of how this is done. He said: “Our engineered substrates using RF-SOI technology reduce the drain on a mobile phone’s battery power, and cut our customers’ board footprint thanks to RF front end integration. As a result, our products are now in 100% of 5G smartphones.”Christophe Maleville, CTO, SoitecAnne Hidma, Senior Vice-President for Europe and the US at ASML, shared the company’s success formula: “The reasons for ASML’s success include customer focus – decide which markets you are going to be in, and which you are not. We are also all-in on innovation. We nurture an ecosystem, which for us includes imec and CEA-Leti, as well as partnerships with academia. And lastly, we have a strong supply base, which is a core strength of Europe.” In a time marked by both uncertainty and opportunity, the example of ASML shows how the European semiconductor supply chain can survive and thrive.Anne Hidma, Senior Vice President EUR US, ASMLEurope’s Path ForwardThe CxO Summit made one thing clear: Europe has world-class innovation, policy momentum, and industrial commitment. What’s needed now is faster execution, deeper collaboration, and the courage to invest in the technologies of tomorrow. As the industry heads toward the $1 trillion milestone, the decisions made today will shape Europe’s place in the semiconductor world for decades to come.On behalf of SEMI, the SEMI Europe team would like to express appreciation to the industry leaders for sharing their visions and readiness to collaborate during the CxO Summit.SEMI ContactLaith Altimime, President SEMI [email protected]

Silicon carbide (SiC), with its wide band gap and high thermal conductivity, is increasingly favored for semiconductor power applications across several fast-growing industries. Its ability to operate at higher voltages and frequencies enables significant efficiency gains, particularly in e-mobility, where SiC offers key advantages in size, weight, and speed compared to traditional silicon-based power devices.However, as promising as SiC is, the industry still faces critical challenges in scaling to meet growing demand. Key barriers include cost, reliability, and manufacturing capacity, all of which must be addressed for SiC to fully mature.SEMI spoke with Entegris Senior Director - Advanced Technology Engagements, Office of the CTO Mark Puttock, Ph.D., to discuss the challenges of scaling SiC power chip manufacturing from a material supplier’s perspective. Puttock shared insights ahead of his presentation at the Entegris session, Cultivating a Thriving SiC Market: Tackling Key Challenges Across the Value Chain, taking place on November 14, 2024, at SEMICON Europa in Munich, Germany. Don’t miss the opportunity to engage with experts from Entegris and other industry leaders. Registration is now open. SEMI: Global megatrends like environmental crises and AI drive the necessity for SiC power semiconductors. What is the current status? Puttock: The increasing demand for efficient power electronics — fueled by global megatrends such as vehicle electrification, environmental de-carbonization, and the rise of power-hungry AI chips — drives the necessity of wide bandgap semiconductors. SiC offers advantages of weight, size, and speed over traditional silicon (Si) solutions, which are particularly vital in automotive applications 600V and above. However, SiC chip manufacturing has not reached the maturity of silicon-based processing. Greater maturity will help reduce costs, which will accelerate adoption in the market.SEMI: What are the main challenges in scaling SiC?Puttock: Challenges in scaling SiC power chip manufacturing to high volumes are not surprising. That’s because high volume producers have not been operating long enough to resolve early-stage issues. From a material perspective, SiC is more challenging to manage compared to Si. The challenges we identify include:Chemical Mechanical Planarization (CMP): SiC is nearly as hard as diamond and significantly harder than Si, making it challenging to achieve a high removal rate while maintaining both planarity and low defectivity. This step is crucial toward the end of the wafering process and before the epitaxial growth of device layers.Handling: SiC is more brittle than Si, making it more susceptible to damage or breakage.Implantation: SiC is more difficult to implant than Si, requiring higher temperatures and the use of aluminum instead of boron as a P-type implant species. Additionally, it is a significant challenge to achieve a reliable aluminum source with a long and stable lifetime.Thermal Processing for Wafer Growth and Epitaxy Processes: SiC processes run hotter than Si ( 2000° C for wafering, 1500° C for epitaxial growth), demanding resilient chamber parts to achieve good lifetimes.Sustainability: Because SiC is extremely hard, the CMP process requires significant amounts of slurry. Improving slurry recycling and wastewater management continues to be a challenge.On October 29, we will address these issues in our webinar, “Challenges in Scaling SiC Power Chip Manufacturing: A Material Supplier's Perspective” This session will provide valuable insights and considerations for advancing maturity in high-volume SiC power chip manufacturing. SEMI: Can you elaborate on the challenges associated with CMP for SiC wafers? Puttock: SiC wafers are challenging to process, requiring specialized materials and methods compared to traditional silicon. Defects in the SiC wafer crystal during non-optimized CMP processing can propagate into the device epitaxial layers. This leads to yield loss, increased electrical resistance, reduced performance, and wasted power.SiC wafers must be cut, ground, lapped, and polished to create the necessary surface properties before depositing active layers. As the demand for these devices grows, optimizing the CMP process is essential to ensure the desired surface quality and planarity required for device fabrication. For a deeper understanding of these challenges, we recommend downloading our latest white paper, “Solving CMP Challenges in High-Volume SiC Production,” which covers:Achieving maximum smoothness with high removal ratesReducing the total cost of ownership Optimizing CMP slurry and pads for the unique wafer chemistry and topology of SiC wafersSEMI: What do you mean by optimizing slurry for SiC CMP?Puttock: CMP slurry typically consists of abrasive nanoparticle powder dispersed in a chemically reactive solution. The objective is to achieve a smooth, defect-free surface (less than 1 A Ra) with a high removal rate (greater than 7 µm/m).Traditionally, achieving high removal rates and smooth surfaces required two separate slurries. This approach sometimes forced SiC wafer manufacturers to choose a defect-free surface over a faster, more efficient CMP process, depending on their fab capabilities. Today, optimization allows SiC wafer manufacturers to achieve both high polishing capacity and good final surface quality using a single slurry.Additionally, while the slurry is the most critical part of the CMP process, the pad must be compatible with the application. This ensures the desired planarity while also preventing scratches or contamination of the SiC wafer surface. Research shows that optimized thermoplastic polyurethane CMP pads outperform traditional thermoset polyurethane pads. The optimized pads minimize surface damage and enhance removal rates due to their bulk hardness.SEMI: What are the future challenges for SiC devices? Puttock: SiC devices are increasingly favored for their superior energy efficiency and reduced environmental impact. However, the SiC manufacturing process presents challenges due to its high-temperature operations, which consumes significant amounts of energy and shortens the lifespan of chamber components. To address this, improving efficiency in these processes will be crucial in the coming years.Recycling is another important challenge. For example, CMP slurries present an opportunity for water recycling and conservation. At Entegris, we are committed to this issue and are actively collaborating with key industry players to enhance material circularity and prioritize sustainability in our new product development.SEMI: How is Entegris contributing to advancements in SiC technology, and what initiatives or partnerships do you have planned for the near future? Puttock: Entegris is an active member of the SEMI Global Automotive Advisory Council (GAAC) and participates in a working group focused on SiC with key industry leaders such as Volkswagen, BMW, Porsche Consulting, onsemi, Infineon, STMicroelectronics, and others. Our engagement spans the entire semiconductor supply chain, collaborating with integrated device manufacturers and original equipment manufacturers in fabs worldwide. Additionally, we recently announced our latest long-term agreement with onsemi, which underscores our commitment to advancing SiC technology.SEMI: What are your expectations regarding your participation at SEMICON Europa? Puttock: SEMICON Europa is a unique platform to connect with the semiconductor and automotive ecosystems. Last year, we organized a highly successful SiC session in collaboration with SEMI at both SEMICON West and SEMICON Europa, focusing on “Connecting the Automotive Ecosystem Towards More Mature SiC Manufacturing.”This year, we will continue the discussion with industry leaders during our session, “Cultivating a Thriving SiC Market: Tackling Key Challenges Across the Value Chain.” Our goal is to provide insights and propose solutions that will enable SiC power chips to achieve their anticipated role in future technology ecosystems.We will present alongside Porsche Consulting, and the talks will be followed by a panel discussion that will explore the current state and future prospects of SiC technology in power electronics. We invite visitors to join us at the Executive Forum on Thursday, November 14, from 1:40 – 3:00 p.m. and to visit us at Silicon Saxony booth 219 in Hall C1.About Mark PuttockMark Puttock, Ph.D., is the senior director of advanced technology engagements in the office of the CTO at Entegris. He has worked in the semiconductor industry for over 30 years with a background in physics and plasma processing. As a team member of the Entegris CTO office since 2014, Mark has followed technology trends and collaborated with Entegris’ global product development teams to develop timely and differentiated new materials, chemistries, and components for all the world’s semiconductor manufacturers. Maria Daniela Perez is Communications Manager at SEMI Europe.