The New Reality of Semiconductor Supply ChainsThe semiconductor industry is one of the most globally connected and time-sensitive sectors in existence. From design and wafer fabrication to testing, assembly, and delivery, every step depends on flawless coordination across borders, suppliers, and time zones. More than 1 trillion chips move through global supply chains each year[1], connecting suppliers, foundries, and fabs across continents.But as the world becomes more complex and unpredictable – with trade tensions, capacity shortages, shifting technology cycles, and driven by increasing AI and energy demand – that coordination is increasingly under pressure. Even a minor delay in one place can halt production in another. A single missed component, delayed shipment, or grounded flight can trigger line-down costs that can exceed $4 million per hour in advanced fabs[2].That’s why logistics is no longer a background process; it’s a strategic function that directly influences performance, reputation, and profitability.Figure 1 - We live in a complex and unpredictable world where global events have significant impacts. When Every Hour MattersFew industries feel the impact of delays as directly as semiconductors. One missing component, a grounded flight, or a customs delay can trigger a chain reaction that stops production lines, delays product launches or breaks contractual commitments.Time-critical logistics plays a distinct role in safeguarding supply chain performance, staying in control and enabling companies to recover in hours instead of days. It serves as the system’s shock absorbers when conventional routes are disrupted, timelines collapse, or customer commitments are at risk.The ROI of UrgencyTime-critical shipments are costly—but in the semiconductor world, not acting fast is far more expensive and pose significant consequences. A single line-down event can cost millions of euros per day, depending on the process stage and the customer involved. Compared to that, the premium for a same-day or next-flight shipment is minimal.When companies integrate time-critical logistics as a planned capability, the ROI becomes tangible.Avoided downtime: Faster recovery after supply interruptions directly protects production yield and customer commitments.Reduced inventory buffers: If rapid response capacity is available, less working capital is tied up in safety stock.Customer retention: Reliable continuity strengthens trust and long-term business relationships.In this sense, time-critical logistics isn’t just an operational expense – it’s a continuity investment. It protects revenue streams and reputation and gives manufacturers the agility to respond to whatever the next disruption brings.Example scenarios include:A single fab tool delay can idle an entire production line, costing millions per hour. During the 2024 Taiwan earthquake, a single supplier delay triggered hundreds of millions in global production losses.A next-flight-out or onboard courier shipment typically represents less than 1% of that downtime cost.Rapid recovery also prevents ripple effects such as delayed customer deliveries.The companies that embed time-critical logistics as a strategic capability gain not only cost protection, but competitive agility.From Efficiency to AgilityTraditional supply chains were built for stability and scale: move high volumes, keep costs low, and plan far ahead. But in the semiconductor industry, speed and adaptability now define competitiveness.Agility means having the systems, partners, and mindset in place to act decisively when the unexpected happens. Leading companies are now integrating dedicated control towers, predictive data insights, and predefined emergency logistics playbooks – turning reaction time into a measurable performance indicator. However, agility is not only a matter of infrastructure – it depends on data-driven visibility and cross-industry collaboration.Collaboration as the Real DifferentiatorNo company can face disruption alone. Semiconductor supply chains depend on the combined coordination of equipment makers, material suppliers, foundries, logistics providers, and government agencies.Collaboration is therefore the new competitive edge. Shared standards, visibility tools, and coordinated crisis response frameworks – like those developed under the SEMI Supply Chain Management Initiative – are helping the industry build collective resilience. These cross-functional efforts are where innovation scales.Looking AheadThe semiconductor industry will continue to expand into new regions and technologies. Each step adds complexity and, with it, vulnerability. The next decade will test not just how fast companies can produce, but how fast they can recover. Future disruptions – whether geopolitical, environmental, or digital – are inevitable. The question is not how to avoid them, but how to respond faster and smarter when they occur.That’s where time-critical logistics will continue to make its mark. It is more than just a transport solution. It gives companies the ability to act decisively in moments that matter most – transforming time from a constraint into a competitive advantage that ensures business continuity.Key TakeawaysSemiconductor supply chains are uniquely time-sensitive — a single delay can halt multimillion-dollar production lines.Integrating time-critical logistics improves responsiveness, reduces inventory needs, and safeguards business continuity.Agility, not efficiency, will define the next decade of semiconductor competitiveness.Collaborative industry frameworks like the SEMI Supply Chain Management Initiative are key to building resilience.How ready is your supply chain?Learn more about time:matters’ tailored logistics solutions at SEMICON Europa 2025 (Hall C2, Booth 433), November 18-21 in Munich and attend the company’s presentation on the TechARENA stage on November 19. For more information or to schedule a meeting at SEMICON Europa, click here to contact Remy Schoenzetter.Remy Schoenzetter is Global Head of Business Unit High Tech Semicon at time:matters.[1] Statista: Global semiconductor unit shipments 2021; SIA/WSTS Annual Reports[2] McKinsey: "Need to boost semiconductor fab efficiency?" (2023); LinkedIn Air Monitor analysis (2025); Critical Manufacturing Industry Blog (2024)

The semiconductor and electronics industries are at a turning point. Once defined by efficiency and scale, supply chains now face a convergence of pressures—from geopolitical tensions and climate risks to accelerating innovation cycles. The stakes are higher than ever, but so are the opportunities to reimagine how this global ecosystem operates.The End of “Just-in-Time” as We Knew ItIn 2025, one thing is clear: the old “just-in-time, globally concentrated” supply chain model can no longer carry the industry forward. Trade policies are tightening, export controls are multiplying, and tariff investigations are fragmenting markets that once felt seamlessly connected.At the same time, natural resource risks are mounting. PwC estimates that by 2035, nearly one-third of global semiconductor production could face copper supply disruptions caused by climate change. That figure rises to nearly 60% by 2050 if emissions remain unchecked. Add to this the growing maze of regulatory barriers and import restrictions on raw materials, and the industry faces rising procurement challenges and relentless cost volatility.Demand Isn’t WaitingWhile supply chains struggle with constraints, demand continues its upward climb. Global chip sales are rebounding, driven by innovation cycles in AI, automotive electronics, 5G, and renewable energy. Bringing new manufacturing capacity online takes years. The imbalance is widening, and companies can’t afford to rely on outdated, reactive supply chain models.Resiliency has become mission critical. And as the saying goes: you can’t respond to risks you can’t see. Guesswork isn’t a strategy—especially when disruptions are systemic.Fragility in a Fragmented EcosystemSemiconductor production is specialized and geographically fragmented. A disruption at a single node—whether a mine, a fab, or a logistics hub—can ripple through the ecosystem in days or even hours.Recent shocks have only reinforced this fragility:Trade restrictions are pushing manufacturers to rethink supply chain design.Climate change is endangering raw materials like copper and quartz, both highly water- and energy-intensive to produce.Market volatility is being driven by the explosive rise of AI and data center demand.The lesson is simple: resilience is no longer optional—it’s an existential requirement. And the path to resilience runs through visibility, agility, and collective intelligence.Real-Time Intelligence: From Luxury to NecessityIn today’s environment, quarterly or even monthly reporting cycles are dangerously slow. By the time a shortage, tariff, or logistics reroute appears on the radar, the window to act may have already closed. The cost of waiting—or doing nothing—is steep, and the damage can be lasting.Real-time data and AI-driven insights aren’t “nice-to-have” tools anymore. They are strategic imperatives for supply chains under constant stress. They allow companies to anticipate risks, respond faster, and align more effectively with partners across the ecosystem.Collaboration Is the New CurrencyNo company can go it alone. A chipmaker depends on its suppliers, just as a rare earth miner depends on transport partners. The global supply chain is a living system—and its resilience depends on the strength of its interconnections.Deeper supplier relationships, visibility into Tier 2 and Tier 3 suppliers, and shared intelligence on geopolitical and regulatory shifts are all critical. Resiliency isn’t built in silos; it’s forged through collective action.Building the Future TogetherThe semiconductor and electronics industries stand at the threshold of a new era—one of collective risk but also shared potential. Companies that embrace transparency, real-time intelligence, and collaboration will not just survive shocks, but emerge stronger, more agile, and better prepared to lead.In this new chapter, collaboration is the currency of resilience.That’s where Conductor™ comes in: a real-time intelligence platform built to help industry players anticipate, adapt, and act – together. Conductor weaves all those threads together, delivering not just data, but a shared situational awareness, helping the industry to think and act as a system rather than a collection of silos.What Conductor Enables - and What It Could Lead ToSmarter, faster decisionsA platform like Conductor, which uses near real time data, AI-powered news and alerts, and community-driven insights, turns reactive “damage control” into proactive “risk management.”By bringing together cross-segment, critical KPIs, curated AI news, expert analysis, and peer-community intelligence, Conductor helps teams understand what’s happening now, assess the likely impact on their business, and decide how to respond - faster, and with more context.Over time, this could shift the default mode of the industry from “fire-fighting” to “anticipatory steering.”A more adaptive supply chainAs more organizations adopt the platform, the collective visibility improves. Conductor can power scenario planning, enable early warning systems, and foster agile “micro-pivot” strategies: reroute logistics, adapt sourcing, or reallocate production before a disruption becomes a crisis.New models of ecosystem resilienceWith consistent, shared intelligence, industry players can identify common vulnerabilities and coordinate mitigation for mutual gain. Over time, this could lead to more resilient operations through diversified sourcing strategies, and even shared contingency mechanisms.In short: Conductor is a building block toward a more distributed, more transparent, more resilient global semiconductor ecosystem.Accelerated innovation cyclesWhen the risk of disruption is better managed, companies can operate with more confidence, investing in new capacity, experimenting with new chip architectures, or integrating new markets more aggressively. Technology diffusion accelerates when the fear of “what-if” is reduced.Where We Go From HereConductor is already in early-access pilot phase, and feedback from the SEMI Supply Chain Management Initiative’s Industry Advisory Council is actively shaping its evolution.As adoption spreads, network effects will increase the platform’s predictive power, making it more valuable for everyone involved.In an industry that’s increasingly defined by fast change and high stakes, tools like Conductor shift the balance: from reactive scramble to informed strategy, opaque fragility to visible resilience, and from isolated action to ecosystem collaboration.The future of supply chain resilience starts here. Sign up for early access to Conductor today and help drive the new era of trade.Talal Abu-Issa is Co-CEO and Co-Founder of Beebolt.Krish Dharma is Strategic Advisor, SEMI Supply Chain Initiative.

Political leaders worldwide are investing hundreds of billions to reduce semiconductor dependencies and secure their positions in this nearly $630 billion market, according to the World Semiconductor Trade Statistics (WSTS). Yet the extreme specialization and geographic concentration of the semiconductor supply chain makes complete self-sufficiency economically impractical and strategically questionable.After decades building an intricate global production network optimized for cost and innovation, the industry now faces pressure to splinter into regional blocks. But this raises important questions: Can any nation truly achieve chip self-sufficiency? And would disconnecting from the global ecosystem ultimately hurt competitiveness more than help security?The Independence IllusionThe global semiconductor industry has carved itself into specialized kingdoms. The United States dominates chip design and certain equipment categories, representing about 50% of global revenue. Taiwan controls roughly 67% of global foundry capacity through TSMC—so much so that semiconductors represent one-sixth of Taiwan's total GDP. Europe's strength lies in ASML's advanced EUV lithography technologies, the machines everyone needs but only one company currently makes.China plays an interesting double role too: it's both the largest semiconductor consumer at 50% of the global market and an important producer, holding 31% of total global foundry capacity in 2023.So far, every "independence" initiative has deepened interdependence. The US needs the Netherlands for lithography equipment. Europe needs Asia for high-end chip production. China develops much of its own equipment but remains dependent in key areas. The House of Cards ProblemFor decades, the semiconductor industry perfected making incredibly complex products cheaper every year through extreme specialization. Each company focused on one slice of the supply chain and became world-class at it. But nobody talked about what we built: a house of cards. The entire global economy now depends on a supply chain so specialized that losing even one supplier can shut down entire industries.The COVID pandemic exposed what industry insiders had warned about for years: the chip supply chain works brilliantly until it doesn't. When it fails, it fails spectacularly. The automotive industry alone lost $210 billion in 2021, and some manufacturers still haven't fully recovered.This 2021 chip shortage wasn't just a pandemic problem. Currently, rising geopolitical tensions are changing a supply crisis into a strategic nightmare, forcing countries to rethink their entire approach to semiconductors and their production.The Barriers to IndependenceThe semiconductor industry faces serious barriers that make true independence incredibly difficult for any single nation.First, the supply chain depends on chokepoints controlled by just a few companies in specific regions. Electronic Design Automation tools—essential software for designing any chip—come mostly from three US companies: Synopsys (~31%), Cadence Design Systems (~30%), and Siemens EDA (~13%). Without these design tools, you simply cannot create modern semiconductors. Manufacturing equipment presents an even tighter bottleneck, with ASML holding 100% control of EUV lithography machines needed for advanced chips. Second, the talent shortage makes building new capabilities nearly impossible. By 2030, semiconductor companies will need 1 million additional skilled workers. Developing semiconductor expertise takes a decade of hands-on experience, and most skilled professionals already work in established industry clusters like Taiwan, South Korea, and Silicon Valley. You can't simply relocate these engineers or train new ones quickly enough to staff multiple new regional semiconductor industries.Third and finally, resource requirements exceed what most countries can realistically provide. Building advanced semiconductor chip plants costs $20-30 billion each and they take years to construct before producing a single chip. These facilities consume up to 15 million litres of ultra-pure water daily and large facilities require up to 100 megawatt-hours of power per hour. Beyond the physical infrastructure, technical complexity has made first-time silicon success rates drop to just 14%, while 40% of semiconductor demand still comes from older process nodes, requiring completely separate supply chains for different chip generations.The Trillion-Dollar Investment RaceConcerns about supply chain security have triggered government interventions worldwide. The United States committed $52.7 billion through the CHIPS Act plus additional tax credits. While President Trump initially called for eliminating the program in March 2025, he instead signed an executive order on March 31, 2025, creating the "United States Investment Accelerator" to take over CHIPS Act implementation. TSMC also announced a new $100 billion investment to build five additional chip facilities in the US.Countries across the globe are racing to establish or strengthen their semiconductor capabilities. India has entered the semiconductor competition with its $10 billion Semiconductor Mission and secured investment from Micron Technology, which is constructing a $2.75 billion assembly and test facility. Japan has intensified its semiconductor strategy by establishing Rapidus Corporation with a government support package that is estimated to reach $11.46 billion aimed at revitalizing its domestic chip industry. Meanwhile, the European Union has established a €43 billion Chips Act through 2030, China launched its third "Big Fund" phase in May 2024 with $47.5 billion, and South Korea has developed a $450 billion K-Semiconductor strategy through 2030.These initiatives are changing the semiconductor industry on a global scale. However, complete self-sufficiency would require significant additional global investment and result in 35-65% semiconductor price increases due to suboptimal scale and inefficiencies.What Comes NextThe quest for chip self-sufficiency has become a trillion-dollar global endeavor, with countries placing enormous bets on facilities that may not pay off for years. Complete semiconductor independence remains financially prohibitive for any country, but strategic resilience is achievable.The winners will be those who build the most resilient networks and manage interdependence best. Rather than chasing impossible independence, nations should focus on strengthening their existing advantages while addressing their most vulnerable dependencies. Full independence remains a fantasy, but smart interdependence offers a realistic approach to semiconductor security.Click here to read the full white paper.About the AuthorsJan-Bart Smits is a Managing Partner at Stanton Chase Amsterdam. He began his career in executive search in 1990. At Stanton Chase, he has held several leadership roles, including Chair of the Board, Global Sector Leader for Technology, and Global Sector Leader for Professional Services. He currently serves as Stanton Chase’s Global Subsector Leader for the Semiconductor industry. He holds an M.Sc. in Astrophysics from Leiden University in the Netherlands. David Harap is a Managing Director at Stanton Chase Austin, bringing over 25 years of executive search experience to his role. He has successfully placed hundreds of senior executives and functional leaders across various industries. A Cornell University graduate and Father Kelly Scholar, Harap lectures at the University of Texas at Austin. He is a certified Ambassador for Hofstede Insights, bringing unique insights on organizational culture to his work.

Atomic layer deposition (ALD) and atomic layer etching (ALE) are transforming the way semiconductors are built—layer by layer, atom by atom. These atomic-scale processes are essential to scaling future transistors, improving memory, and enabling next-generation device architectures.SEMI spoke with Sergei Ivanov, Business Technology Director of Metallics R D and Balaji Kannan, Business Technology Director of Dielectrics R D and from Merck KGaA, Darmstadt, Germany to learn about their latest material innovations. At the company’s Electronics business, materials scientists and process engineers are advancing atomic-scale engineering to address some of the semiconductor industry’s toughest challenges. From novel deposition chemistries to next-generation etch techniques, their work is helping to enable future logic, memory, and specialty devices.Pushing the Boundaries of ALD Precursor ChemistryAtomic Layer Deposition (ALD) remains a cornerstone technology for scaling transistors and enabling new architectures. Materials scientists at Merck KGaA, Darmstadt, Germany are exploring novel precursors that enhance film quality, streamline processes, and expand the operational window for complex structures:One area of focus is next-generation hafnium and zirconium precursors. “These advanced high-k dielectrics offer better thermal stability, improved step coverage, and reduced impurities while achieving higher k-values,” Sergei Ivanov explained. “Such attributes are essential for logic and memory devices that demand reliable dielectric performance with minimal defect density.”Another important development is area selective deposition (ASD). Merck KGaA, Darmstadt, Germany’s small-molecule inhibitor solutions reduce the need for advanced patterning in narrow dimensions and 3D geometries, enabling cost-effective and simpler integration for leading-edge nodes. Their selective co-reactants platform leverages digitalization techniques including multivariate analysis, digital twin technology, and machine learning to accelerate process development for critical ASD applications. This approach facilitated industry-first adoption of ASD in high volume manufacturing and enables an ever-expanding toolbox of OEM processes for ASD of high-k, Ti, Mo, Si and other thin films.Merck KGaA, Darmstadt, Germany is also broadening the scope of ALD chemistries across the periodic table. “As our customers encounter new technical challenges, we continue to expand our R D scope across new elements and ligands. Examples include europium, lanthanum, scandium, and cerium dopants with improved electrical properties, niobium and vanadium precursors for deposition of nitride and oxide films with reduced impurities and improved ALD performance, and high-performance nickel MILC solutions are finding their way out of our labs and into customer roadmaps at an ever-accelerating pace,” said Sergei Ivanov.The company’s role in molybdenum chemistry is another example. Merck KGaA, Darmstadt, Germany is a key producer of molybdenum precursors including MoO2Cl2 with industry-leading quality, density, and container utilization. The company offers MoCl5 with advanced trace impurity control paired with innovative container technology. The company’s next-generation organic metallic molybdenum precursors incorporate novel ligands that contribute to critical gains in device performance.Merck KGaA, Darmstadt, Germany’s work with organosilane precursors is also opening new possibilities. “For gate-all-around (GAA) transistor technology, precursors incorporating novel bonding structures enable highly conformal dielectric films with excellent electrical and physical properties, even in complex 3D geometries. At the same time, organosilane chemistries designed to increase silicon incorporation during deposition are supporting high-growth-rate oxides for gapfill applications, delivering the thick films required with greater throughput,” said Balaji Kannan. “Together, these innovations highlight how tailored precursor design can address both scaling challenges and manufacturability in next-generation devices.” Driving Selective and Sustainable Atomic Layer Etching (ALE)“Precision in etching is as critical as deposition. Our innovations in ALE are designed to provide ultra-selective, low-damage material removal, which is increasingly vital as device geometries become finer and more complex,” Sergei Ivanov shared. One example is metal-free ligand exchange ALE for high-k materials, where Merck KGaA, Darmstadt, Germany’s research into etching HfO₂, ZrO₂, and HfZrO₄ showcases a novel metal-free approach. This technique enables accurate and damage-minimized etching of high-k dielectrics, which is essential for integrating advanced transistors and memory stacks.These advancements address industry-wide concerns regarding pattern fidelity, material selectivity, and plasma-induced damage, ensuring greater process control and extending the lifetimes of devices.Looking AheadMerck KGaA, Darmstadt, Germany’s strategic commitment to semiconductor innovation includes ongoing R D efforts that reflect the vision of its Electronics business: providing material-centric solutions to the industry’s most complex integration and performance challenges. Whether advancing front-end device scaling or developing breakthrough materials for emerging applications, the Electronics business of Merck KGaA, Darmstadt, Germany is committed to shaping the materials roadmap for a more connected, intelligent, and efficient world.James Lam is Business Development Manager at SEMI Europe.

Extended Plateau, Not a New Cycle: The Broader Industry PictureThe current recovery in the semiconductor market appears to signal revival, yet is best understood as an extended phase of the existing cycle—a phase defined less by renewed demand than by structural restraint and efficiency-driven realignment.AI-related demand is indeed driving the rebound, yet this recovery differs fundamentally from past expansionary booms. It is unfolding within an efficiency-driven adjustment phase, where capital expenditure has shifted its focus from capacity expansion to process upgrades and optimization. The observed recovery therefore reflects structural realignment rather than a conventional cyclical upswing.This realignment has created an ‘Extended Peak Plateau’—a state not of cyclical acceleration but of structural transformation. The imbalance between resilient equipment and materials spending and stagnant wafer shipments has produced an uneven recovery, concentrated in select high-value segments rather than evenly across the value chain. The apparent plateau seen today stems less from broad-based demand expansion than from price-anchored growth, sustained by firm pricing in premium segments such as AI-related and high bandwidth memory (HBM) products.At the same time, semiconductor manufacturers—particularly in memory—have adopted a supply-controlled operational strategy, emphasizing process optimization and product upgrades over large-scale capacity additions. Together, these three structural forces—supply/demand imbalance, price-anchored resilience, and efficiency-oriented adaptation—have defined the industry’s current phase, where revenue growth remains elevated but plateaued rather than accelerating or decelerating.In this context, the recent rise in DRAM prices and continued hyperscaler investment hold implications beyond short-term variables: They determine whether the industry can sustain equilibrium without widening the amplitude of future cycles between overheating and contraction. If DRAM recovery remains purely supply-driven, the upturn will likely be shallow; conversely, a slowdown in hyperscaler investment could undermine the demand foundation itself.This is why the report characterizes the current phase not as a “new cycle” but as an extended plateau. While AI-driven momentum has already taken hold, the transition toward a stable and balanced industry structure must pass through the filter of efficiency. This efficiency-based rebalancing will, in all likelihood, require a period of adjustment before a truly sustainable equilibrium — the foundation for the next phase of genuine growth — can emerge.Desynchronization Between Investment and Wafer Demand: Evidence of a Structural ShiftThe chart below visually illustrates this structural asymmetry. When normalized to Q1 2019 = 100, as of Q2 2025 equipment investment has rebounded to roughly 244, photoresist revenue to 200, and total semiconductor revenue to 184—yet wafer shipments remain near 110 and wafer revenue around 103.Diverging Trends Across the Semiconductor Value Chain (Q1 2019 = 100) * Note1. Data sources: SEMI (WWSEMS, Silicon Wafer Shipment, Photoresist Market Data), WSTS, and IR disclosures from the top five wafer suppliers.2. Wafer revenue reflects the aggregated sales of the top five suppliers; Shin-Etsu’s quarterly figures are estimated from 2Q 2021 onward.3. Semiconductor fab equipment investments reflect only wafer-processing equipment (WFE) expenditures, based on the Wafer Processing Equipment category defined in SEMI’s WWSEMS dataset. All indices are normalized to Q1 2019 = 100; wafer area shipments are originally reported in million square inches (MSI), while other indicators represent revenues or investments in U.S. dollars (USD). The data clearly indicate that while equipment and materials have rebounded, wafer shipments and related revenue remain subdued. This divergence is not a matter of cyclical timing; rather, it reflects a re-alignment of the industry’s recovery dynamics, driven by process complexity and efficiency-oriented capital deployment. In other words, the widening gap between investment and wafer industry output symbolizes the industry’s transition from expansion-driven growth to efficiency-driven operations.In previous cycles, the linear linkage of “investment expansion → production expansion” prevailed. Today, however, investment is now synonymous with process-efficiency improvement rather than capacity growth. Behind this shift lie longer cycle times, rising process complexity, and the increasing concentration of demand in AI-related nodes. More complex manufacturing now requires process sustainment, advanced process control, and continual upgrades—CapEx allocation now reflects this shift.At the same time, a clear gap has emerged between wafer revenue and shipment growth, underscoring the divergence between financial recovery and physical output. In other words, shipment volumes have improved, but average selling prices remain subdued, signaling that the recovery is not demand-driven. This indicates that the current phase is sustained not by broad-based demand expansion, but by selective growth achieved through efficiency gains and product-mix adjustments. Despite this widening gap, the industry may give the outward impression of a steady growth plateau, since CapEx spending and high-value segments continue to post solid growth. Yet what appears as stable growth in the semiconductor and equipment market could be, in fact, a structural illusion—a state shaped by process complexity, efficiency-driven investment, and deliberate product-mix management. In short, this perceived growth is the by-product of financial and supply discipline, not the result of renewed demand momentum.Realignment of the Wafer Industry: A Gradual 300 mm-Led Shift Anchored in Efficiency and Portfolio StrategyAs the broader semiconductor ecosystem shifts its focus from expansion to efficiency—and from scale to high value and customer reliability—wafer manufacturers are, in turn, redefining their competitive edge around operational efficiency and the stable delivery of high-value products. The 300 mm wafer segment continues to lead the recovery, whereas 200 mm wafer shipments remain significantly below its 2022 peak, constrained by sluggish demand from legacy and non-memory applications. On the profitability front, depreciation burdens and persistent pricing pressure are creating dual headwinds.To navigate this environment, leading wafer suppliers are pursuing a dual-track approach: renegotiating long-term supply agreements (LTAs) while managing short-term contracts and selective and disciplined pricing to sustain utilization. At the same time, they are optimizing product portfolios to balance cash-flow defense with strategic offense. In this context, the critical question is shifting from “How much can be sold?” to “What kind of portfolio—specifically, how consistently can high-value wafers be sold and delivered?”In essence, performance is now measured less by expansion and investment scale, and more by efficiency, sustainability, and reliability. This strategic realignment mirrors the broader efficiency-driven transition underway across the semiconductor value chain, underscoring that the wafer industry is no exception to the global shift toward disciplined, portfolio-centric growth.Conclusion: The Path to True Recovery — When Three Forces AlignIn summary, the current semiconductor market is best understood as having entered an extended plateau following the peak of the present cycle, with its future trajectory hinging on how effectively DRAM price resilience and Big Tech investment continuity can restore balance. In essence, the outcome will depend on the market’s ability to narrow the amplitude between overheating and contraction, moving toward a more sustainable equilibrium. Rather than focusing on the DRAM price rebound driven primarily by supply adjustments or on demand concentrated in specific sectors, what truly matters for the wafer industry is the structural alignment of three key forces: (1) the recovery of broad-based and genuine demand, (2) the stabilization of the semiconductor supply structure, and (3) the improvement of operational efficiency across the value chain. The moment these three forces align will signal the true onset of the next upcycle — not only for the broader semiconductor market, but also for the global silicon wafer industry.Such alignment rarely occurs quickly — it requires time, discipline, and structural patience.This article distills the key insights from the Market Update section of the Q3 2025 Silicon Wafer Market Monitor Report. In this quarter’s analysis, the focus lies on the semiconductor cycle’s transition into an Extended Peak Plateau — a phase characterized not by broad-based expansion, but by efficiency-driven operations and portfolio realignment. Drawing on shipment, revenue, and CapEx data across wafers, materials, and equipment, this section identifies structural asymmetries between investment and shipment dynamics, and explores how efficiency gains, product-mix optimization, and supply discipline are reshaping the industry’s recovery trajectory.Separate from this focused article, the full SEMI Silicon Wafer Market Monitor Report provides a wider array of charts and indicators, offering a multidimensional perspective on how key variables interact to shape the future of the global wafer industry. Rather than serving as background commentary, the full report aims to deliver data-driven, decision-ready insights that support strategic thinking amid persistent market uncertainty.For more information on the report or to subscribe, please contact the SEMI Market Intelligence Team at [email protected]. Details on SEMI market data are available at SEMI Market Data. Sungho Yoon is a Principal Analyst on the SEMI Market Intelligence team.

The Department of Commerce (DOC) has issued an amended version of the semiconductor supply chain Notice of Funding Opportunity (NOFO), commonly referred to as “NOFO 2.” This NOFO is explicitly geared toward projects that would construct, expand, or modernize semiconductor materials facilities or semiconductor manufacturing equipment facilities. Initial concept plans will be accepted until November 1, 2026. DOC released the first version of NOFO 2 in September 2023. While the amended version maintains the focus on upstream suppliers of semiconductor manufacturing materials and equipment, it differs in several key aspects from the original. Outside of the application deadline extension, some of the most notable differences include the following.Project Cost: The amended NOFO 2 removes the $300 million cap on individual projects but argues that individual projects under $20 million are unlikely to reach a scale necessary for achieving strategic objectives.Cost Sharing: The amended version lacks a cost sharing requirement but notes that individual applicants "must be able to demonstrate that they have sufficient resources available to complete the proposed project, when combined with the requested CHIPS Incentives."Fab Clusters: NOFO 2 includes a focus on supporting "the development of vibrant, sustainable semiconductor clusters" by, for example, "reducing the burdens associated with transporting critical supply chain inputs." Evaluation Criteria: Proposals will be evaluated using the following five criteria:Economic and National SecurityCommercial ViabilityFinancial StrengthProject Technical Feasibility and ReadinessWorkforce Development Available Funding: The amended NOFO 2 does not specify a total amount of available funding, which is a departure from the September 2023 version, which set aside $500 million for the entire endeavor. Eligible Applicants: Eligible applicants include private sector organizations, non-profit organizations, consortia of private sector organizations, and consortia of private, public, and/or nonprofit organizations “with a demonstrated ability to substantially finance, construct, expand, or modernize a facility relating to the fabrication, assembly, testing, advanced packaging, production, or research and development of semiconductors, materials used to manufacture semiconductors, or semiconductor manufacturing equipment.”Application Structure and Deadlines: Initial concept plans will be accepted until November 1, 2026. DOC will notify applicants that have been invited to submit full proposals on an individual basis. Sources and Additional Information:NOFO 2NOFO 2 FAQ Visit SEMI Global Advocacy to learn more about public policy efforts and developments as well as how your company or organization can get involved.Ben Kallen is Sr. Manager, Public Policy Advocacy at SEMI.

On September 16, 2025, the Inclusive Chips Forum organized by Platform Talent voor Technologie at the High Tech Campus Eindhoven convened changemakers from across Europe’s semiconductor ecosystem to share insights and strategies for building a more inclusive industry.This full-day program was designed to showcase practical strategies, inspiring case studies, and collaborative solutions aimed at strengthening inclusion, innovation, and resilience in the semiconductor industry. With Europe’s role in the global semiconductor landscape under intense focus, the forum highlighted why building a workforce culture rooted in equity and belonging is not just the right thing to do, it’s a strategic imperative.A Thought-Provoking Panel on Inclusive LeadershipA central question resonated throughout the conversation: What if inclusivity were treated as a core component of leadership development, as fundamental as financial management or strategic planning, rather than an optional module or one-off seminar?The discussion surfaced several critical insights for the industry and beyond:Awareness alone is not enough. While raising awareness about bias and stereotypes is important, research and experience show it rarely leads to behavioral change on its own. Lasting change comes from setting clear norms, leaders must define and model what is acceptable, expected, and celebrated in organizational culture. As Sahar Yadegari, Executive Director of Expertisecentrum voor haar technische ontwikkeling, emphasized:“Awareness is a starting point, not the finish line. Real change happens when inclusion is built into systems — not treated as an add-on.” – VHTOLeadership as connection. True leaders don’t just focus on profits or processes. They bring all perspectives into the room, connect diverse groups, and create conditions for others to thrive.Structural support matters. To avoid symbolic gestures, organizations must embed inclusivity into their leadership practices and accountability systems.Competitiveness through inclusion. By embracing diversity and inclusion, Europe can future-proof its semiconductor workforce, strengthening innovation capacity and securing its position in an increasingly competitive global market.Looking AheadThe Inclusive Chips Forum underscored a powerful message: embedding inclusion into leadership is not optional, it is essential for the sustainable success of Europe’s semiconductor industry.As participants engaged in lively discussions and networking throughout the day, one thing became clear: building a resilient, innovative, and inclusive semiconductor ecosystem will require collaborative effort, courageous leadership, and a commitment to turning awareness into action.A heartfelt thank you to all speakers, participants, and partners who made this event possible.For more information, contact Ana Isabel Billingslea at [email protected] or Kartikey Srivastava at [email protected] Isabel Billingslea is Communications Coordinator at SEMI Europe.

The SEMI Semiconductor Manufacturing Cybersecurity Consortium (SMCC) Work Group 3 (Supply Chain Cybersecurity) just released a major work product that will have a significant and lasting positive impact on the industry: the “Standardized Semiconductor Cyber Assessment (SSCA)” questionnaire. Creating a common security assessment process for device makers, equipment suppliers, software suppliers and other members of the global manufacturing value chain has been one of the principal focus areas for the SMCC from its outset. Its aim is to replace the plethora of company-specific questionnaires that are maintained, distributed, filled out, evaluated, and discussed. Given the breadth and importance of this objective, the work group involved expert stakeholders from across the globe, and the quality of their collective efforts reflects the robustness of this approach.This first-of-its-kind resource helps companies:Evaluate cyber readiness and reduce supply chain riskStreamline compliance with one standardized assessmentBuild trust and share results across multiple clientsAlign with NIST CSF 2.0 and industry best practicesHow is the SSCA structured?The questionnaire takes its basic structure from the Capability Maturity Model Integration (CMMI) framework, which is designed to improve and integrate processes across multiple disciplines, such as software development, system engineering, system testing, and even people management. It defines five distinct maturity levels for the relevant parts of an organization or aspects of a major topic (see figure below) with general explanations of what it means to be at a particular level.Source: WikipediaWorkgroup 3 tailored this model to the unique cybersecurity challenges faced by the semiconductor manufacturing supply chain, identifying six activity areas inspired by the NIST Cybersecurity Framework 2.0—Govern, Identify, Protect, Detect, Respond, and Recover. Within each area, there are specific descriptions of the attributes an organization must exhibit to be at a certain level.What does the SSCA include?The SSCA is delivered in multi-tab spreadsheet form with a tab of instructions and a tab of questions. Some of the questions are multiple choice (“Which CMMI maturity level are you, based on the attributes listed?”) and many are Yes/No (“Does the organization use secure technologies to share sensitive data with suppliers?”). In total, there are 165 questions across the six activity areas.The latter is already offered in five languages: English, Korean, Traditional and Simplified Chinese, and Japanese.How can I get the SSCA?Click here and fill out the form to download the SSCA.“Remembrance of Things Past” or has this ever been done before?No… and sort of.Those of you who remember the state of the semiconductor manufacturing industry in the early 90s will recall that one of the biggest problem areas was the poor and inconsistent quality of the embedded equipment control and communication interface software. SEMATECH and its member companies saw this as an ideal pre-competitive domain for the consortium’s focus, so the Manufacturing Systems Division evaluated best practices in the software engineering community of that era and selected the Capability Maturity Model (CMM) of Carnegie-Mellon’s Software Engineering Institute. Sound familiar?While wholly adopting the CMM at that time was beyond the reach of most equipment suppliers, the nugget that emerged was the decision to standardize on a set of “4-Up” charts that conveyed the most basic of software quality metrics. This got everyone using the same vocabulary, definitions, and visualization techniques to compare progress across process areas and timeframes, which was instrumental in identifying and addressing the root causes of the software issues. An example of a typical software quality “4-Up” chart appears below.Source: Techno-pmAnd in related news!Given the WG 1,2 recent (mid-July) release of the SEMI E187 Compliance Guidance document and the formation of the new South Korea Cybersecurity Work Group (WG9), the SMCC is poised to realize its vision of accelerating the adoption of SEMI Cybersecurity standards while creating vital complementary material.For more information or to participate in the cybersecurity working groups at SEMI SMCC, please contact Mayura Padmanabhan at [email protected] Weber is the VP, New Product Innovations at PDF Solutions and a long-time SEMI Standards participant, currently co-leader of the Equipment Data Publication Task Force and Computer and Device Security Task Force.

On October 03, 2025, as part of the European Chips Diversity Alliance, the recent "Why Inclusion Fuels Better Chips" panel discussion, hosted by Kartikey Srivastava, Senior Specialist, Communications at SEMI Europe, brought together three leaders from across the ecosystem to explore how inclusion is not just a social imperative but a strategic advantage.Martina Wolfgruber, Head of Talent Skills Funding at Infineon Technologies Austria: With over 15 years of experience in HR, Wolfgruber is responsible for funded projects aimed at promoting careers and cultivating talent within the microelectronics industry.Catherine Le Lan de Franssu at Synopsys: Le Lan de Franssu brings a wealth of experience in customer success management, training, and team management from her time at companies like LSI-Logic, Synopsys, and Texas Instruments. She now focuses on fostering collaborations for workforce development.Dr. Suzanne Lesecq, Research Director and European Programs Manager at CEA- Leti: A research director and former university professor, Dr. Lesecq focuses on data fusion and advanced control. She currently manages European programs at CEA-Leti/DSYS.The semiconductor industry is the backbone of Europe's digital transformation, but achieving excellence goes beyond technology alone. It's about bringing every perspective and every talent to the table.Inclusion as a Strategic ImperativeThe panelists all agreed that a commitment to diversity, equity, and inclusion (DEI) is essential for Europe to lead in the semiconductor sector. Wolfgruber posed a compelling question: can Europe truly afford to leave half of its talent pool untapped? She pointed to data from a Boston Consulting Group study showing that companies with diverse leadership are nearly 40% more likely to achieve above-average profitability, and diverse teams are almost twice as likely to be innovative. For Infineon, she noted, "inclusion is not just a value... it's a strategic advantage."Echoing this sentiment, Le Lan de Franssu emphasized that innovation depends on collaboration across institutions, disciplines, regions, and cultures. She believes that "breakthrough moments happen when talented people of every background feel valued, supported to their best self at work." Dr. Lesecq added that inclusion is "a matter of society" that goes beyond a single company's benefit.Fostering a Culture of InclusionThe conversation then moved to practical steps for building a truly inclusive environment. Dr. Lesecq, coming from the academic sector, highlighted the significant gender imbalance and the lack of inclusion for people with special needs. She stressed the need for a major effort to attract untapped talent to the emerging semiconductor domain.One effective solution discussed was mentoring. Le Lan de Franssu shared how a mentoring program can help make diverse talent more visible. She noted that companies working together, such as the collaboration between Synopsys and Infineon on a summer school, helps not only with their own hiring needs but for the broader semiconductor industry. Wolfgruber agreed, stating that a wide range of communities already exists to help companies widen their scope and influence culture; it's simply a matter of companies leveraging them.The Future of a Diverse EcosystemThe panel concluded with a shared vision for the future. The moderator, Srivastava, summarized the key takeaways: a need for greater collaboration between industry and academia, the importance of mentoring, and a continued focus on leveraging research that proves diverse teams produce the best results.Dr. Lesecq shared her hope that Europe will continue to keep this mindset and implement it, seeing inclusion as a societal change that everyone must push for to create a "place for everyone."This panel discussion, along with initiatives like the Spark Excellence Award, serves as a powerful reminder that while technology is at the heart of the semiconductor industry, its true strength lies in the diversity of its people.Learn more about the European Chips Diversity Alliance. For more information, contact Ana Isabel Billingslea at [email protected] or Kartikey Srivastava at [email protected] Isabel Billingslea is Communications Coordinator at SEMI Europe.

As the global economy increasingly prioritizes sustainability and climate action, corporate renewable energy procurement has emerged as a critical tool worldwide. To achieve their corporate sustainability goals, businesses have sought to secure renewable energy through Corporate Power Purchase Agreements (CPPA) with renewable energy developers. Overview of System Charges: Their Role and Impact on Corporate Renewable Energy ProcurementCPPAs are one of the common approaches for businesses to procure renewable energy directly from renewable energy developers. Physical CPPAs involve two major cost components – energy costs and system charges. In this blog, we focus on system charges which are fees collected by utilities that include transmission and balancing components. Transmission charges cover the use of grid infrastructure to deliver electricity, while balancing charges cover the cost of maintaining real-time supply-demand stability.Although system charges are a key cost component in physical CPPAs, they are typically not the primary cost drivers. Based on Wood Mackenzie’s cost estimate analysis for a 50-100MW solar CPPA across the various regulated and liberalized APAC markets of Malaysia, Thailand, Australia, Philippines, South Korea, Singapore, Japan and Taiwan, system charges typically make up less than 20% of the total CPPA price. However, this share of system charges in the total CPPA price varies considerably between APAC markets. Australia, the Philippines and South Korea maintain system charges at between 10% - 20% of their solar CPPA prices. Singapore, Japan and Taiwan see the lowest proportion of system charges of solar CPPA prices at 7%, 6% and 5% respectively.Malaysia's Moment: Optimizing SAC for CRESS SuccessAnnounced in July 2024, CRESS allows for physical CPPAs from renewable energy projects of 30 MW and above. While CRESS opens new avenues for businesses to access renewable energy, the implementation of the System Access Charge (SAC), a surcharge imposed on renewable developers for using the Malaysian Grid under CRESS, has raised cost concerns within the industry.Based on Wood Mackenzie’s analysis, Malaysia's SAC account for about 60% of the estimated total CPPA price in Peninsular Malaysia, assuming a solar production cost at USD57/MWh (based on the average of the large scale solar LLS3 LLS4 - bid price range of MYR 0.19-0.28/MWh. The SAC significantly impacts the overall cost structure of renewable energy procurement. Malaysia’s SAC for solar “non-firm supply” under CRESS is currently set at 40sen/kWh or about USD/MWh making them the highest system charges applicable to CPPAs in the region.Another concern relates to cost-transparency and ease of long-term cost forecast for buyers. Most APAC markets demonstrate high transparency in their methodologies for determining system charges. Countries like Australia and Japan provide clear breakdowns of cost components, including grid capital expenditure, operation expenditure, power losses, ancillary services, and market operation costs. Even after analyzing other regulated markets like Thailand (where wheeling and balancing charges are based on UGT 2 tariff rates), Taiwan and South Korea, Malaysia’s SAC lacks transparency in its the system charges determination methodology, compared to three other vertically integrated Single Buyer markets like Peninsular Malaysia. Such cost transparency, including detailed cost components and calculation methodology, is crucial for corporate energy buyers looking to increase predictability of electricity costs by entering long-term CPPAs. The high SAC charge poses a significant barrier to the adoption of renewable energy by industrial end-users like semiconductor manufacturers and makes it challenging for prospective CRESS buyers to understand how these charges may evolve over a 21-year contract period. The SAC under CRESS would be reviewed every 3 years and is subjected to a maximum variation of 15% from the prevailing charge.RecommendationsThe lack of transparency of the SAC could jeopardize Malaysia’s critical development objectives, such as attracting MYR500 billion (USD $110 billion) in semiconductor investments by 2030 under its National Semiconductor Strategy (NSS), or its 40% renewable installed capacity target by 2035 (or about 18 GW by 2035). To address these challenges and create a more favourable environment for both semiconductor investments and renewable energy adoption, SEMI and Wood Mackenzie propose the following recommendations:Benchmarking SAC against transparent and established system charge components: Additional transparency would allow Malaysia to align with practices in both regulated and liberalized markets across the APAC region and allow more players to make long-term investments in Malaysia. Similar cost methodologies to the regulated tariff could be adopted. As an initial step, SAC should reflect Network Charges defined under the regulated tariff, and as a best practice, any differences between the SAC and the Network Charges in the regulated tariff should be clearly explained and justified (e.g. additional balancing costs induced by solar procured under the CRESS may be audited with the Single Buyer).Improving CRESS SAC stability and predictability: Ensuring transparency on the calculation methods behind SAC and its components, and predictable SAC levels, will allow businesses to proactively anticipate and plan for renewable energy procurement expenses, enabling informed decisions and on long-term corporate solar PPAs spanning 20 years’ time horizon under the CRESS framework. In particular, the maximum change in SAC charges can be narrowed down from 15% every three years.4Alignment of national sustainable energy policies: Strengthening policy support and ensuring accessible financing are essential to driving the widespread adoption of renewable energy. CRESS can only succeed if the scheme enables fair, transparent, and competitive access to clean energy. New renewable energy coming online via CRESS should not be put at an economic disadvantage through differentiated system charges from those applicable to other clean energy schemes. For example, no SACs are applied to solar under Large Scale Solar (LSS) projects, despite their system impacts being the same as under CRESS. Sustained efforts to improve affordability within CRESS are crucial for attracting investment, reducing the cost of SAC for buyers, and accelerating Malaysia’s transition to a sustainable, low-carbon future.The Path Forward and ConclusionImproving transparency and stability of SAC is crucial for facilitating Malaysia's development goals in semiconductor investments and renewable energy targets. By implementing these recommendations, Malaysia can enhance its competitiveness in attracting sustainable investments and accelerate its transition to clean energy.As the voice of the global electronics manufacturing and design supply chain, SEMI is committed to working with policymakers, industry leaders, and stakeholders to address these challenges. SEMI and Wood Mackenzie believe that by fostering a more transparent and competitive environment for renewable energy procurement, Malaysia can unlock the full potential of the country’s semiconductor industry while contributing to a more sustainable future.SoYoung Jang manages the SEMI Energy Collaborative programs at SEMI.Antoine Gaudin and Chun Kang Eu are from Wood Mackenzie.