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The SEMI Smart Manufacturing Initiative is a global effort focused on leveraging the most advanced technology to enhance productivity of electronics manufacturing facilities. Among the key technology advances this group seeks to promote is the value of implementing Industry 4.0/5.0 technology to deliver increased return-on-investment (ROI). A recent white paper published by the initiative focused on the productivity improvements that can be achieved by the formation of digital twins in semiconductor plants [1]; however, sustainability was not the focus, providing an opportunity for future pre-competitive work.To address this, the SEMI Smart Manufacturing Initiative formed the Accelerating Sustainability with Smart Manufacturing task force in 2023 to benchmark industry best practices that enable manufacturing facilities to meet their sustainability goals faster. The roadmap would complement the SEMI Sustainability Initiative by following a bottom-up approach to identifying the industry’s best practices. The task force primarily focused on fab device production, which is widely seen as the largest driver of the microelectronics industry’s Scope 1–2 emissions, water use and hazardous waste consumption, versus other branches of the supply chain.This task force developed a comprehensive solutions-based Scope 1 (process-based, direct) and Scope 2 (energy-based, indirect) emissions roadmap, incorporating the Connecting, Sensing and Predicting pillars developed by the Smart Manufacturing Initiative [2], and applied them at cleanroom, subfab and facilities levels for brownfield device-making facilities. While these phases are meant to be cumulative for maximum impact on targeted sustainability metrics, the SEMI task force understands that not every fab that applies the roadmap as a tool for sustainability purposes will advance use cases all the way to the Predicting phase. Moreover, special use cases are defined for greenfield fabs in a separate section of the roadmap, covering new infrastructure and more disruptive changes to existing operations to guide streamlined deployment. These key features are the foundation used to develop the first half of the roadmap for addressing Scope 1 and 2 emissions, leveraging Industry 4.0/5.0 technology, and published as a collaborative SEMI white paper [2]. The second half of the roadmap presented at SEMICON West 2025 [3] is covered in this latest white paper [4] and follows the same methodology though focused on reducing water consumption and hazardous waste in device-making fabs. Altogether, both SEMI white papers comprise the first comprehensive semiconductor industry roadmap covering carbon emissions, water and hazardous waste, while emphasizing the benefits of smart technology. The roadmap numerically rates each innovative use case in terms of relative impact on reducing a fab baseline void of smart elements and based on technology readiness level (TRL) with respect to future production capability. This functional roadmap will be available soon to the industry as a customizable model, denoted as the SEMI Smart Sustainability Model (SSM), wherein users can estimate sustainability gains by applying some or all listed use cases based on the nature of the facility’s sustainability profile and goals (i.e. relative proportion of water consumption sources at all levels of their operation, by adjusting weighted impact factors in the model). A base case assessment of proportional resource consumption representing an industry average 300mm fab, based on published data and task force estimates, is provided for fabs without detailed tracking to constitute the SEMI Smart Sustainability Roadmap.Many sustainability organizations across the semiconductor industry are focused on problem-based assessments which often highlight water scarcity or total industry carbon footprint growth and this can lead to IDMs, foundries, OSATs and others in the supply chain tackling sustainability from an isolated, project-based perspective. Moreover, a top-down approach to sustainability in fabs does not scale as well as a bottom-up approach to counteract the issue of increasing device process complexity and the larger associated process flow, requiring a higher amount of carbon emissions, water and hazardous waste, which needs to be addressed. For instance, a purchase power agreement for renewable energy is determined based on a finite amount of expected fab energy usage. However, energy-efficiency aided by AI across all levels of the fab is much more scalable, as a fab expands or additional process steps are added per product. Therefore, a data-driven approach, tracking emissions, water, and waste and linking technologies to future targets, is most effective, making this roadmap unique in scope and approach. A unified fab-wide data platform leveraging digital twins can further improve outcomes by linking water and waste metrics with downstream KPIs like recycling rates.The roadmap’s best practices can apply to any device-making fab, as it relies on Industry 4.0/5.0 technologies rather than compromising process flows as in alternative fab sustainability models. ROI benefits identified include cost-savings on process materials, utilities, regulatory, and labor plus higher yield and shorter cycle time after implementation. In summary, the use cases within the customizable model are quantified based on normalized impact to the current baseline level so that device-makers can benchmark themselves and prioritize investment in the most effective technologies to meet their sustainability goals.For future updates on the SEMI Smart Manufacturing Initiative, including the upcoming SSM product release, please visit the Initiative's website. To learn more about the roadmap, download prior white papers: White Paper 1: Accelerating Sustainability with SEMI Smart Manufacturing White Paper 2: Accelerating Sustainability with SEMI Smart Manufacturing: AI Roadmap for Device Makers Part II References:[1] M. da Silva and K. Somani, "Digital Twins in Semiconductor Manufacturing," SEMI, Milpitas, CA, 2024.[2] B. Coppa, A. Srivastava and M. da Silva, "Accelerating Sustainability with Smart Manufacturing: Roadmap for Device Makers," SEMI white paper (Available here) - November 2024.[3] B. Coppa, A. Srivastava, “SEMI Smart Sustainability Roadmap Part II: AI Blueprint for Device Makers,” at SEMICON West, October 2025.[4] B. Coppa A. Srivastava, “Accelerating Sustainability with Smart Manufacturing: AI Roadmap for Device Makers Part II” SEMI white paper (Available here) – May 2026 Brian J. Coppa, Ph.D., is Product Engineering Lead at ULVAC. Amit Srivastava is Staff Program Manager – Smart Manufacturing AI at Micron. Mark da Silva, Ph.D., is Senior Director, Manufacturing Coalitions at SEMI. Anshu Bahadur is Senior Program Manager, Technology Coalitions at SEMI.
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For years, cybersecurity in manufacturing was often treated as a mere compliance issue. Suppliers filled out questionnaires. A scan report was produced before shipment. A checklist was reviewed during qualification. A document proved that the equipment was "secure enough" at a given point in time. This model is no longer sufficient. As equipment becomes more software-driven, connected, and remotely maintained, cybersecurity responsibility is moving closer to the product itself and therefore closer to the OEM. Fabs still define their security expectations, but OEMs are increasingly expected to provide evidence that their equipment can remain secure throughout its lifecycle.Semiconductor manufacturing is entering a new phase of cybersecurity. The question is no longer simply, "Was this equipment compliant when it was delivered?" A stronger question is emerging: "Can this equipment continuously demonstrate that it is operating securely and reliably?" This shift matters because semiconductor equipment is no longer isolated machinery. It is software-intensive, networked, remotely maintained, data-producing, and deeply integrated into fab operations. Equipment controllers, factory interfaces, service laptops, recipes, logs, remote access tools, operating systems, middleware, and data acquisition services now comprise a significant digital presence surrounding the physical process. The risk is not theoretical. Industrial automation and control systems are now considered cybersecurity assets throughout their lifecycle rather than merely engineering systems. In the global semiconductor manufacturing industry, this shift is evident through the following SEMI standards:SEMI E169 provides guidance for equipment information system security. SEMI E187 defines cybersecurity requirements for fab equipment.SEMI E191 addresses cybersecurity status reporting for computing devices connected to the factory network.These semiconductor-specific standards align with the broader industrial cybersecurity trend. The ISA/IEC 62443 series addresses cybersecurity throughout the industrial automation lifecycle, including product development, integration, operation, maintenance, and supplier responsibility. The National Institute of Standards and Technology (NIST) has moved in the same direction with Cybersecurity Framework 2.0 by adding "govern" as a core function and making cybersecurity the responsibility of leadership, risk management, and the supply chain rather than just a technical activity.In Europe, this shift is also becoming regulatory. Under the Cyber Resilience Act, starting September 11, 2026, manufacturers will be required to actively report vulnerabilities and severe incidents affecting products with digital elements. They must provide an early warning within 24 hours and a full notification within 72 hours. This will encourage many industrial suppliers to strengthen their vulnerability management.A fab does not only need to know that an equipment was shipped with a supported operating system. It also needs to know if the system remains aligned with the approved configuration after installation, maintenance, remote support, patches, upgrades, troubleshooting, and years of production use.A fab needs more than a document saying that network security was considered. It needs practical evidence showing which ports are open, which services are active, which accounts exist, which software is running, and whether local protection mechanisms are still enabled. A fab does not only need supplier declarations. It needs operational proof.This is where the semiconductor industry faces a specific challenge. A fab cannot simply copy standard IT cybersecurity practices and apply them directly to production tools. The cost of disruption is too high. A patch that is harmless in an office system may affect equipment behavior, timing, qualification, or process stability. A security scan that is acceptable in IT may be intrusive in a production environment. Generic endpoint controls can create unacceptable side effects if they interfere with motion, recipes, automation, or equipment availability.Therefore, semiconductor cybersecurity must balance three constraints simultaneously:Protect the equipment and the factory network.Preserve deterministic production behavior.Generate evidence that can be trusted by fabs, suppliers, auditors, and increasingly, regulators.For this reason, the future of cybersecurity in semiconductor manufacturing will likely be built around five practical pillars.1. Secure by design, but validated in operationSecurity measures must be implemented from the outset of equipment architecture. The product baseline should include supported operating systems, hardened configurations, secure communication channels, access control, logging, and vulnerability handling. Figure 1: Equipment controllers expose trusted security context However, design is only the starting point. The equipment must also support validation after delivery. Fabs need a way to confirm that the deployed configuration still matches the secure baseline. This is especially important after field service, software updates, recipe changes, local troubleshooting, or remote maintenance. The industry is shifting from "trust me, it was secure at release" to "here is the evidence that it is still secure today."2. Cybersecurity evidence must become structured dataAll too often, cybersecurity evidence remains trapped in PDFs, spreadsheets, emails, and manual audit reports. This approach is not scalable. A modern factory needs structured, machine-readable cybersecurity information. This data does not need to be collected at the same frequency as process data, it should rather be collected at the right frequency for assurance, such as daily, weekly, after a restart or maintenance, or before a production release.This creates a strong opportunity for equipment manufacturers. The equipment controller can serve as a source of trusted security context. It can provide controlled, well-defined information about the current state of the equipment's software and configuration. This does not replace cybersecurity tools. Rather, it complements them with equipment-native context.This is important because the equipment itself knows things that external tools may not: which services are expected, which processes are part of the controller, which ports are required for automation, which accounts are intended for servicing, and which configuration belongs to the validated release.3. Communication security must move closer to the protocol layerMany industrial environments have relied on network segmentation, virtual private networks (VPNs), and perimeter controls. While these controls remain useful, they are insufficient for a Zero Trust approach.The next step is establishing stronger identities and trust between communicating systems. When equipment and factory systems exchange messages, they must know with whom they are communicating, and the communication channel must protect the confidentiality and integrity of the messages.This direction already exists in part of the semiconductor communication landscape. In EDA, also known as Interface A, SEMI E132 defines equipment client authentication and authorization, requiring clients to authenticate before further communication and enabling authorization controls for access to equipment functions and data.The same trust expectation is now emerging more visibly for SECS/GEM communication. A SEMI task force is working to secure HSMS communication, which is central to SECS/GEM-based host-equipment integration. The objective is to improve trust at the communication layer while preserving the proven behavior and interoperability that made HSMS successful in fabs.For semiconductor manufacturing, this must be done carefully. The industry cannot disrupt decades of host-equipment interoperability. The practical approach is to secure communication while maintaining existing automation behavior. This is a good example of the semiconductor cybersecurity challenge: modernizing the trust model without destabilizing the production model.4. Cybersecurity must be lifecycle-managedA semiconductor tool can remain in operation for many years. During that time, operating systems age, third-party components evolve, vulnerabilities are discovered, remote support practices change, and fab expectations become stricter. This means cybersecurity cannot be treated as a delivery milestone. It must be managed as a lifecycle capability, from design and release to installation, maintenance, upgrades, and end-of-support planning.For semiconductor OEMs, this creates a very practical challenge. They need clearer answers to questions that fabs will increasingly ask:Practical questionWhy it mattersWhat is the support status of each software component?To understand exposure to known vulnerabilities and end-of-support riskHow are vulnerabilities evaluated?To separate theoretical exposure from real equipment riskHow are patches qualified without creating regression risk?To protect cybersecurity without compromising process stability or tool availabilityHow is the customer informed?To support faster risk decisions and stronger supplier trustWhat is the fallback if a patch cannot be deployed?To define compensating measures and avoid unmanaged riskHow is the secure baseline restored after maintenance?To prevent configuration drift after service actionsHow is evidence retained?To support audits, incident response, and lifecycle traceability The answer is not simply more documentation. The answer is better evidence: structured, repeatable, and linked to the real equipment state. For semiconductor OEMs, the practical task is to convert cybersecurity requirements into evidence that fabs can verify during integration, operation, maintenance, and upgrades.Evidence categoryWhat the fab needs to knowWhy it mattersOS and software baselineSupported OS, installed components, patch statusReduces exposure to known vulnerabilitiesNetwork exposureOpen ports, active services, remote connectionsHelps detect unexpected attack surfacesAccess controlLocal accounts, roles, privilege modelLimits persistence and unauthorized accessEndpoint protectionFirewall, anti-malware, hardening statusConfirms local defenses remain activeLogs and monitoringSecurity events, configuration changes, authentication eventsSupports investigation and traceabilityMaintenance historyUpdates, remote sessions, service actionsShows what changed and whenVulnerability handlingKnown vulnerabilities, mitigation status, patch planSupports lifecycle accountability This lifecycle view is important because every change can modify the equipment security posture. A patch, a remote support session, a local service action, a new account, an opened port, or a firmware update can all move the tool away from its validated baseline. Figure 2: Cybersecurity becomes a lifecycle process This is also where upcoming regulations will change the supplier conversation. Vulnerability handling, reporting, and product security documentation will become part of business trust, not only technical trust. For semiconductor OEMs, the direction is clear: cybersecurity evidence must become part of the product lifecycle, not a separate compliance package prepared only when the customer asks for it.5. Compliance must be risk-based, not tool-prescriptiveOne of the important lessons from industrial cybersecurity is that standards and customer requirements are most effective when they specify the necessary capabilities and evidence rather than forcing every supplier to use the same tools or implementation methods. In the semiconductor industry, the SEMI Standardized Semiconductor Cyber Assessment (SSCA) is a useful example of this direction. It provides a semiconductor-specific assessment framework designed to evaluate cyber readiness and risk across the supply chain, from device manufacturers to OEMs and beyond. It also uses maturity-based questions to help assess the security posture of an organization, which supports a more risk-based view of cybersecurity capability rather than a simple pass/fail interpretation.This risk-based and maturity-based approach is also important at the equipment level. Semiconductor tools are not uniform products with identical architectures. A metrology tool, a sorter, an inspection system, an etcher, and an AMHS component may have different risk profiles, software stacks, connectivity models, and operational constraints. Even within one piece of equipment, cybersecurity responsibility is distributed across multiple layers: the main equipment controller, load ports, robots, sensors, embedded PCs, software libraries, remote access components, and third-party subsystems. The right question is not: "Did every OEM use the same scanner, report format, or internal process?" A better question is, "Can each OEM demonstrate that the equipment meets the required cybersecurity outcome, that the evidence is repeatable, and that the lifecycle process is controlled?"This question must also be addressed recursively across the supplier chain. A fab will ask the OEM for evidence. The OEM, in turn, must obtain and manage evidence from its subsystem suppliers. Those suppliers may need evidence from their own module, software, firmware, and component suppliers. In practice, cybersecurity assurance becomes a chain of trust that runs from the fab down to the lowest relevant technical layer. Figure 3: Cybersecurity assurance becomes a chain of trust The strategic direction is clear for semiconductor OEMs. Cybersecurity should be part of the equipment's value proposition. A secure equipment controller will execute more than just automation logic. It will also support secure communication, controlled access, structured logs, lifecycle traceability, vulnerability management, configuration evidence, and visibility into the security state.This is not just about reducing cyber risk. It is also about reducing integration friction with advanced fabs. It is about conducting audits more quickly. It is about limiting late-stage surprises. It is about giving customers confidence that they can operate, maintain, and upgrade the equipment without compromising factory security.The semiconductor industry is entering a phase in which cybersecurity will be judged less by static declarations and more by operational proof. That is a healthier model. Static compliance tells a fab what was once true. Operational proof shows what is true now. For semiconductor manufacturing, this distinction will become more crucial.About Dr. Fahad GolraAs Director of Product Innovation for Agileo Automation, Dr. Fahad Golra drives next-generation solutions in connectivity, data modeling, and communication architectures. Since joining the company in 2019, he has been a key force behind Agileo’s push toward Industry 4.0, championing interoperability, digital twins, and edge-to-cloud systems. With 15 years of experience spanning academia, research, and industry, Fahad brings deep technical insight and thought leadership to the semiconductor industry. An active contributor to SEMI, the Semiconductor Manufacturing Cybersecurity Consortium (SMCC) and the OPC Foundation, he is a frequent speaker at industry events and a published author advancing the dialogue around smart manufacturing and automation.
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As artificial intelligence (AI) workloads surge and hyperscale data centers expand, the semiconductor industry is confronting fundamental limits in electrical interconnects. Co-packaged optics (CPO) is emerging as a pivotal architectural shift, bringing optical connectivity closer to compute to deliver the bandwidth, latency, and energy efficiency required for next-generation systems. However, while the strategic value of integrated photonics is widely recognized, the transition from research to scalable manufacturing remains one of the industry’s most pressing challenges.At the heart of this transition are a range of process considerations that, while familiar, are fundamentally different for photonics than for traditional semiconductor manufacturing. In many cases, the underlying requirements mirror those of CMOS manufacturing—cleanliness, uniformity, and defect control—though often at a different scale and level of maturity. However, the introduction of heterogeneous materials, new device structures, and optical performance sensitivities adds layers of complexity that must be addressed to achieve consistent, high-yield production.The expanding role of wet processingWet processing plays a critical role in several key stages of photonic device fabrication, including cleaning, etching, and drying. These steps directly impact surface quality, defectivity, and, ultimately, optical performance.Critical considerations include:Etch uniformity, essential for maintaining consistent optical pathways and minimizing signal loss;Particle control, as even small contaminants can scatter light and degrade performance; and Drying processes, where residues, watermarking, or contact-related defects can impact yield and reliability.Drying, in particular, has emerged as a significant challenge. Techniques such as nitrogen blow-off or chemical vapor drying are being refined to address issues like residual marks or contamination. In some cases, additional process enhancements—such as sonic energy—are being explored to further improve particle removal and surface integrity.Increasingly, tighter control of process chemistries and concentrations is required to minimize residues and improve particle performance. As these requirements tighten, the industry is recognizing that wet processing is not just a supporting step, but a critical determinant of device performance.At the same time, photonics manufacturing introduces variability that is less common in high-volume CMOS environments. Differences in wafer size, material composition, and process flows demand a higher degree of flexibility. In many cases, both batch-style wet benches and single-wafer processing approaches are used, depending on the application. Equipment and processes must often be adapted—through changes in wafer handling, fluid delivery, or process parameters—to accommodate these variations. In some cases, hybrid approaches that combine immersion and spin-based processing are being adopted to support a broader range of process steps within a single workflow.Scaling for yield and manufacturabilityThroughput, while important, is not yet the primary constraint. The industry’s immediate focus is on achieving stable, repeatable processes that support high yield and consistent performance. Over time, as designs mature and volumes increase, throughput expectations will increase significantly, with industry targets moving toward several hundred wafers per hour.Another important consideration is how photonics capabilities are integrated into existing fabrication environments. Contrary to some expectations, this integration does not always require wholesale changes to fab infrastructure. In practice, integration challenges are often less significant than anticipated and are typically addressed through targeted engineering adjustments rather than fundamental infrastructure changes. This approach minimizes disruption while enabling manufacturers to extend their capabilities into new application domains.Yield remains a central concern throughout this transition. As with any emerging technology, variability in early-stage manufacturing can create cost and reliability challenges. Reprocessing is particularly undesirable in photonics, where complex material systems and tight performance requirements make defects difficult and expensive to correct. Achieving high yield, therefore, depends on precise control across all process steps, from chemical concentration management to particle mitigation and surface preparation.At the same time, the cost of ownership must be carefully managed. While photonics manufacturing may not yet demand the extreme throughput of advanced logic production, it must still be economically viable at scale. This creates a dual imperative: to optimize processes for yield and performance while maintaining the flexibility needed to adapt to evolving designs and standards.Sustainability and the path to adoptionSustainability is also becoming an increasingly important dimension of photonics manufacturing. Although optoelectronic technologies can deliver system-level energy efficiency benefits, their fabrication still relies on water, chemicals, and energy-intensive processes. As a result, the industry is beginning to apply lessons learned from CMOS manufacturing to improve environmental performance. This includes exploring alternative chemistries, particularly as regulatory pressures drive the reduction or elimination of substances such as per- and polyfluoroalkyl substances (PFAS), and aligning with established environmental, health, and safety frameworks.More broadly, the evolution of co-packaged optics highlights a familiar pattern in semiconductor innovation: the need to bridge the gap between laboratory breakthroughs and high-volume manufacturing. Standards are still maturing, design approaches continue to evolve, and early implementations may give way to new architectures. In this environment, flexibility and adaptability are critical—not only in device design, but across the manufacturing ecosystem.Demand signals, however, are unmistakable. AI-driven data center growth is accelerating the need for more efficient interconnect technologies, and photonics is widely expected to play a central role in meeting this demand. As more fabs invest in photonics capabilities, the focus will increasingly shift from feasibility to scalability—from demonstrating what is possible to delivering it reliably and cost-effectively.Wet processing, though often viewed as a supporting function, is deeply embedded in this transition. Its influence on cleanliness, uniformity, and defect control makes it a key enabler of photonic device performance and manufacturability. As the industry continues to refine processes and align standards, advances in wet processing will help define how quickly and effectively co-packaged optics moves into the mainstream.For SEMI members navigating this shift, the implications are clear. Success in photonics manufacturing will depend not only on innovation at the device level, but on the ability to translate that innovation into robust, scalable processes. In that effort, the fundamentals—precision, control, and adaptability—remain as important as ever.Dr. Ismail Kashkoush is Chief Technology Officer for JST, based in Meridian, Idaho. With more than 30 years of expertise in the semiconductor industry, he leads JST’s engineering, technology, and product lines teams to develop the next generation of sustainable surface preparation products and processes. Dr. Kashkoush earned his Ph.D. in engineering science from Clarkson University. Prior to joining JST, he served as CTO at Akrion Technologies Inc. He has a large patent portfolio and continues to contribute technical publications and seminars on wafer surface preparation technology for the IC, MEMS, flat panel display, and photovoltaics sectors.
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The SEMI Standards team hit the ground running in 2026, starting this year with an important milestone to our Flexible Hybrid Electronics (FHE) standardization efforts. As FHE technology continues to evolve into a scalable and manufacturable class of systems, we’re excited to share the upcoming release of SEMI 7242, Guide for Reliability of Flexible Hybrid Electronics. This is the first time a comprehensive framework for reliability assurance in FHE systems has been created, closing a critical gap within the industry landscape. Published as SEMI FH5, the standard is now available online via the SEMI Store or through a SEMIViews license.We’d also like to highlight a pending revision for SEMI E142, Specification for Substrate Mapping. While SEMI E142 is currently designed to work with other SEMI data exchange Standards, SEMI Draft Document 7381 proposes a subordinate standard to define maps to and from non-E142 wafer coordinate systems. Meanwhile, the Information Control Japan Technical Committee (TC) announced its new Maintenance Robot Communication (MRC) Task Force for standardizing communications for robotic maintenance systems to improve production efficiency and workloads in fabs. This quarter also included key developments from both SEMICON Korea and SEMICON China. At SEMICON Korea, members of the Semiconductor Manufacturing Cybersecurity Consortium (SMCC) discussed a unified, standards-based approach for strengthening cybersecurity amidst evolving digital threats. A month later, SEMICON China served as the backdrop for the EHS TC Chapter Formation Group Meeting, where attendees discussed critical safety, material usage, and energy efficiency standards. The North America (NA) Winter Meetings, held virtually in February 2026, also brought several TCs together to revise standards for MEMS, advanced packaging, EH S, Facilities, Gases Liquid Chemicals, factory automation, and more. For more than 50 years, the SEMI Standards International Program has worked to advance manufacturing processes, lower costs, and support key industry growth markets. To get involved in future developments, become a member of the SEMI Standards Program. Membership is free.With so much underway in Q1, we look forward to an incredible year ahead. Q1 2026 Highlights A New Standard for Flexible Hybrid Electronics As the first consensus-driven framework for reliability assurance in FHE systems, SEMI 7242, Guide for Reliability of Flexible Hybrid Electronics, was created to ease roadblocks for transitioning and commercializing FHEs. It aims to speed design cycles, improve comparability of test results, reduce the risk of integrating FHE into operations, and instill confidence for scaling FHEs from prototypes to high-volume production. Document 7242 was drafted by the FHE Reliability and Testing Task Force, with added participation from industry, academia, and government laboratories.The elevation of Document 7242 to a formal SEMI Standard reflects the field’s progression to a stage where consistent approaches to reliability are both feasible and necessary. As FHE adoption grows across medical, industrial, consumer, and defense applications, Document 7242 will support systems that offer dependable performance and sustained durability over time. Document 7242 also joins the recently published SEMI FH6 Standard on FHE Terminology.Revisions to SEMI E142SEMI E142, Specification for Substrate Mapping, defines data items required for reporting, storing, and transmitting map data for substrates. It was developed to work alongside other SEMI Standards to exchange data through a SECS/GEM interface. Identifying failure points requires a two-dimensional XY coordinate map generated for substrates. However, because some steps in the semiconductor manufacturing process may use their own XY coordinate systems, a revision is currently needed to define an infrastructure for mapping a non-E142 wafer XY coordinate system to and from the E142 Standard XY coordinate system.The Advanced Backend Factory Integration (ABFI) Task Force will ballot this potential subordinate standard from August 19 to September 18. It will be adjudicated during SEMICON West from October 13-15, 2026 in San Francisco, California.Introducing the Maintenance Robot Communication Task Force As the industry moves toward smart manufacturing, integrating robot-based maintenance solutions is becoming increasingly important for enhancing production efficiency, reducing workload, and ensuring consistent work quality in automated environments. The Maintenance Robot Communication TF was formed to address the critical need to standardize operational communications for robotic maintenance systems. A dedicated community page is now available on the Connect@SEMI platform for members to exchange ideas. This activity joins the recently established Mobile Maintenance Robot Safety Task Force which aims to develop new safety guidelines that are deemed necessary to fill the gaps between existing industry standards including SEMI Safety Guidelines with regard to safe operation of mobile maintenance robots.Standards Activities from Europe Spring MeetingThe Compound Semiconductor Materials Europe TC Chapter held its annual virtual Spring Meeting on April 14, 2026. The meeting drew robust participation from China, Japan, Europe, North America, and other regions. The TC Chapter successfully adjudicated document 7111, Revision of SEMI M81-0418, Guide for Defects Found in Monocrystalline Silicon Carbide Substrates. The major update provides significant guidance on defects in silicon carbide substrates. This document has been forwarded to SEMI Publications for final processing. The Europe TC Chapter will reconvene November 10–13, 2026, during SEMICON Europa in Munich, Germany.Underscoring the Need for Cybersecurity Standards at SEMICON Korea SEMICON Korea featured more than 200 speakers who shared insights and presented solutions that are shaping the modern AI era. From February 11-13 in Seoul, the conference also served as a meeting point for the next generation of SEMI Standards. Most notably, leaders from the Semiconductor Manufacturing Cybersecurity Consortium (SMCC) highlighted the strategies and operational frameworks needed to modernize cybersecurity protocols. SEMICON Korea Highlights:Applied Materials’ Suk Won Kang discussed SMCC Working Group (WG) 9 – a new group for addressing cybersecurity challenges unique to South Korea’s semiconductor ecosystem. WG9 was formed to better understand Korean cybersecurity risks, align with global standards, and operationalize compliance with existing SEMI frameworks. Alan Weber from PDF Solutions presented on cybersecurity as it relates to industry standards. He offered an overview of today’s technical challenges, highlighting how independently developed and secure data exchange frameworks can complement existing standard interface capabilities. SEMICON China: EHS TC Chapter Formation Group Meeting Following SEMICON Korea, SEMICON China convened thousands of attendees from March 25-27 to discuss the most important technology trends driving innovation. Alongside the event, the EHS TC Chapter Formation Group Meeting took place on March 25 to review global EH S standards overview, SEMI Regulations for forming China TC Chapter, and issues including Safety Management System, Product Safety System, and Semiconductor RobotsProgress from SEMI Standards 2026 North America Winter Meetings The Standards team hosted its SEMI Standards NA Winter Meetings virtually from February 9-12. With a packed agenda, the meetings convened several TCs, including MEMS/NEMS, Facilities Gases, Liquid Chemicals, Information Controls, and more. Over a dozen new documents were submitted for approval.The NA 3D Packaging Integration Inspection Metrology TF proposed a new standard in Document 7331, Guide for Peel Testing of RDLs and Other Traces Used Within Advanced Packages and Structures. This document was approved by the 3DP I NA TC Chapter during the NA Winter Meetings in February and recently passed procedural review by the ISC Audit Review Subcommittee. Current peel testing test methods are designed for and limited to 10 mm and wider traces, which are mainly used for PCBs.iNEMI has been investigating potential re-distribution layers (RDLs) adhesion measurement methods for RDL trace widths 20 microns and smaller to determine the actual adhesion properties associated with these smaller structures. The adhesion properties of the smaller structures are important for HDI, WLP and PLP designs, and modeling. This standard provides guidance for peel testing of small trace structures used in WLPs, PLPs, and other advanced packages based on knowledge gained during the iNEMI RDL Adhesion project. Available soon at the SEMI store, this Standard can be used to determine the adhesion properties of the structure (trace bond to substrate).Other key developments from the NA Winter Meetings include:Document 7370 – Reapproval of SEMI MS13-0221, Guide for Use of Test Patterns for Characterizing a Deep Reactive Ion Etching (DRIE) Process, introduced by the MEMS/NEMS TC. Document 7436 - Reapproval of SEMI E180-1220, Test Method for Measuring Surface Metal Contamination Through ICP-MS of Critical Chamber Components Used in Semiconductor Wafer Processing, introduced by the Metrics TC. Document 7428 - Revision to add a new subordinate Standard, Specification for Secure High-Speed SECS Message Service, to SEMI E37-0222 Specification for High-Speed SECS Message Services (HSMS) Generic Services. This was introduced by the Information Control TC. Document 7371A – Revision of SEMI S1-0824, Safety Guideline for Equipment Safety Labels. The revision was intended to add numerous safety symbols including finger pinch, entrapment, shear hazard, inhalation hazard and many others.Document R67346C - Revision to SEMI E95-1101, Specification for Human Interface for Semiconductor Manufacturing Equipment. This was introduced by the Information Control TC.New and Revised Standards Released in Q1January 2026February 2026 March 2026 Get InvolvedSEMI Standards development activities take place throughout the year in all major manufacturing regions. To participate, join the SEMI International Standards Program.SEMI Standards are available through individual download purchases or online via SEMIViews. Watch this video to learn more about how SEMIViews offers a cost-effective and streamlined way to access 1,110+ SEMI Standards. Sign up for a 30-day SEMIViews trial.For more information, please visit the Standards website and events page. For any questions regarding SEMI Standards activities, please contact your local SEMI Standards staff.Paul Trio is Director of Standards at SEMI.
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How imec turned a climate literacy workshop into a blueprint for sustainability engagement across the semiconductor industry. The StoryWouter de Groot had spent 9 years at imec in Business Development, a role that kept him airborne across Europe and beyond. Wouter was good at his job, and the travel was part of it. But on a flight somewhere over the Atlantic, his calculus changed.Wouter couldn’t ignore the carbon footprint of his own professional life. He realized, “I couldn’t reduce my travel significantly […] but I could raise awareness.” A seed was planted.In France, Wouter discovered the “Climate Fresk” (La Fresque du Climat), a collaborative, card-based workshop built on science from the Intergovernmental Panel on Climate Change (IPCC). He got trained as a facilitator and returned to imec’s Leuven headquarters with a quiet mission. The first session, held with a small group of HR colleagues in late 2023, was intended as a test. Yet even for that test, what happened surprised everyone in the room:"I was blown away by the depth of the discussions. It wasn't just about facts. It was about how people felt, and what they wanted to do next." —Wim Fyen, Director of Sustainability, imec .custom-quote-block { border-left: 4px solid #d9d9d9; padding-left: 26px; margin: 24px 0; } .custom-quote-block blockquote { margin: 0; padding: 0; border: none; } .custom-quote-block p { margin: 0; font-size: 18px; line-height: 1.6; font-style: italic; color: #000; } This is the story of those people, the initial hesitations they faced, and the tipping points that firmly established imec’s Climate Fresk movement. The People: 6 Unique Entry PointsBy the time imec presented at the SEMI Climate Equity and Social Impact (CESI) workgroup in June 2025, more than 400 employees had participated. What made it work wasn’t a mandate or a budget line. It was 6 people who found their way to the Climate Fresk from completely different starting points. Without any coordinated plan, they built something unlike anything imec had ever seen. From the 6:Wouter de Groot acted before there was infrastructure in place. Certified with sponsorship from imec, he ran the first session himself and passed it on to anyone willing.Ann-Sophie Vanwinsen, a Procurement Specialist, got certified as a Climate Fresk facilitator outside imec, well before the program was ever offered internally. Vanwinsen has facilitated more sessions than anyone else at the company. She confessed, “I’ve shamelessly taken over using my job for sustainability purposes.”Matthias Nauwelaers from imec.academy felt very emotional during his first session. A graph showing the climate burden falling on future generations hit him somewhere data alone never had. He too signed up as a facilitator and now weaves the Fresk into employee onboarding and e-learning sessions on sustainability.Wouter Machiels, Head of Procurement, came in skeptical. Sustainability, in his experience, had mostly been a compliance checkbox. While Wouter wanted to do more, he felt he lacked the specific tools to act on instincts he already had. The Fresk gave Wouter a framework he hadn’t found elsewhere: “it explained a number of mechanisms I had in the back of my head but couldn’t vocalize.” He left a facilitator himself and has since built a team mapping imec’s entire Scope 3 emissions.Lizzie Boakes, one of imec’s Life Cycle Assessment researchers and a ‘SEMI Europe 20 Under 30’ honoree, described what shifted for her: “I’m usually trying to hit numerical targets that don’t seem very real or human. The Fresk takes the scientific aspects out and highlights the social components. It puts people in a position where they have to be expressive with individuals they’re not necessarily close with.” Boakes became a facilitator, too.Filip Merckx, CFO, felt anger, then urgency, then a sense of responsibility he couldn’t shake. He introduced the Fresk to his entire management team on an offsite and became co-chair of a newly established sustainability board.“Easy in hindsight to say everything was planned, but it wasn’t,” said Wim Fyen, imec’s Director of Sustainability, who served as the connective tissue throughout. “We just went with the flow.”The Hesitation: Bridging Bottom Up and Top Down Senior management valued sustainability, but a 4-hour workshop was a significant ask in a calendar already full. The early response was practical rather than resistant: how do we justify the time? It’s a familiar dynamic. Research on bottom-up sustainability initiatives notes that organizations relying primarily on top-down approaches can miss innovative insights that emerge from employees at all organizational levels (Erzurumlu et al., 2025). Imec found a way around it.Fyen looked for the most efficient way to get it rolled out in imec. He first got the Climate Fresk listed in imec’s learning management system (LMS), a small move that gave it organizational legitimacy without requiring anyone to mandate it. Once the training appeared in the company’s catalog, Fyen leveraged that legitimacy to persuade managers to participate. The budget problem landed differently. Getting the first cohort of facilitators trained required money nobody had earmarked. Machiels solved it by encouraging like-minded suppliers to make sustainable initiative contributions. As a result, the first group got financed without a single line item in the sustainability budget.Both moves mattered. The same research argues that meaningful change requires not only employee initiative but also adequate executive support and corporate financial resources to sustain it (Erzurumlu et al., 2025). The LMS listing supplied the institutional legitimacy. The supplier co-investment supplied the resources. Together they pulled the Fresk from ‘one person’s project’ into something the organization could carry."You train 1 person as facilitator for less than 1,000 euros, and then they can run unlimited sessions inside the company at just a few euros per participant for license fees. Compared to external coaches, it's 30 times more cost-efficient." —Wim FyenThat economics produced a virtuous cycle. Low cost per session lowered the bar for departments to host one. Each session generated interest, which recruited more facilitators, which enabled more sessions. Similar grassroots-to-organizational arcs have played out elsewhere in the industry, where employee-led sustainability initiatives at ASML gained traction once they were paired with executive sponsorship (https://www.semi.org/en/blogs/one-tree-per-employee-how-a-grassroots-initiative-in-asml-san-diego-is-assembling-restorative-future-with-real-results). At imec, the initial constraint of having no dedicated training budget became a feature: it forced a model lean enough to scale. Participants in imec Climate Fresk Workshop for ManagersThe Tipping Points: When Organic Became StructuralWhat came next for imec was a mass Fresk; 50 managers, 14 internal facilitators, 1 afternoon. During the workshop, each participant wrote a personal commitment on seed paper, and those seeds were planted on the imec campus. "The flowers represented their ideas blooming," Fyen said. For a scientific culture, having something tangible to point to mattered. Not long after this, in late 2024, the team of Climate Fresk facilitators received the Sustainable.minds award at imec's annual corporate personnel event, recognized for sparking vital conversations about sustainability and inspiring action for the planet. For a community of facilitators that had grown almost entirely through word of mouth, this formal recognition validated what they had already built and gave their work significant internal visibility.In 2025, entire departments were booking on-demand sessions. About 25% of all participants expressed interest in becoming facilitators themselves. But why? According to a group of French environmental psychologists, emotional engagement is one of the primary pathways through which collaborative climate workshops produce real attitudinal change and pro-environmental intent (Hognon et al., 2026). And the good feeling that follows, which some researchers call the "warm glow," creates a self-reinforcing cycle toward deeper engagement (Schneider et al., 2021)."Convinced that without the information of the Climate Fresk, and without my team having lived through it themselves, we would not be where we are today in value chain mapping and the visibility we have on our Scope 3." —Wouter Machiels, Head of Procurement, imecScaling beyond the borders to impact the entire value chain Fueled by the recognition given by the Sustainable.minds awards, the team began offering Climate Fresk sessions to imec’s partners at the biannual Partner Technical Week (PTW) international conference and the workshop started crossing imec’s borders for the first time. This brought it to the attention of SEMI members. At a CESI workgroup meeting in 2025, participants from Tokyo Electron, Axcelis, Advantest, Applied Materials and Veeco among others listened to imec’s story and asked how to bring it to all of SEMI’s membership. Wojtek Osowiecki at Lam Research, founder of the Lam Employee Sustainability Community, was one of the first outside participants at an imec Fresk. He put it simply: “It’s not just about awareness. It’s about empowerment. The Fresk gives people a voice and a framework for action.” By the Fall of 2025, the first Fresk had been held at SEMICON West, and conversations with SEMI member companies were underway. What had been an internal experiment was now something other organizations wanted to learn from.A Movement of Belonging with Concrete Outcomes Founded in 1984 as the 'chip lab of the world,' imec has always been committed to sustainable development for generations to come by teaming up with the entire microchip value chainIts biggest leverage takes place through its Sustainable Semiconductor Technologies and Systems (SSTS) program in which imec works closely with partners from across the industry to assess and reduce the environmental impact of chip manufacturing, including foundries, integrated device manufacturers, equipment suppliers, and materials companies.This program runs along two connected tracks: assessment, whereby the environmental footprint of current and next-generation integrated circuit technologies are quantified and improvement where the insights of the first track are used to develop and validate practical solutions (e.g. to reduce process-related emissions, including work on low-impact gases, per- and polyfluoroalkyl substances (PFAS) alternatives, and novel manufacturing processes).The success with the Climate Fresk workshop has also begun to feed the broader SSTS program. Tools like the Environmental Score, originally developed for chip manufacturing assessment, are now being integrated into other design processes across the organization. The Fresk is now one of the vehicles imec uses to train and inspire the people who will carry that integration into their day-to-day work; the workshop builds the awareness, and SSTS gives that awareness somewhere to go.And there are several noteworthy concrete outcomes across imec:An ESG board now exists at the executive level, where leaders set corporate sustainability goals and assign the resources to pursue them. That board did not exist prior to the Climate Fresk. It was an indirect consequence of the awareness created within the finance team after Merckx introduced the workshop to his management. Decisions about sustainability that had previously lived in scattered conversations now have an institutional home.Onboarding has changed too. Nauwelaers, from imec.academy, has woven the Fresk into how new employees encounter imec. Sustainability is no longer a topic that gets introduced after someone is hired and oriented; it is part of the introduction itself. New colleagues meet the company’s climate posture in their first weeks rather than their first year.And in procurement, Machiels has built a sustainable procurement team of 3 FTEs and a PhD student, supported by a supplier co-investment model. The team operates against a multi-year sustainability plan and has produced the most detailed picture of imec’s Scope 3 emissions the company has ever had. The procurement function, often the last to be touched by sustainability work, became one of the first at imec to be reshaped by it.Fyen is honest about the distance still to travel. At 600+ participants in a company of 6,500 (roughly half non-payroll), imec has reached roughly 20% of its own workforce. That means in principle there are still thousands to reach. But Climate Fresk facilitators are now embedded in every corner of the organization, people who came to a workshop for their own reasons and left with a mission they didn’t expect. And more importantly, social science learns us that once a critical ‘tipping point’ is reached, adoption can grow very rapidly (Centola et. al., 2018). Machiels observed that the Fresk quietly became one of the few things that gave colleagues from completely different parts of imec a genuine sense of belonging to something. Climate Fresk has allowed them to understand the science, hear the human stories, and start connecting the dots. In a world of hybrid schedules and activity-based offices, for the people inside imec who went through the workshop together, that shared experience has become something else too.From a quiet decision on a plane, imec built a movement that now extends well beyond its own walls. Those seeds are available to any company where even one person is willing to start.This case study was written by Nat Mengist and Marley Hauser. It was produced by SEMI in partnership with imec as part of the SEMI Climate Equity and Social Impact (CESI) workgroup, led by staff member Justin Harris ([email protected]). For more information, visit semi.org/sustainability or connect through the SEMI CESI workgroup. SEMI SUSTAINABILITY CASE STUDY ADDENDUMA Blueprint for Building Your Own Climate Fresk MovementWhat imec built was not a program. It was a set of conditions. The following 5 steps are drawn from their experience; a starting backbone that your organization can adapt, with imec and the CESI workgroup as a resource to build it out further.1. Find the person who won't wait for permission.Every successful rollout in imec's story starts with someone who acts independently of pre-existing infrastructure. That person is probably already in your organization. Find them, fund their facilitator training, and let them shine. Research conducted on Wojtek Osowiecki’s Lam Employee Sustainability Community shows that this kind of bottom-up entrepreneurial ownership produces the most durable organizational commitment (Erzurumlu et al., 2025).2. Give it a home in the official infrastructure.Getting the Climate Fresk listed in imec's learning management system moved it from "one person's project" to "an official training." That's a small change with a large impact. Connect your internal champion with key departments like HR or Learning Development. Sustainability initiatives that live only inside the sustainability team have a ceiling. The ones that spread into other departments like HR, Procurement, and Operations don't.3. Protect the emotional architecture of the workshop.The instinct is to shorten the workshop to fit busy schedules. Imec did the opposite, extending to 4 hours and adding a plenary on personal and corporate carbon footprints. The "Embrace Your Emotions" phase isn't optional. It's the mechanism through which information becomes motivation. This is the worrying and urgency feeling Filip Merckx described. Some research found this “negative affect” to be the single strongest predictor of willingness to engage in climate action (Brosch, 2021). Cut that phase and you save an hour, but you’ll also miss the point.4. Build for the skeptical majority, not the converted few.The Climate Fresk also works well with technical audiences because it's built on IPCC science and run by a neutral peer rather than an external consultant. When a colleague walks you through the system map, the psychological distance that usually makes climate change feel abstract suddenly collapses. By developing teams of internal facilitators across departments, levels, and geographies, you will begin to witness the “gradual accumulation” of passionate sustainability culture (Russi et al., 2024).5. Extend your horizon beyond 12 months.The procurement team Wouter Machiels built — 4 FTEs, a PhD student, a supplier co-investment model — didn't exist when the Fresk was first introduced. "Facts are the foundation, but stories are the vehicle," Wouter claimed. "You can broadcast facts all you want. If you're not having an impact on the people listening to you, then you're casting salt." Don't expect ROI within one budget cycle. The outcomes that matter most take years to show up. But they do show up. Research FoundationThe behavioral science behind the Climate Fresk is not incidental to its design: it is the design. The following sources informed both the blueprint above and the case study narrative.Brosch, T. (2021). Affect and emotions as drivers of climate change perception and action: A review. Current Opinion in Behavioral Sciences, Human Response to Climate Change: From Neurons to Collective Action, 42, 15–21. https://doi.org/10.1016/j.cobeha.2021.02.001Centola, D., Becker, J., Brackbill, D., Baronchelli, A., (2018). Experimental evidence for tipping points in social convention. Science 360,1116-1119.https://www.science.org/doi/abs/10.1126/science.aas8827 Erzurumlu, S. S., Osowiecki, W. T., Seidel, V. P. (2025). How an Environmental Sustainability Community Fostered Employee-Driven Innovation at Lam Research. Research-Technology Management, 68(4), 21–29. https://doi.org/10.1080/08956308.2025.2497220Hognon, L., Caille, P., Bernard, P., Chevance, G., Teran-Escobar, C. (2025). Assessing the impact of The Climate Fresk workshop on climate-related attitudes and behavioral intentions in the workplace: Study protocol for a randomized controlled trial (2qvgd_v1). PsyArXiv. https://doi.org/10.31234/osf.io/2qvgd_v1Hognon, L., Teran-Escobar, C., Bernard, P., Chevance, G., Caille, P. (2026). A call for robust evaluations of the impacts of serious games for climate change mitigation: The Climate Fresk as a global case study. Journal of Environmental Psychology, 110, 102942. https://doi.org/10.1016/j.jenvp.2026.102942Mosquera, J., Jylhä, K. M. (2022). How to Feel About Climate Change? An Analysis of the Normativity of Climate Emotions. International Journal of Philosophical Studies, 30(3), 357–380. https://doi.org/10.1080/09672559.2022.2125150Russi, L., Renouard, C., Wallenhorst, N. (2024). Beyond Rupture, Interstice and Reform: Searching for Nuance in the Portrayal of Engagement for Social and Ecological Transition. Journal of Business Ethics, 193(3), 471–479. https://doi.org/10.1007/s10551-023-05568-wSchneider, C. R., Zaval, L., Markowitz, E. M. (2021). Positive emotions and climate change. Current Opinion in Behavioral Sciences, Human Response to Climate Change: From Neurons to Collective Action, 42, 114–120. https://doi.org/10.1016/j.cobeha.2021.04.009
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The SEMI Energy Collaborative (EC) is proud to have earned a 2026 Renewable Energy Markets (REM™) Asia Award, one of the region’s most respected honours for organisations driving meaningful clean energy adoption. We received the Outstanding Initiative recognition during the REM Asia 2026 conference on April 21 in Singapore, where we also presented on South Korea’s evolving renewable energy market and policy landscape. This recognition reflects the collective effort of the entire SEMI EC community, member companies, and partners who have supported our mission to achieve 100% low-carbon electricity by 2040. The Story Behind the AwardThe SEMI EC was founded on a straightforward premise: no single company can solve the energy challenges of our industry alone. Decarbonising the semiconductor value chain, one of the most energy-intensive sectors in the world, requires collective action, aligned policy, and large enough demand signals to prompt market response. Since its launch, the SEMI EC has brought together a growing community of semiconductor manufacturers, suppliers, customers, and sustainability leaders to promote renewable energy procurement, policy reform, and clean energy access. Our work has spanned four key fronts:Developing concrete policy recommendations for affordable, low-carbon energy procurement by hosting regular roundtables with government and industry leaders across South Korea, Japan, Taiwan, Singapore, and Malaysia.Building a clear roadmap that gives industry and government a shared understanding of our plan for achieving a low-carbon electricity supply by 2040. Advancing aggregated and group-buy procurement models that make renewable energy economically accessible, and deploying utility green tariffs to deliver more cost-effective and diversified procurement options.Providing the semiconductor supply chain with practical guidance on procurement vehicles, including power purchase agreements, virtual power purchase agreements, and energy attribute certificates, to accelerate informed adoption.One of our biggest milestones to date was SEMI’s November 2025 Memorandum of Understanding (MoU) with the Gyeonggi Provincial Government in South Korea to expand the semiconductor industry’s access to renewable energy. This MoU was created in partnership with Samsung, SK hynix, and the Korea Semiconductor Industry Association (KSIA). As a critical hub for the semiconductor value chain, expanding visible renewable energy supply in Gyeonggi Province will directly accelerate industry decarbonisation.Looking AheadThe SEMI EC is also working closely with the Semiconductor Climate Consortium (SCC) to help reach its Scope 2 goal of 100% low-carbon electricity for Asia-Pacific by 2040. To achieve this, we’re engaging with regulators and governments across Asia to shape policy and expand low-carbon energy supplies. Meanwhile, the SCC Scope 2 Working Group Renewable Energy Initiative is equipping supply chain companies with knowledge, tools, and renewable energy procurement pathways to help them act on their decarbonisation commitments. Asia stands at a critical inflection point in the global energy transition. Electricity demand is rising sharply, decarbonisation timelines are compressing, and the semiconductor industry’s role as a major energy consumer and technology enabler has never been more consequential.These considerations motivate us to go further. The pathway to scalable and affordable renewable energy requires sustained coordination between government and industry, but policy frameworks must catch up with industry needs. In addition, procurement costs remain a barrier for many in the microelectronics supply chain. To turn industry influence into policy traction, SEMI EC is helping to bridge these gaps. Thank YouOn behalf of the SEMI EC, we dedicate this award to every member company, partner, and government that has contributed to this journey. When industry comes together with a shared purpose, it can be a powerful force for a cleaner and more sustainable future. We’re grateful to the REM™ Asia community for recognising what this industry can accomplish when we work as one. We look forward to making continued progress with all of you.To learn more, download SEMI’s latest sustainability reports or visit the SEMI Energy Collaborative website.SoYoung Jang is Senior Manager, Energy Collaborative Consortium at SEMI.
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This blog series explores how collaboration between industry and academia can empower the next generation of semiconductor innovators. Through insights from leaders, educators, and students, we’ll showcase effective strategies for bridging the talent gap, fostering innovation, and creating meaningful career pathways in the semiconductor industry.As innovation accelerates and new challenges emerge, the industry’s greatest breakthroughs will come from bold, curious students, young professionals, and lifelong learners ready to build what comes next. SEMI spoke with Professor Antonio Costa of the University of Catania about attracting the next generation to STEM, the emerging skills required in the semiconductor industry, and examples of impactful collaboration with local industry, along with many other insights.Costa shared his perspectives following his participation in the SEMI on Campus program, held on April 16, 2026, in Catania, Italy. SEMI: What emerging skills do you believe will be most essential for the next generation of semiconductor innovators, and how can industry and academia work together to nurture them?Costa: I firmly believe in the role of interdisciplinary skills. The next generation of semiconductor innovators will need a blend of deep technical expertise, cross-disciplinary thinking, and adaptability to rapidly evolving technologies specifically based on artificial intelligence. The future semiconductor innovator isn’t just a circuit designer. They’re a systems thinker, data scientist, and materials engineer rolled into one. The most successful ecosystems will be those where academia teaches fundamentals, and industry provides real-world constraints, tools, and scale. So, university and industry should work together to share their knowledge and technological infrastructures with the aim of supporting the next generation of semiconductor innovators. SEMI: In your work with young engineers and researchers, what approaches have you found most successful in nurturing creativity and sustaining curiosity in such a technically complex field? How do you think we can attract the next generation to enter the STEM studies?Costa: Curiosity and creativity are two major features for researchers and engineers in general. Over the years of teaching and coordinating research activity, I have been able to observe that students are increasingly drawn to challenges coming from the industrial world. In a way, one could say that complexity often stimulates curiosity, and when this happens, students are able to deliver their best performance in terms of creativity and quality of results. In my courses, students have always been required to tackle an industry-inspired project work to be eligible to pass the exam. Every year, I invite industry representatives from local manufacturing companies to present real case studies to the classroom, describing their key elements, constraints, and objectives. Students are then asked to solve the industrial case study by applying the problem-solving techniques learned during the course. Based on my experience, I believe that a greater intensity in the relationship between the industrial and academic worlds can further stimulate students' curiosity and the interest of new generations.SEMI: What do you believe are the most significant barriers for students entering the semiconductor industry today, and how can academia help bridge these gaps?Costa: As usual, the main barriers for students concern the gap between the theoretical study mindset developed during university courses and the demands of the industrial world in terms of teamwork skills, problem-solving abilities, and soft skills. Universities and industry should find greater opportunities for collaboration, for example by establishing shared laboratory activities or seminars during which managers from semiconductor companies, and beyond, illustrate the essential aspects of working life and the primary needs of the semiconductor industry. At the same time, it would be advisable to emphasize the employment and career opportunities that the semiconductor industry is currently able to offer. Hackathons, that have a competitive orientation, could also represent a valid stimulus that companies and universities could pursue jointly and on a regular basis.SEMI: How can universities and industry partners collaborate more effectively to create learning experiences that truly unlock students’ potential and prepare them for the sector’s evolving demands? Professor Antonia Costa, University of Catania and Daniele Pagano, STMicroelectronicsCosta: Shared laboratories, curricular and extracurricular internships scheduled on a continuous basis, and periodic seminars held by company representatives with diverse areas of expertise can make a positive contribution to rapidly and robustly unlocking the learning potential of today's students and tomorrow's new hires. In December 2021, the University of Catania and STMicroelectronics signed a framework agreement to strengthen collaboration in the field of power electronics, with a focus on advanced research and training. The agreement aims to support technological innovation and the development of professional skills in the semiconductor sector, including:Research and development: the launch of projects focusing on increasing power density, efficiency, and reliability of power modules. Training and talent: funds for students’ awards, mentorship programs, internships, thesis projects.Innovation: support for technological growth and the development of professional expertise in power electronics. Regional ties: consolidation of Catania's role as a hub for semiconductor research, with strong synergy between the university and the local ST production site. Curricular internships linked to Master’s degree theses, supervised by faculty members across disciplines, primarily within Engineering, Computer Science, Physics, and Chemistry programs.SEMI: Can you share other examples of collaborations? Costa: Over the past decade, the University of Catania has been an active partner in multiple European consortia, supporting the development of research projects funded through highly competitive national and European programs. Currently, the University of Catania is engaged in collaborative research with STMicroelectronics through two Horizon Europe projects.In the first project, HiCONNECTS, the Department of Engineering is developing a digital twin architecture aimed at optimizing wafer lot dispatching at STMicroelectronics’ manufacturing facility in Catania.The second project, GENESIS, brings together the Department of Engineering and the Department of Chemical Sciences to pursue an ambitious sustainability objective: the development of innovative methods to identify and reduce per- and polyfluoroalkyl substances (PFAS) generated by semiconductor manufacturing processes, thereby mitigating environmental impact."The role of universities is to help students recognize their potential and guide them toward fields where their abilities can truly flourish. Initiatives like SEMI on Campus are invaluable, as they inspire students through direct engagement with professionals, helping bridge the gap between theory and industrial practice." -- Professor Antonio Costa, University of Catania .custom-quote-block { border-left: 4px solid #d9d9d9; padding-left: 26px; margin: 24px 0; } .custom-quote-block blockquote { margin: 0; padding: 0; border: none; } .custom-quote-block p { margin: 0; font-size: 18px; line-height: 1.6; font-style: italic; color: #000; } SEMI: Looking ahead, what role do you see educators playing in shaping the future of semiconductor innovators? Costa: The role of educators, both in schools and, above all, in universities, is to help students recognize their own potential and develop the maturity needed to identify and pursue those fields of knowledge that best highlight their abilities.The SEMI on Campus initiative was immediately embraced by many universities and by myself, as it offers students from diverse academic backgrounds the opportunity to understand the key skills sought by players in the semiconductor industry, while also highlighting the employment and career paths available in this field.The opportunity to hear directly from prominent speakers who work daily in semiconductor design and manufacturing represents a powerful way to stimulate students’ curiosity and potential, while helping to bridge the gap between the theoretical knowledge acquired in university classrooms and the practical, results‑oriented approach required in an industrial environment.The benefits for students are broad and significant, as they can assess their own aptitudes and ambitions against the real demands of semiconductor companies, drawing inspiration and insight from firsthand accounts shared by industry professionals.Antonio Costa is a full professor at the University of Catania (DICAR Department). He teaches Production Planning and Control in the Master’s degree in Engineering Management, and Advanced Technologies for Manufacturing Processes in the Master’s degree in Mechanical Engineering.His research activities are mainly focused on production scheduling, supply chain dynamics, manufacturing process optimization and Statistical Process Control (SPC). He is area editor for Computers Industrial Engineering, member of the Italian Association of Manufacturing Technologies (AITeM) and leads several research collaborations with STMicroelectronics.Interested in bringing SEMI On Campus to your institution or welcoming an industry expert as a guest speaker?Reach out to [email protected]. Let’s work together to inspire the next generation of semiconductor leaders!Related Initiatives:SEMI 20 Under 30: The SEMI 20 Under 30 Awards recognize exceptional young leaders in the semiconductor industry who are making significant contributions and driving innovation. Nominations are open!ChipQuest: The ChipQuest Challenge promotes the microelectronics industry to students to build future talent. University and high school students can participate and win amazing prizes! Serena Brischetto is Director Marketing and Digital Engagement at SEMI Europe.
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The SEMI Smart Manufacturing Initiative collaboratively crafted this whitepaper with industry members to offer insights from a recent workshop, presenting a comprehensive view of Digital Twin technology in semiconductor manufacturing for achieving AI-driven autonomous factories, covering industry definitions, taxonomy descriptions, and challenges in development and deployment.

Smart Manufacturing White Paper English