TEMPE, Ariz. and AUSTIN, Texas—March 3, 2022—Moov, a data-fueled marketplace for used semiconductor manufacturing equipment, today announced its “Money Back Guarantee” (‘MBG’) program. It is the industry’s first no-questions-asked, money-back-guarantee program that covers 91% of all listings on Moov’s platform, which currently lists roughly $1.5B of available assets and growing.

Moov’s guarantee program provides peace of mind during an especially turbulent time within the industry. Equipment shortages, particularly for older nodes, and wait times exceeding 16 months for new equipment mean more buyers than ever are looking for secondary-market options upon which they can rely.

“In an industry plagued with bad actors, Moov is leading the way by effectively removing all risk for second-hand transactions — a decision that will likely expedite the growth of companies' used-equipment budgets within the broader $100 billion-a-year global spend on chip manufacturing equipment,” said Boyd Grubbs, CEO of Bridge Tronic Global, a California-headquartered provider of manufacturing equipment in the secondary market.

Purchasers — be they end-users, equipment manufacturers or brokers — of Moov equipment who are unsatisfied after receiving it for any reason will be refunded by the company. Moov will return the equipment to its inventory.

Moov is the first company in the sector to offer this type of guarantee, further solidifying its position as market leader in the pre-owned semiconductor manufacturing equipment industry. The new program augments Moov’s existing added services, insurance, tracking and supplier verification.

“Risk is the No. 1 factor in purchasing equipment on the secondary market,” said Raymond Mahon, Moov’s director of customer success and head of the company’s Austin office. “Anyone who has been in this industry for even as little as a year has experienced purchasing six-figure equipment where key parts were missing, misrepresented or damaged before they reached their destination. A lack of standards, transparency and accountability has been pervasive in buying second-source equipment. It is probably the top barrier to a healthy secondary-equipment market.”

Hearing complaints reflecting such experiences prompted Moov to develop the program. Even customers working with billion-dollar market-cap public companies have endured these kinds of disappointments.

How the Guarantee Works:
Moov takes responsibility for the entire process of buying and selling second-source semiconductor equipment from purchase to delivery and return. It will encrypt applications to verify equipment prior to closing a transaction. In the unlikely event that faulty equipment slips by the verification process, Moov will refund the purchaser’s money — no questions asked. Moov also will tag that equipment with trackers, ensuring its safe arrival. Moov’s insurance will protect the buyer if an incident occurs while the equipment is in transit.

This set of procedures is a stark departure from the pre-owned semiconductor equipment industry’s standard terms: 100% pre-payment, as-is, where-is and no warranty. Today, little accountability exists when equipment is not marketed accurately. Obtaining compensation of any sort is rare, regardless of how egregious the misrepresentation of equipment might be. That current inefficiency results in wasted capital expenditures totaling millions of dollars.

MBG especially caters to end-users currently being forced onto the secondary market by original semiconductor equipment manufacturers’ long lead times on new equipment. End-user clients require equipment to perform immediately to expectations. They can’t afford to waste capital expenditures.

The company hopes the one-of-its-kind policy ultimately will put an end to the common practice of industry players hiding behind sales-agreement terms and conditions, regardless of the equipment’s state. Executives at Moov expect the guarantee to permanently improve the manner in which the market currently operates.

“Traditionally the market has been flooded with resellers, or entities with remarketing agreements attached to end-users with extremely one-sided terms and conditions where if there are any issues with the equipment it isn’t their problem,” Mahon said. “We fundamentally disagree with that premise, and aim to solidify our market leadership in trust.”

About Moov Technologies Inc.
Headquartered in Tempe, Arizona, and Austin, Texas, Moov is a technology-driven marketplace and asset management platform that matches buyers and sellers of pre-owned semiconductor manufacturing equipment. Built by a team with more than 50 years of experience in the manufacturing equipment brokerage industry, Moov’s platform ensures accurate listings and faster transactions. CEO Steven Zhou and Managing Director Maxam Yeung co-founded the company in 2017. Moov employs more than 50 people, and also boasts a presence in San Francisco; Shanghai, China; and Taipei, Taiwan. To learn more, please visit Moov.co.

Media Contact
Treble
Michael Kellner
[email protected]

• Read more about Moov Eliminates Purchase Risk for Used Equipment with Industry’s First Money-back Guarantee

The Electronic System Design Alliance, a SEMI Technology Community, today announced Excellicon formally joined the alliance as its newest member.

Excellicon of Laguna Hills, Calif., provides electronic design automation (EDA) software for timing constraints authoring, compiling, verification, formal validation and management using a multi-mode approach. Excellicon additionally provides capabilities for verification of floor plans and offers the ability to assess viability of various floor plans scenarios and perform what-if analyses.

“It’s clear that the ESD Alliance is the hub of the electronic system ecosystem and important for us to be actively involved,” comments Himanshu Bhatnagar, Excellicon’s CEO. “Our technology has been customer-proven and we are looking forward to expanding our brand awareness via our membership in the SEMI ESD Alliance.”

“We are pleased to have Excellicon join the SEMI ESD Alliance,” says Bob Smith, its executive director. “As a member, it will benefit from our varied initiatives, networking opportunities and brand exposure through SEMI’s global presence.”

As a member of the ESD Alliance, Excellicon is also a member of SEMI, the global industry association representing the worldwide electronic product design and manufacturing supply chain.

About Excellicon
Excellicon is an innovative provider of end-to-end timing constraints analysis and debugging solutions for the automation of constraints authoring, completion, and validation from RTL to GDS with innovative analysis and debugging infrastructures. Excellicon products –– constraints manager, constraints certifier, exception-toolbox (ET), budgeting-tool box (BT), equivalence-checker (EQ), ConTree, and ConStruct ––address the needs of designers at every stage of SoC design, planning and implementation in a unified end-to-end environment. Timing Closure; Done Once! Done Right!

About the SEMI Electronic System Design Alliance
The Electronic System Design (ESD) Alliance, a SEMI Technology Community representing members in the electronic system and semiconductor design ecosystem, is a community that addresses technical, marketing, economic and legislative issues affecting the entire industry. It acts as the central voice to communicate and promote the value of the semiconductor design ecosystem as a vital component of the global electronics industry.

Follow SEMI ESD Alliance
www.esd-alliance.org
ESD Alliance Bridging the Frontier blog
Twitter: @ESDAlliance
LinkedIn
Facebook

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Breker Verification Systems used the opening of DVCon U.S. today to unveil SystemUVM™, a framework designed to simplify specification model composition for test content synthesis with a UVM/SystemVerilog syntactic and semantic approach familiar to universal verification methodology (UVM) engineers.

Developed in partnership with leading semiconductor companies, Breker’s SystemUVM’s UVM-style specification model drives test content synthesis, leveraging artificial intelligence (AI) planning algorithms for deep sequential bug hunting in existing UVM environments.

A coverage-driven approach simplifies test composition and employs up-front randomization for efficient simulation and accelerated emulation. It enhances test content reuse through configurable scenario libraries and portability for system-on-chip (SoC) integration verification and beyond.

For more information go to: www.brekersystems.com/SystemUVM

The Breker Approach
“UVM is an effective standard for block-level verification,” remarks David Kelf, Breker’s CEO. “As blocks and subsystems get larger and more complicated, composing test content for the UVM environment becomes more difficult and harder to scale. By leveraging synthesis for test content generation, a 5X improvement for larger components and multi-IP subsystems is common in composition time combined with significant coverage increases. SystemUVM makes this easily accessible for verification specialists with a minimal learning curve, dramatically changing the nature of functional verification.”

Breker’s SystemUVM layers UVM class libraries on to Accellera’s Portable Stimulus Standard (PSS) to provide the look and feel of SystemVerilog/UVM and its procedural use model. Models can be composed rapidly, efficiently reused and easily understood and maintained through UVM’s register access level (RAL), a library of common verification functions and abstract “path constraints.”

SystemUVM code offers an alternative to generic PSS while still being built on the industry standard specifically targeting the needs of UVM engineers and recognizable to them, unleashing the power of PSS Test Content Synthesis tools, such as Breker’s TrekUVM™ and TrekSoC™ products.

SystemUVM-based Test Suite Synthesis allows the simplified generation of self-checking test content from a single abstract model complete with high-level path constraints for manageable code. Synthesis AI planning algorithms allow for specification state-space exploration, uncovering complex corner-cases that lead to potential complex bugs.

The coverage-driven nature of the process eliminates the need for coverage models and post-execution coverage analysis that results in test respins. With test randomization performed before execution, simulation is accelerated, and emulation can be used without an integrated testbench simulator, which increases its performance. The tests can also be reused in system verification via the Synthesizable VerificationOS layer without any change or disruption to the UVM testbench.

Availability and Pricing
SystemUVM is available today and is included in Breker’s Test Suite Synthesis product line.
Pricing is available upon request.
For more information, visit the Breker website or email [email protected].

Breker at DVCon U.S.
DVCon’s tutorial “PSS In The Real World” opens this year’s virtual conference at 9 a.m. P.S.T., showcasing the power and flexibility of Accellera’s Portable Stimulus Standard by highlighting several real-world examples. Adnan Hamid, Breker’s executive president and CTO, is a speaker.

“In-emulator UVM++ Randomized Testbenches for High Performance Functional Verification,” a Breker-sponsored workshop also Monday at 11:30 a.m. P.S.T., attendees will learn proven, practical methods to verify complex blocks, SoCs and sub-systems with a high degree of quality.

“The Meeting of the SoC Verification Hidden Dragons,” a panel organized by Breker and featuring Hamid will address the gap in semiconductor verification between block functional verification and system SoC validation. The panel will be held Wednesday, March 2, at 8:30 a.m. P.S.T.

About Breker Verification Systems
Breker Verification Systems is a leading provider of verification synthesis solutions that leverage SystemUVM, C++ and Portable Stimulus, a standard means to specify reusable verification intent. It is the first company to introduce graph-based verification and the synthesis of high-coverage test sets based on AI planning algorithms. Breker’s Test Suite Synthesis and TrekApp library allows the automated generation of high-coverage, powerful test cases for deployment into a variety of UVM, SoC and Post-Silicon verification environments. Case studies that feature Altera (now Intel), Analog Devices, Broadcom, IBM, Huawei and other companies leveraging Breker’s solutions are available on the Breker website. Breker is privately held and works with leading semiconductor companies worldwide.

Engage with Breker at:
Website: www.brekersystems.com
Twitter: @BrekerSystems
LinkedIn: https://www.linkedin.com/company/breker-verification-systems/
Facebook: https://www.facebook.com/BrekerSystems/

• Read more about Breker Verification Systems Unleashes the SystemUVM Initiative to Empower UVM Engineering

Verific Design Automation, the leading provider of SystemVerilog, Verilog, VHDL and UPF Parser Platforms, today announced Rapid Silicon, a provider of AI-enabled application-specific FPGAs based on open-source technology, is the newest licensee of its Parser Platform.
Rapid Silicon is quickly building a reputation as the leader of domain-specific, power-, performance- and area-optimized FPGAs for diverse target applications using an open-source methodology and proprietary AI technology to enable a fast and seamless design-to-silicon experience. It will use the Verific Parser Platform including SystemVerilog, VHDL and elaborators for both to serve as the front end to Rapid Silicon’s integrated design environment.

“Verific’s parser platform has the well-earned status of industry standard,” says Pierre-Emmanuel Gaillardon, CTO of Rapid Silicon. “All of the accolades about Verific are valid, a result of its robust, quality software through years of development and user experience and exceptional customer support. It’s a pleasure to work with Verific.”

“Rapid Silicon’s aims to set the standard for FPGAs and FPGA SoCs by building the largest independent AI-enabled FPGA company,” adds Michiel Ligthart, Verific’s president and COO. “We take pride in playing a role in helping to enable a fast and seamless design-to-silicon experience.”

Verific’s SystemVerilog, VHDL and universal power format (UPF) Parser Platforms are in production and development flows at semiconductor companies worldwide, from emerging companies to established Fortune 500 vendors. Applications range from analysis, simulation, formal verification and synthesis to hardware emulation and virtual prototyping, in-circuit debug and design for test. Verific distributes its Parser Platforms as C++ source code and compiles on all 32- and 64-bit Unix, Linux, Mac OS and Windows operating systems.

About Verific Design Automation
Verific Design Automation is the leading provider of SystemVerilog, Verilog, VHDL and UPF Parser Platforms that enable project groups to develop advanced electronic design automation (EDA) products quickly and cost effective worldwide. With offices in Alameda, Calif., and Kolkata, India, Verific has shipped more than 60,000 copies of its software used worldwide by the EDA and semiconductor industry since it was founded in 1999.

Engage with Verific at:
Email: [email protected]
Website: www.verific.com
LinkedIn: https://www.linkedin.com/company/verific-design-automation-inc/
Facebook: https://www.facebook.com/Verific-Design-Automation-100448363329771/

• Read more about Rapid Silicon Chooses Verific’s Industry-Standard Parser Platform

ESPOO, Finland, 17th of February 2022 – Fraunhofer Institute for Silicon Technology (ISIT) has taken PICOSUN® P-300B ALD system into use as their powder MEMS technology platform.

Fraunhofer ISIT PowderMEMS is a new innovative technology for creating three-dimensional microstructures from a multitude of materials on wafer level. The technology is based on bonding together µm-sized powder particles in a cavity with Atomic Layer Deposition (ALD). It has many advantages compared to other manufacturing techniques as it allows using much lower process temperatures compared to a traditional sintering process. The bonded porous structures are thermally and chemically resistant thus enabling their extensive post-processing in a clean room.

"The technology can be used for various applications, such as microelectronics, MEMS sensors, MEMS actuators and microfluidics. For example, it enables the integration of porous and magnetic 3D microstructures on wafer level", explains Dr. Björn Gojdka, Group Leader at Fraunhofer ISIT.

“We were looking for a solution for conformal high surface area coating of powder located in trenches. Picosun solution is a perfect fit for this need as we are also looking into scaling up the technology. We are especially happy about the tool’s hot wall reactor, versatile precursor sources and its easy maintenance”, states Dr. Thomas Lisec, Chief Scientist at Fraunhofer ISIT.

“We are excited over this new technology coming to life and all the opportunities it will bring. I am especially impressed by the potential applications for the Fraunhofer ISIT PowderMEMS as they are exceptionally diverse. I’m looking forward to continuing working closely with Fraunhofer ISIT on bringing the technology up to industrial production”, says Dr. Christoph Hossbach, General Manager of Picosun Europe GmbH.

More information:
Dr. Christoph Hossbach, General Manager, Picosun Europe GmbH
Tel. +49 1522 449 49 11
Email: [email protected]
Web: www.picosun.com

About Picosun
Picosun provides the most advanced ALD (Atomic Layer Deposition) thin film coating solutions for global industries. Picosun’s ALD solutions enable technological leap into the future, with turn-key production processes and unmatched, pioneering expertise in the field – dating back to the invention of the technology itself. Today, PICOSUN® ALD equipment are in daily manufacturing use in numerous leading industries around the world. Picosun is based in Finland, with subsidiaries in Germany, USA, Singapore, Japan, South Korea, China mainland and Taiwan, offices in India and France, and a world-wide sales and support network. Visit www.picosun.com.

About Fraunhofer ISIT
Fraunhofer ISIT in Itzehoe is one of Europe's most modern research facilities for microelectronics and microsystems technology. At the heart of the institute are the clean room facilities, large enough not only to conduct research but also to manufacture the developed microchips on an industrial scale. In close cooperation with partners from industry, 160 scientists at ISIT develop power electronics components and microsystems with fine moving structures for sensor technology and actuator technology, including the necessary packaging technology. www.isit.fraunhofer.de

• Read more about Picosun delivers powder MEMS technology platform to Fraunhofer ISIT