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Rochester, N.Y. – Linton Crystal Technologies announces Edward Przybycien has joined the company as principal engineer. His responsibilities will include overseeing the research, development, design and optimization of Linton’s crystal growing machines, supporting processing equipment and accessories. As such, Przybycien will serve as design lead throughout the product realization process. Located in Henrietta, New York, Linton is the world leader in the design, development and manufacture of Czochralski (CZ) silicon furnaces for production of monocrystalline silicon ingots for the semiconductor and solar industries.

“We are thrilled to have Ed join our team,” says Scott Blazey, director of operations. “With more than 25 years of mechanical design and cost reduction experience specific to crystal growing furnace and hot zone design, Ed will be an integral part of our continued growth at Linton Crystal Technologies.”

Przybycien is a technical professional with a wide range of mechanical design and engineering management experience. This is complemented by business experience as the principal of Przybycien Consulting LLC, through which he provided technical trade compliance services for more than a decade prior to joining LCT.

His engineering experience includes several years as a professional engineering consultant providing specialized design expertise for hot zone development, vacuum chamber design, and development of retrofit devices for semiconductor processing equipment, as well as 13 years with Kayex, Linton’s predecessor. With Kayex, he began as a mechanical project engineer developing custom assemblies, was the project manager for the 300mm grower and then served as engineering manager. In this last role, he directed the activities of 12 mechanical, electrical, and software engineering personnel and managed order engineering, R&D and product maintenance worldwide.

Przybycien earned his B.S. in Mechanical Engineering magna cum laude from State University of New York at Buffalo. Additionally, he completed training in Complying in U.S. Export Controls and Encryption and Technical Data Controls from the U.S. Bureau of Industry and Security, as well as several trainings regarding U.S. export transactions and controls from the Export Compliance Training Institute.

About Linton
Linton specializes in silicon and produces equipment for materials such as germanium and gallium arsenide. They also provide technical support, process engineering support and replacement parts to help clients get businesses off the ground, improve productivity and continue to innovate. Linton has been the exclusive owner of Kayex technology since 2013.
For more information, visit www.lintoncrystal.com.

SLiM 100 delivers real-time detection and quantification of VOCs to the 1 ppb level

Santa Clara, CA — March 14, 2023 — Picarro Inc., a leading provider of chemical metrology systems for advanced semiconductor fabs, today announced the SLiM 100 Lithography Process Tool Monitoring System. The new 1-ppb class chemical metrology solution detects volatile organic compounds (VOCs) in the lithography process in real time, enabling semiconductor manufacturers to quickly take steps to prevent excursions and detect non-visual defects, thereby improving yield.

As design features shrink, small amounts of airborne molecular contamination (AMC) from VOCs are resulting in significant increases in non-visual defects on reticles and wafers. Crystal growth defects on reticles, hazing of scanner optics, and t-topping of photoresists are some of the serious problems that are caused by the presence of undesired VOCs. Ultimately, these contaminants not only damage expensive lithography tools; they result in yield loss on the wafer.

To mitigate the negative effects of VOCs in the lithography process, fab operators need real-time measurements of VOCs at very low concentration levels. This is very difficult to do in the fab environment with traditional technologies because they are slow and difficult to use.

The SLiM 100 system is a real-time measurement system that is designed to run 24/7 in the fab environment. It is a fully integrated chemical metrology system that is robust, easy to operate, and is ideal for use as a high-volume process monitoring and control system. It measures and monitors 10 organic compounds that negatively affect the lithography process with concentration sensitivity down to 1 part per billion. The system can also accommodate analyzers that measure inorganic molecules at parts-per-trillion concentration levels.

“The Picarro SLiM 100 enables fab operators to detect and resolve semiconductor manufacturing issues much faster than other solutions,” said Dr. Sanjay Yedur, Director of Product Management at Picarro. “This robust system will allow them to reduce costs by halting production of defective wafers sooner and minimize downtime of lithography tools for maintenance and repair."

About Picarro Semiconductor Solutions
Picarro’s Semiconductor business offers industry leading solutions for airborne molecular contamination (AMC) and chemical contaminant monitoring within fabs and process tools. Picarro’s Semiconductor solutions respond to contaminants in seconds, not hours, enabling semiconductor manufacturers to quickly mitigate contamination events in cleanrooms, FOUP, and lithography process equipment – improving production yield. For more information, visit semi.picarro.com.

Deventer, March 8, 2023 – RoodMicrotec N.V., a leading independent company for semiconductors supply and quality services, today announces that its wholly owned subsidiary RoodMicrotec GmbH has entered into an agreement for a full and final settlement with Prime Capital Debt SCS, SICAV-FIS – Robus Recovery Sub-Fund ("Robus") regarding the perpetual bond that RoodMicrotec GmbH issued in 2010 and which is held by Robus.

As announced on 21 February 2022, Robus had initiated legal proceedings against RoodMicrotec GmbH before the Regional Court of Frankfurt am Main. Robus claimed being entitled to an 11.7% compensation payment in relation to 2017, 2018 and H1-2021. In addition, alleging non-compliance by RoodMicrotec GmbH of the terms and conditions of the 2010 perpetual bond, Robus claimed the immediate and full repayment of the nominal amount of the perpetual bond asserting grounds for the extraordinary termination of the perpetual bond. The total amount claimed by Robus in the proceedings amounted to EUR 2,568k to be increased with 11.7% interest for the applicable period.

Following an oral hearing held on 7 March 2023, the parties have reached agreement on a full and final settlement that was reached before and confirmed by the Regional Court of Frankfurt am Main. Pursuant to the settlement, RoodMicrotec GmbH shall pay a total amount of EUR 2,194k, in four equal instalments of EUR 548k each, by 31 March, 30 June, 30 September and 31 December 2023. RoodMicrotec will be able to pay the installments from free available cash.

RoodMicrotec is pleased that the ongoing litigation procedure is now settled and the dispute is closed.

About RoodMicrotec
RoodMicrotec is a leading independent company for semiconductor supply and quality services. With more than 50 years of experience in the semiconductor and electronics industry, RoodMicrotec is well-established as a highly valued partner for many companies worldwide. The Company provides full-turnkey ASIC services for complex microchips that are customized to handle specific applications for individual customers. In cooperation with strong partners, RoodMicrotec manages the entire development and production flow of ASICs in the target volume, ranging from low quantities up to multiple millions per year. The turnkey solution includes project management, wafer test, assembly, final test, qualification, failure analysis and logistics. All services comply with the industrial and quality requirements of the high reliability, aerospace, automotive, healthcare and industrial sectors.
RoodMicrotec’s headquarter is located in Deventer, Netherlands, with operational units in Nördlingen and Stuttgart, Germany.
For more information visit https://www.roodmicrotec.com

This press release is published in English and German. In case of conflict between these versions the English version shall prevail.

PENANG, MALAYSIA - FEBRUARY 2023 Wafer inspection is always a critical stage for quality assurance for wafer foundry, integrated device manufacturing (IDM), fabless, and outsourced semiconductor assembly & test (OSAT). Since semiconductor devices are continuously getting smaller and more complex, the requirement for wafer inspection has become more stringent to accommodate these changes. However, defects on the wafer may be overlooked and may pass through the final stages of fabrication and assembly if they are not eliminated or filtered out, which could be a costly mistake for the manufacturers. Consequently, this will lead to increasing demand for quality wafer production.

At ViTrox, we aim to be the World’s Most Trusted Technology Company in providing innovative, advanced, and cost-effective automated Machine Vision Inspection Solutions. Therefore, we would like to introduce our all-new Wi8i G2 PRO Wafer Vision Inspection Handler, which is designed to offer high flexibility in wafer handling, cover different semiconductor processes and high-accuracy inspection results to the users of the semiconductor market, and is also an expansion to the inspection capabilities of our existing Wafer Vision Inspection Hander - Wi8i G2.

One Solution For Two Semiconductor Processes
The all-new Wi8i G2 PRO solution is enhanced with hardware and programming features to accommodate both bare wafers (pre-dicing process) and mounted wafers (post-dicing process) inspection requirements. This innovative configuration eliminates the need for hardware conversion on the wafer robot arm when inspecting these two wafer types of the same size, which is suitable for production involving both pre-and-post-dicing processes and/or having a high-mix-low-volume of bare and mounted wafers. Hence, our Wi8i G2 PRO is the ideal solution to deliver high overall equipment effectiveness (OEE) which guarantees excellent wafer quality without any machine stop time.

Ability To Handle Up To 12” Wafers & FOUP
Based on the current market trend, there is a demand for wafer inspection equipment to cater to larger wafers due to the increasing number of chip-related productions. To address this, our Wi8i G2 PRO offers a significant enhancement in catering to a new type of wafer carrier box, Front Opening Unified Pod (FOUP) which is particularly important to users with such production practice to accommodate 12 inches of bare wafer transferring. Nowadays, FOUPs are the preferred carrier boxes to handle raw water because FOUPs offer a sealed wafer environment that provides static protection, white-light shielding, and control of moisture and oxygen. Today’s FOUPs not only address particles, but also minimize and control volatile organic compounds (VOCs), oxygen, and relative humidity. Any of these potential contamination sources can negatively impact device yield. Alternatively, should the user need to handle framed wafers, they can opt for a metal cassette instead.

Users are also able to configure their load ports based on their production needs, which can be either:
FOUP + Metal cassette
FOUP + FOUP
Metal cassette + Metal cassette

This load port design accommodates both 8 inches and 12 inches of metal cassettes on the load ports, which translates to cost-effectiveness on different-sized wafer inspections!

Robust Wafer Inspection With Our Advanced Vision Optics
Wi8i G2 PRO is not only equipped with robust vision optics that provides high-quality image under different magnification lenses but also integrates an advanced deep-learning algorithm in defect detection and determining the defect types. When a user’s wafer has a complex circuit design and/or is required to inspect different defect types at different regions, this algorithm is the perfect solution for enhancing the accuracy of defect detection.

With the combination of cutting-edge wafer handling mechanisms and robust wafer vision inspection, our latest Wafer Inspection Solution is guaranteed to solve your production pain points! Additionally, we also seek to better understand our customers’ needs in their production line and boost their production yield and also significantly reduce their long-term costs.

Interested to know more about our Wi8i G2 PRO? Do get in touch with our Sales Expert Ms Kong Poh Mei ([email protected]). To top it off, we also invite you to visit us here at ViTrox Campus 2.0 in Penang, Malaysia for a demonstration of the solution. We look forward to serving you!

About ViTrox Technologies
ViTrox is committed to being the World’s Most Trusted Technology Company to provide the most innovative, advanced, and cost-effective machine vision solutions of excellent quality to its customers by integrating ViTrox’s technologies, people, and strategic alliances.

ViTrox offers a full spectrum of solutions, ranging from Middle & Back-end Semiconductor Inspection Solutions, SMT PCB Assembly Vision Inspection Solutions, Electronics Communication Systems, and Industry 4.0 Manufacturing Intelligence Solutions. ViTrox is headquartered in Penang, Malaysia, with offices in Asia, Germany, and the United States, as well as sales and support sites worldwide.

For more information about ViTrox’s products and services, please visit www.vitrox.com.

Malaysia Singapore Register Now! Executive Technical

Co-Organizer

InvestSelangor_Logo

Supporting Partners

Highlighted content

This course will cover:

  • Substrate and PCB fabrication processes and its key processes and materials such as ABF, BT, FR5, etc.

  • Build-up micro-via technologies with use of lasers, plasma, photo materials etc.

  • Registration and tolerances of substrate design in relation to substrate and PCB fabrication processes which includes via to pattern, pattern to resist etc, which can affect microelectronics assembly processes.

  • Materials, design and surface finishes (Cu, NiAu, ENIG , NiPdAu etc) with respect to assembly processes and parameters.

  • Substrate defects and package reliability including failure of fatigue, kirkendall voids and intermetallics.

Why should I attend?

  • Provides necessary technical knowledge for industry professionals
  • Enhance knowledge in manufacturing and R&D know-how in IC packaging
  • Case studies discussion
  • Networking Opportunity with industry peers

Who should attend?

  • Directors, managers, process engineers, R&D engineers working in the areas of microelectronics
  • Useful for sale or application engineers who supply packaging materials and tools to the industry

Malaysian International Trade & Exhibition Centre (MITEC)
No. 8 Jalan Dutamas 2
50480 Kuala Lumpur
Kuala Lumpur
Malaysia

Image of Dr Lee Teck Kheng
MEET OUR TRAINER
Dr. Lee Teck Kheng
Director, Technology Development Centre, Institute of Technical Education Singapore,
SEMI SEA Advance Packaging Technical Committee Member

Note: Program is subject to changes.

9:00 am - 9:10 am

Opening Address by Invest Selangor

9:10 am - 12:00 pm

Substrate & PCB Materials and Fabrication Flow

- Introduction

- Core Materials – FR4, BT, ABF etc.

- Key Processes
- Mechanical, laser drilling
- Patterning exposure, develop, etch, strip
- Electroless and electrolytic plating
- Lamination and buildup
- 2 Layer fabrication flow

12:00 pm - 1:00 pm

Lunch

1:00 pm - 4:00 pm

Design and Tolerances Affecting Packaging

- Mechanical registration and tolerances

- Cu patterning registration and tolerances

- Solder registration and tolerances

- Substrate challenges and constraints

- Plating finishes

- Problem solving exercises on Assembly Challenges

4:00 pm - 5:00 pm

Q&A Discussion

5:00 pm

End of Day 1

9:00 am - 12:00 pm

Assembly Challenges and Defects

- Assembly differences in PCB and substrate

- Surface finishes for assembly
- Substrate surface finishes for packaging, soft Ni/Au for wirebonding, ball attach
- PCB surface finishes for 2nd interconnect, ENIG, NiPdAu and Cu with OSP

- Strip warpage
- Thermal stress and shrinkage affecting warpage
- Slots, Cu patterning and solder resist thickness impacting warpage

- Other assembly challenges

- Solder cracks, solder balling, component lifting, poor wetting, flux residue

12:00 pm - 1:00 pm

Lunch

1:00 pm - 2:30 pm

Reliability

- Interconnect reliability
- Intermetallic failure, interdiffusion
- Fatigue and creep failure

2:30 pm - 3:30 pm

Q&A Discussion

3:30 pm - 3:40 pm

Lucky Draw

3:40 pm

End of Workshop

- Workforce Development

Interaction of Substrate and PCB to Microelectronics Packaging Assembly and Reliability

Substrate and PCB technologies are the building blocks for Microelectronics Packaging and surface mount packages.

Course Fee:

Member Rate: SGD 750
Non-member Rate: SGD 935

Register before 6 March 2023 to enjoy Early Bird rate of up to 15% off the rates above.

This workshop is HRDC Claimable, subjecting to terms and conditions.

Certificate of completion will be awarded at the end of the workshop.

 

Off Add to Calendar 2023-03-08 00:00:00 2023-03-09 00:00:00 [IN-PERSON] Advanced Packaging Training Seminar 2023 Interaction of Substrate and PCB to Microelectronics Packaging Assembly and Reliability Substrate and PCB technologies are the building blocks for Microelectronics Packaging and surface mount packages. Course Fee: Member Rate: SGD 750 Non-member Rate: SGD 935 Register before 6 March 2023 to enjoy Early Bird rate of up to 15% off the rates above. This workshop is HRDC Claimable, subjecting to terms and conditions. Certificate of completion will be awarded at the end of the workshop.   Malaysian International Trade & Exhibition Centre (MITEC) No. 8 Jalan Dutamas 2 50480 Kuala Lumpur Kuala Lumpur Malaysia SEMI.org [email protected] Asia/Singapore public Asia/Singapore

American IC manufacturers have 56% of their wafer capacity installed at fabs located in other regions of the world, according to the new Global Wafer Capacity 2023 report from Knometa Research. As of year-end 2022, American companies have installed capacity of 4.6 million 200mm-equivalent wafers per month, with 2.0 million in domestic fabs and 2.6 million in fabs at foreign sites.

Of the major IC producing countries and regions (Americas, China, Europe, Japan, Korea, and Taiwan), the Americas region is unique in that foreign capacity exceeds that of domestic capacity.

The biggest volumes of offshore capacity for American companies are in Singapore (22% share of total), Taiwan (12%), Japan (10%), Germany (4%), Ireland (3%), and Israel (2%).

  • Singapore: Micron Technology - 4 fabs, GlobalFoundries - 4 fabs
  • Taiwan: Micron Technology - 4 fabs, Diodes - 1 fab
  • Japan: Micron Technology - 4 fabs, TI - 2 fabs, Onsemi - 1 fab
  • Germany: GlobalFoundries - 2 fabs, TI - 1 fab
  • Ireland: Intel - 1 fab, Analog Devices - 1 fab
  • Israel: Intel - 2 fabs

With its many large fabs in Singapore, Taiwan, and Japan, Micron owns by far the most offshore capacity, accounting for 65% of the 2.6 million wafers in monthly capacity. GlobalFoundries is next with a 14% share followed by Intel with 9% and Texas Instruments with 5%.

In the past couple years, American companies have announced several major fab construction projects in the U.S. Some of these came about as a result of the CHIPS Act passed by the U.S. government in July 2022 to boost American semiconductor research, development, and manufacturing.

American-owned fabs under construction in the U.S. and scheduled to open during 2024-2025 include:

  • Intel - Fabs 52 and 62 in Chandler, Arizona
  • Texas Instruments - Fabs SM1 and SM2 in Sherman, Texas
  • Intel - Fab 27 in New Albany, Ohio
  • Micron - Fab in Boise, Idaho

Micron will also build a large fab site in Clay, New York, but this project is part of the company's long-term capacity expansion plans and construction will not begin until 2024 at the earliest. In January 2023, Analog Devices announced plans to double the capacity of its fab in Beaverton, Oregon.

While the share of domestic IC wafer capacity will increase some in the next several years with the opening of these large new fabs in the U.S., American companies are building or have plans to build additional fabs at overseas sites as well. Moreover, Intel's pending acquisition of Tower Semiconductor, with its fabs in Israel and Japan (as well as the U.S.), will shift the balance in the direction of more foreign capacity. Had Tower been part of Intel at the end of 2022 with the headquarters of the combined operations being in the U.S., the foreign share of American-owned capacity would be one percentage point higher at 57%.

About Global Wafer Capacity 2023
Global Wafer Capacity provides a detailed examination of existing fab capacity along with a five-year forecast to 2027. The report has been published on an annual basis since 2007, initially by IC Insights. In December 2021, IC Insights transferred business associated with Global Wafer Capacity to co-founder Trevor Yancey. Mr. Yancey became an independent contractor in 2014 but continued as the principal analyst and project manager for Global Wafer Capacity. Published in January 2023, Global Wafer Capacity 2023 is sold by Mr. Yancey’s company Knometa Research. For more information, visit https://knometa.com/gwc.

About Knometa Research
Knometa Research is a semiconductor technology and market analysis firm led by former IC Insights executive, Trevor Yancey. Mr. Yancey co-founded IC Insights in 1997 with Bill McClean and Brian Matas. In 2014, Mr. Yancey established Knometa Research to serve as an independent contractor for TechSearch International and for IC Insights until that business closed in December 2022. For more information, visit https://knometa.com.

Substrate and PCB technologies are the building blocks for Microelectronics Packaging and surface mount packages

This course will cover:

  • Substrate and PCB fabrication processes and its key processes and materials such as ABF, BT, FR5, etc.

  • Build-up micro-via technologies with use of lasers, plasma, photo materials etc.

Yield Engineering Systems, Inc. (YES), a leading manufacturer of process equipment for semiconductor advanced packaging, life sciences, and “More-than-Moore” applications, today announced that it has sold a VertaCure XP G2 system to Korea’s LB Semicon. The VertaCure XP G2 is the latest generation of YES’s flagship VertaCure vacuum curing system, and LB Semicon’s will be the first such system to be installed in Korea. Delivery is expected at the end of March.

Key factors in the purchase decision were the VertaCure XP G2’s superior throughput, exceptional particle performance, and thorough PI/PBO curing capability – all benefits derived from its proven vacuum-based process. The system will support a bump/RDL application for wafer-level chip scale packaging (WLCSP). It accommodates both 200mm and 300mm wafers, providing valuable flexibility for this and future applications.

“As semiconductor chip manufacturers seek to produce ever-smaller products with higher performance and lower power consumption, wafer bumping technology is expanding its application scope and creating greater value. In order to keep up with this trend, LB Semicon is deeply committed to continuous research and development,” said LB Semicon’s CEO, Dr. Nick (Namseog) Kim. “We believe that YES’s VertaCure XP G2 curing system will enable our company to deliver the cutting-edge technology needed as Korea continues its growth as a world-class semiconductor powerhouse.”

“We are pleased and proud that our VertaCure XP G2 was selected for this leading-edge application,” said Bioh Kim, President of YES Korea. “This order showcases YES’s growing role as a trusted global partner in the production of innovative technologies. We look forward to supporting LB Semicon’s efforts, now and into the future.”

About YES
Yield Engineering Systems, Inc. (YES) is a preferred provider of high-tech, cost-effective equipment for enhancing surfaces and materials. The company’s product lines include thermal processing systems, chemical vapor deposition (CVD) systems, and wet process equipment used for the precise surface modification of semiconductor substrates, semiconductor and MEMS devices, LED displays, and biodevices. Customers ranging from startups to Fortune 100 companies rely on YES systems to create and volume-produce innovative products in a wide range of markets. YES is headquartered in Fremont, California, with a growing global presence. For more information, please visit yieldengineering.com.

About LB Semicon
Based in Pyeongtaek, South Korea, LB Semicon provides bumping, probe test, back-end, and WLCSP services for display driver integrated circuits (DDI), CMOS image sensors (CIS), and power management integrated circuits (PMIC) used in electronic devices such as TVs, monitors, and mobile phones.
LBS has continuously developed and evolved its technology since the company’s founding in 2000, starting with gold bumping for TFT LCD and OLED DDIs, and expanding over the years into solder bumping, Cu pillar bumping, and WLCSP. The company maintains solid partnerships with top semiconductor chip manufacturers in Korea and elsewhere, and has more than a thousand employees. For more information, please visit www.lbsemicon.com.

PRESS RELEASE | Nijmegen, the Netherlands, January 19, 2023

Chip Integration Technology Center (CITC) will intensify its cooperation with acoustic microscopy expert PVA TePla Analytical Systems GmbH. The cooperation offers exciting opportunities for both organizations to benefit from the synergies that exist between them.

Successfully determining which materials and processes are reliable for packaging is crucial to the mass commercialization of power and WBG semiconductors. Flawless basic materials are the key to flawless products. Cracks, cavities, detachment, or inclusions result in failures during the subsequent production process, which can be avoided with the help of reliable material analysis.

To realize this in its Thermal High-Performance packaging program, CITC is going to use the PVA TePla Scanning Acoustic Microscopy (SAM) 302 HD2 system. The microscope system provides non-destructive quality control capabilities and will therefore allow CITC to assess the reliability of the sinter die attachment to the leadframe.

The collaboration will also see both parties sharing information with their respective businesses to showcase the technical capability and infrastructure on offer at both organizations. Finally, PVA TePla and CITC will be exploring opportunities to jointly develop research opportunities.

Peter Czurratis, Managing Director of PVA TePla is excited about the partnership: “CITC is an upcoming and leading research center focused on new semiconductor wafer technologies and new trends in packaging and systems integration. Their cooperation with semiconductor companies and universities provides us with an excellent research platform for defining our future roadmap for the next generation of acoustic microscopes.”

CITC Business Development Manager, Marco Koelink, is also looking forward to this collaboration: “PVA TePla is one of the leading suppliers of Scanning Acoustic Microscopes. Through this collaboration, CITC will gain access to advanced analytical capabilities that will help us not only to analyze and identify bond layer failures, but also better understand material performance and predict failures at an early stage. That is a crucial capability in the development of robust and reliable bonding technologies.”

About CITC
Chip Integration Technology Center (CITC) is a non-profit joint innovation center specializing in heterogeneous integration and advanced chip packaging technology. CITC has created an effective ecosystem in which companies, research and educational institutes work on bridging the gap between academics and industry. CITC’s contribution to the ecosystem is to provide access to innovation, infrastructure and education.
www.citc.org

About PVA TePla
With experience and know-how, PVA TePla AG has for many years supported important manufacturing processes and technological developments, primarily in the semiconductor, hard metal, electrical/electronics, and optical industries, but also in the forward-looking fields of energy, photovoltaics, and environmental technology.
https://www.pvatepla.com/en

PRESS RELEASE | Nijmegen, the Netherlands | January 16, 2023

Chip Integration Technology Center (CITC) today announced the appointment of Mark Luke Farrugia as its new general manager. As of March 1, Farrugia will take over the responsibilities from general manager Jeroen van den Brand, who fulfilled the role ad interim.

Farrugia has an extensive background in the semiconductor backend industry. Prior to this appointment, he worked for almost sixteen years at NXP Semiconductors and most recently as technical director at Nexperia Semiconductors.

He explains why he is now switching to CITC: “Innovation work within semiconductor packaging has been my greatest professional passion for the past 27 years. Breakthrough innovation requires a dedicated organization having the right focus, knowledge and passion and determination, and I see this in CITC.”

In his position as general manager, Farrugia will be responsible for the further development of CITC as an internationally distinctive and well-recognized center of semiconductor and photonic chip packaging technology. “CITC is a young organization, and therefore needs to put itself on the semiconductor packaging map. This should be done by understanding the needs and expectations of the industry, building and enhancing the right competences, and by collaborating with other organizations. I look forward to working with the CITC team, as well as scouting and mentoring the next generation, dealing with the highly complex puzzle of understanding what the various industry stakeholders would like to achieve, and ultimately, to delivering results that have a meaningful impact on the industry.”

Roel Fonville, chair of the CITC Supervisory Board, expresses that this is what qualified Farrugia for the position at CITC: “The Supervisory Board is enthusiastic about the appointment of Mark Luke Farrugia as general manager of CITC. Mark Luke has substantive expertise, an up-to-date business network, entrepreneurial thinking and a strong drive to further internationalize CITC as an innovation center in the field of packaging.”

The position of general manager became vacant following the sad passing of CITC founder and first general manager Barry Peet in July 2022.

About CITC
Chip Integration Technology Center (CITC) is a non-profit joint innovation center specializing in heterogeneous integration and advanced chip packaging technology. CITC has created an effective ecosystem in which companies, research and educational institutes work on bridging the gap between academics and industry. CITC’s contribution to the ecosystem is to provide access to innovation, infrastructure and education. CITC was founded in 2019 with strategic partners TNO and Delft University of Technology and powered by Holland Semiconductors. It is also supported by local and regional governments.
www.citc.org