downloadGroupGroupnoun_press release_995423_000000 copyGroupnoun_Feed_96767_000000Group 19noun_pictures_1817522_000000Member company iconResource item iconStore item iconGroup 19Group 19noun_Photo_2085192_000000 Copynoun_presentation_2096081_000000Group 19Group Copy 7noun_webinar_692730_000000Path
Skip to main content

In-person live event

March 08 - 09, 2023

LOCATION

MIDA Sentral, No. 5, Jalan Stesen Sentral 5
50470 Federal Territory of Kuala Lumpur
Kuala Lumpur
Malaysia

Interaction of Substrate and PCB to Microelectronics Packaging Assembly and Reliability

Substrate and PCB technologies are the building blocks for Microelectronics Packaging and surface mount packages

This course will cover:

  • Substrate and PCB fabrication processes and its key processes and materials such as ABF, BT, FR5, etc.

  • Build-up micro-via technologies with use of lasers, plasma, photo materials etc.

  • Registration and tolerances of substrate design in relation to substrate and PCB fabrication processes which includes via to pattern, pattern to resist etc, which can affect microelectronics assembly processes.

  • Materials, design and surface finishes (Cu, NiAu, ENIG , NiPdAu etc) with respect to assembly processes and parameters.

  • Substrate defects and package reliability including failure of fatigue, kirkendall voids and intermetallics.

This workshop is HRDC Claimable, subjecting to terms and conditions.
Certificate of completion will be awarded at the end of the workshop.

Advanced Packaging Workshop

DATES
TIMES
Wed
Mar 08

9:00 am

to

5:00 pm

Thu
Mar 09

9:00 am

to

5:00 pm

LOCATION

MIDA Sentral, No. 5, Jalan Stesen Sentral 5
50470 Federal Territory of Kuala Lumpur
Kuala Lumpur
Malaysia

Times shown in:

UTC +08:00

CSTS

China Standard Time

Add to Calendar 2023-03-08 09:00:00 2023-03-09 09:00:00 Advanced Packaging Workshop Substrate and PCB technologies are the building blocks for Microelectronics Packaging and surface mount packages This course will cover: Substrate and PCB fabrication processes and its key processes and materials such as ABF, BT, FR5, etc. Build-up micro-via technologies with use of lasers, plasma, photo materials etc. Registration and tolerances of substrate design in relation to substrate and PCB fabrication processes which includes via to pattern, pattern to resist etc, which can affect microelectronics assembly processes. Materials, design and surface finishes (Cu, NiAu, ENIG , NiPdAu etc) with respect to assembly processes and parameters. Substrate defects and package reliability including failure of fatigue, kirkendall voids and intermetallics. This workshop is HRDC Claimable, subjecting to terms and conditions. Certificate of completion will be awarded at the end of the workshop. Location SEMI [email protected] Asia/Hong_Kong public

Keynote Speakers

Image of Dr Lee Teck Kheng
Founder and CEO, Launchxtec Pte Ltd | Consultant, Nanyang Technological University
| Advanced Packaging Technical Committee Member, SEMI Southeast Asia

Agenda

Times shown in:

UTC +08:00

CST

China Standard Time

Note: Program is subject to changes.

Substrate & PCB Materials and Fabrication Flow
09:00 am
12:00 pm
Lunch
12:00 pm
01:00 pm
Design and Tolerances Affecting Packaging
01:00 pm
04:00 pm
Q&A Discussion
04:00 pm
05:00 pm
End of Day 1

Note: Program is subject to changes.

Assembly Challenges and Reliability
09:00 am
12:00 pm
Lunch
12:00 pm
01:00 pm
Defects and Reliabilities
01:00 pm
02:30 pm
Q&A Discussion
02:30 pm
03:30 pm
End of Workshop

Why should I attend?

  • Provides necessary technical knowledge for industry professionals
  • Enhance knowledge in manufacturing and R&D know-how in IC packaging
  • Case studies discussion
  • Networking Opportunity with industry peers

Who should attend?

  • Directors, managers, process engineers, R&D engineers working in the areas of microelectronics
  • Useful for sale or application engineers who supply packaging materials and tools to the industry