SAN FRANCISCO – July 11, 2024 – The EVG®880 LayerRelease™ system from EV Group (EVG) has won the 2024 Best of West award, SEMI and Semiconductor Digest announced today at SEMICON West 2024 at the Moscone Center in San Francisco. Presented by SEMI and Semiconductor Digest each year, the Best of West award recognizes innovative new products or services that are significantly advancing the electronics manufacturing supply chain or a particular manufacturing capability.

The EVG®880 LayerRelease™ system is the first high volume manufacturing (HVM) equipment platform incorporating EVG’s innovative LayerRelease™ technology. It enables nanometer-precision release of bonded, deposited or grown layers from silicon carrier substrates using an IR laser coupled with specially formulated inorganic release materials. As a result, it eliminates the need for glass carriers—enabling ultra-thin chiplet stacking for advanced packaging, as well as ultra-thin 3D layer stacking for front-end processing, including advanced logic, memory and power device formation, to support future 3D integration roadmaps.

“The EVG 880 LayerRelease system enables an important step forward for 3D integration,” said Pete Singer, Editor-in-Chief of Semiconductor Digest. By enabling 3D stacking of ultra-thin layers, the EVG880 LayerRelease system allows for shorter distances between stacked dies, which in turn allows faster data exchange from one die to another while reducing power consumption. “Congratulations to EV Group for again winning the Best of West competition.” The company previously won for its LITHOSCALE Maskless Exposure System in 2021.

EV Group is a leading supplier of equipment and process solutions for the manufacture of semiconductors, microelectromechanical systems (MEMS), compound semiconductors, power devices and nanotechnology devices. Key products include wafer bonding, thin-wafer processing, lithography/nanoimprint lithography (NIL) and metrology equipment, as well as photoresist coaters, cleaners and inspection systems.

EV Group received the Best of West award in a ceremony today at SEMICON West 2024.

About Semiconductor Digest

Through a mix of news, contributed articles and staff-written articles, Semiconductor Digest (www.semiconductor-digest.com), is dedicated to providing global information about the design, manufacturing, packaging and testing of semiconductors and other types of electronic devices, including MEMs, LEDs, displays, power electronics, optoelectronics/photonics, biomedical devices, solar cells, thin film batteries and flexible electronics. Semiconductor Digest consists of a website, magazine and topic-focused newsletters.

About SEMI

SEMI^® is the global industry association connecting over 3,000 member companies and 1.5 million professionals worldwide across the semiconductor and electronics design and manufacturing supply chain. We accelerate member collaboration on solutions to top industry challenges through Advocacy, Workforce Development, Sustainability, Supply Chain Management and other programs. Our SEMICON^® expositions and events, technology communities, standards and market intelligence help advance our members’ business growth and innovations in design, devices, equipment, materials, services and software, enabling smarter, faster, more secure electronics. Visit www.semi.org, contact a regional office, and connect with SEMI on LinkedIn and X to learn more.

SEMI Contact

Samer Bahou
Phone: 1.408.943.7870
Email: [email protected]
 

Semiconductor Digest Contact

Pete Singer, Editor-in-Chief
Phone: 1.978.470.1806
Email: [email protected]

• Read more about EV Group’s EVG®880 LayerRelease™ System Wins 2024 Best of West Award

Rogue Valley Microdevices (RVM), an advanced manufacturing company specializing in microelectromechanical systems (MEMS), is set to participate in SEMICON West 2024, North America’s premier exhibition and conference for the semiconductor supply chain (July 9-11, 2024, San Francisco). This comes on the heels of the U.S. Department of Commerce’s recent announcement that the company has signed a non-binding preliminary memorandum of terms (PMT) for up to $6.7 million in proposed direct funding under the CHIPS and Science Act. See press release link below: U.S. Department of Commerce Announces Preliminary Terms with Rogue Valley Microdevices to Support the Construction of New Foundry (July 1, 2024).

RVM is the first pureplay MEMS foundry to secure proposed funding under the CHIPS Act. It is also the first woman- and minority-owned business to receive a proposed CHIPS Act investment.

The proposed CHIPS investment will support the construction of RVM’s pureplay MEMS and sensor foundry facility in Palm Bay, Florida. The new facility is especially significant because it will be the first MEMS foundry in North America capable of manufacturing 300mm wafers.

“We are passionate about microelectronics and are thrilled to expand our work with customers through the proposed CHIPS Act funding,” said Rogue Valley Devices Founder & CEO Jessica Gomez. “We are proud that the federal government has recognized our important role in the MEMS and sensors ecosystem. And we look forward to augmenting our role in the domestic supply of MEMS devices for automotive, agricultural, industrial and mil/aero applications — including those that require 300mm capability.”

“Increased American production of microchips and microelectronics is critical to meeting our nation’s supply chain needs, and Florida’s Space Coast is home to the best technological, aerospace and engineering workforces you can find,” said Congressman Bill Posey. “Rogue Valley Microdevices’ expansion in Palm Bay is much welcome news, and we look forward to working with them as part of our great community.”

MEMS, MedTech and SEMICON West
MEMS technology continues to make a significant impact on the biomedical space, with microneedles as a key emergent application. Ms. Gomez will explore this topic during her SEMICON West presentation, “MEMS as the Cornerstone of Microneedle Technology,” on Thursday, July 11, at 1:55 pm in the Smart MedTech Theater, Moscone South, Exhibition Level, Hall C.

About Rogue Valley Microdevices
Rogue Valley Microdevices is a full-service precision MEMS foundry that combines state-of-the-art process modules with the engineering expertise to go seamlessly from custom design to manufacturing. Specializing in MEMS and sensors manufacturing — including microfluidics and lab-on-chip platforms — Rogue Valley Microdevices offers a flexible equipment set and the ability for customers to start with smaller batch sizes, serving a key function in the commercial MEMS manufacturing ecosystem.
Rogue Valley Microdevices also maintains the broadest and most comprehensive set of wafer services commercially available — with over 50 unique dielectric and conductive thin films and all services performed in its own class 100 cleanroom. For more information, email: [email protected], visit: https://roguevalleymicrodevices.com, and follow us on LinkedIn.

To schedule a media briefing with Jessica Gomez during SEMICON West, please reach out to the media contact listed below.

Media Contact:
Maria Doyle
Doyle Strategic Communications
[email protected]
Tel: +781-964-3536

• Read more about MEMS Foundry Rogue Valley Microdevices Follows CHIPS Act Proposed Funding News with SEMICON West CEO Talk

scia Systems’ high-precision ion beam process solutions are enabling the automotive, cloud computing, AR/MR, and mobile communications industries

Chemnitz, Germany, July 1, 2024 – scia Systems GmbH, an industry leader in advanced ion beam and plasma process equipment for microelectronics, MEMS, and precision optics industries, today announced that it will highlight key advances in ion beam processing for semiconductor, sensor and photonic integrated circuit (PIC) manufacturing at SEMICON West 2024. The premier microelectronics event will be held July 9-11, 2024, at the Moscone Center in San Francisco, Calif. scia Systems’ high-precision solutions are playing an essential role in enabling many of today’s high-growth consumer and industrial applications.

According to Dr. Michael Zeuner, CEO of scia Systems, “As semiconductors, sensors, and optical devices increase in complexity due to smaller features, new exotic materials, and more layers and complex structures, the processes used to manufacture them require higher levels of precision. Our advances in ultra-precision ion beam process technologies are enabling manufacturers’ success in producing these devices, which are driving cloud computing, augmented/mixed reality (AR/MR), automotive, telecommunications, and many other industries. A case in point, every modern cell phone has components that have been manufactured using a scia Systems product. We look forward to highlighting these solutions, as well as the many high-growth applications that they enable, at SEMICON West – the premier event for the semiconductor ecosystem.”

Ion beam etching solutions enable significant growth in photonic integrated circuits
Demand for PICs is growing rapidly in telecommunications and data centers due to their wide bandwidth, low transmission loss, and numerous other advantages over traditional electronic integrated circuits. Integrating new materials, material stacks, and designs requires new etching solutions. scia Systems’ advanced ion beam etching and trimming processes enable manufacturing of three-dimensional optoelectronic microstructures for PICs, such as waveguides and other optical components. Reducing microroughness by ion beam trimming is another promising application area that enhances the production of high-performance PICs. Further applications include nano-structured surface relief gratings for AR/MR systems, and surface form error correction for telescope mirrors, X-ray optics, lenses, and conventional optics.

Ion beam etching technology produces GMR/TMR sensors for mega markets
High-precision sensors that use magnetic storage, most notably giant magnetoresistance (GMR) and tunnel magnetoresistance (TMR) sensors, are used to detect any type of motion including proximity, rotations or vibrations. These have been rapidly adopted across a wide variety of industries and applications, including automotive electronics, industrial equipment, and cloud storage. However, the complex, multi-layer composition of these sensors creates significant challenges for traditional chemical and dry etching processes, which have difficulty processing magnetic materials. scia Systems overcomes these limitations with its high-precision ion beam etching technology, enabling the manufacture of high-performance GMR sensors for flexible and wearable electronics, including AR/MR headsets, and TMR sensors for Internet of Things (IoT), automotive, smart home, eMobility, and many other applications.

Ion beam etching solutions for precision reverse engineering of ICs
Reverse engineering is an essential step in semiconductor manufacturing. By conducting verification, failure analysis, and research of internal device structures, engineers can isolate and troubleshoot problems to improve manufacturing yields. Reverse engineering involves exposing internal components, delayering to analyze each layer of the device, imaging, and post-processing. Conventional delayering processes such as wet chemical etching, CMP or plasma etching are often expensive, error-prone, and limited in application. scia Systems’ ion beam etching technology enables precise processing within the micro- and nanometer-size range and atomic-level-thickness range for different materials at once.

See scia Systems at SEMICON West
SEMICON West attendees interested in learning more about scia Systems and its advanced ion beam and other thin-film process solutions are invited to visit the Moscone Center North Hall, Booth #553 on July 9-11 in San Francisco.

About scia Systems GmbH
Founded in 2013, scia Systems is a technology leader in thin-film process equipment based on advanced ion beam and plasma technologies. The systems are used for coating, etching, and cleaning processes with nanometer resolution and have been successfully implemented in various high-tech industries worldwide, including microelectronics, MEMS, and precision optics industries. For more information, visit the company’s website at www.scia-systems.com.

• Read more about SCIA SYSTEMS HIGHLIGHTS ADVANCES IN ION BEAM PROCESSING FUELING SEMICONDUCTOR MEGA MARKET TRENDS AT SEMICON WEST 2024

Verific Design Automation today affirmed its position as the leading provider of front-end platforms powering an emerging electronic design automation (EDA) space by collaborating with a group of well-funded artificial intelligence (AI) EDA startups.

These new AI EDA companies use Verific’s unsurpassed language support for fast, accurate large language model (LLM) development, speeding time to market for products that range from functional verification, chip design to code development.

AI EDA providers PrimisAI and Silimate, founded by former chip designers, will be in the Verific booth (#1414) AI showcase at the 61st Design Automation Conference (DAC) June 24-26 at Moscone West in San Francisco.

“This new and exciting market segment is about to change the entire makeup of the EDA industry,” says Rick Carlson, vice president of Verific. “We are about to see a variety of tools, technologies and methodologies destined to change the way chip design and verification is done.”

Introducing the EDA Startups Ushering in the Era of AI EDA
PrimisAI and Silimate will be showcased in the Verific DAC booth and present their unique use of AI technology to eliminate error-prone repetitive tasks for efficient and more productive chip design.

PrimisAI offers a generative AI solution for chip design with advanced language-to-code and language-to-verification capabilities through its interactive AI assistant to address complex hardware challenges across the entire design stack from concept to bitstream/GDSII. RapidGPT, unveiled earlier this year, lets engineers interact with their design and the entire EDA ecosystem with a natural language interface, boosting productivity and accelerating time-to-market. Founded by serial entrepreneur Naveed Sherwani who serves as chairman and CEO, PrimisAI is backed by two early-stage investors.

“Verific’s front-end platform lived up to its well-earned status of industry standard as we implemented it in RapidGPT,” remarks Pierre-Emmanuel Gaillardon, CSO of PrimisAI. “The robustness and quality of the Verific front-end platform ensured we would deliver a tool that would give engineers a seamless and efficient workflow.”

Silimate, backed by Y Combinator, is building the co-pilot for chip designers to help build better chips faster. Silimate finds functional bugs, predicts power, performance and area (PPA) issues, and recommends real and accurate fixes in real time, and is already being used by chip teams building complex IP and SoCs. Co-founders Ann Wu and Akash Levy previously built chips and EDA tools at Apple, Stanford, NVIDIA, and Synopsys.

“Verific consistently produces quality products and offers exceptional quality support,” comments Wu. “Their parsers are fantastic and result in very quick tool bring-up times for our customers.”

Metalware co-founded by Ryan Chow and Andrew Nedea is another Verific front-end platform user. It was started with initial funding from Y Combinator with the mission to accelerate embedded development using AI technology after personally experiencing repeated bottlenecks in embedded software at SpaceX. The Metalware AI EDA tools help designers rapidly write HDL and embedded C/C++ by combining insights from manuals, datasheets and code, offering 10x faster development by automating low-level programming.

“Verific embodies our stated goals to reduce the time it takes to design chips and systems,” affirms Chow. “Verific and its team of experienced EDA engineers have shown repeatedly that its front-end platforms enable a project that would normally take days to be completed in hours.”

Another AI EDA startup in stealth mode is also a new Verific user. Details will be announced shortly.

DAC AI Showcase
Verific will demonstrate its SystemVerilog, Verilog, VHDL and UPF front-end platforms, while PrimisAI and Silimate will be in the Verific DAC Booth #1414 at various times of the day to give 10-minute presentations.

DAC will be held from Monday, June 24, through Wednesday, June 26, from 10 a.m. until 6 p.m. at Moscone West in San Francisco.

To arrange a demonstration or private meeting, send email to [email protected]

DAC registration is open.

About Verific Design Automation
Verific Design Automation is the leading provider of SystemVerilog, Verilog, VHDL and UPF Parser Platforms that enable project groups to develop advanced electronic design automation (EDA) products quickly and cost effective worldwide. With offices in Alameda, Calif., and Kolkata, India, Verific has shipped more than 60,000 copies of its software used worldwide by the EDA and semiconductor industry since it was founded in 1999.

Engage with Verific at:
Email: [email protected]
Website: www.verific.com
LinkedIn: https://www.linkedin.com/company/verific-design-automation-inc/
Facebook: https://www.facebook.com/Verific-Design-Automation-100448363329771/

• Read more about Verific’s Front-End Platforms Now Powering AI EDA Startups, Serving as Foundational Technology for a New and Emerging Market

Primarius Technologies will demonstrate its entire portfolio of EDA toolchain and one-stop design enablement solutions that integrate advanced parallelization technologies with industry-proven modeling and simulation engines at the 61st Design Automation Conference (DAC) June 24-26 at Moscone West in San Francisco.

Also announced today: Primarius acquired Magwel N.V., provider of 3D solver- and simulation-based layout analysis and design solutions for digital, analog/mixed-signal, power management, automotive and RF ICs, and launched ESDiTM, a chip-level human body model (HBM) analysis platform and power device design, and PTMTM, a layout verification tool family.

Demonstrations will highlight Primarius’ fast, accurate device modeling and cell library characterization and circuit simulation solutions based on its continuous innovation and R&D expertise, including:

• SDEPTM, the spec-driven extraction platform that builds auto model extraction flows for fast SPICE model extraction, a key engine enabling efficient Design-Technology Co-Optimization (DTCO), and an extended capability on top of the de facto golden-standard SPICE modeling platform, BSIMProPlusTM.
• NanoSpice XTM, the latest high-performance SPICE simulator addressing simulation capacity and accuracy challenges of big post-layout designs at advanced process nodes.
• NanoSpice Pro XTM, the latest FastSPICE simulator with simulation performance and accuracy needs tailored for SRAM, DRAM, Flash and big analog-on-top designs in high-performance computing, mobile, AI and other advanced applications.
• NanoCellTM, the latest standard cell library characterization solution employs advanced distributed parallel architecture technology and cell circuit analysis extraction algorithms embedded with a high-precision SPICE simulator, making it a fast, accurate and easy-to-use alternative to other commercial solutions.
• ESDi, state-of-the art HBM analysis, simulation and verification tool for on-chip ESD protection.

The Primarius Product Portfolio
IC company challenges designing and manufacturing high-end chips have increased sharply. Foundries and IDMs need to provide their design customers with more comprehensive and accurate SPICE models, more reliable and complete PDKs, and more coverage of standard cell library within shorter development cycles. Chip designers also require stronger COT capabilities to work with device engineers to customize process and devices, develop customized SPICE models, and perform re-characterization of cell libraries based on actual applications.

Primarius provides complete EDA toolchain and a one-stop design enablement technical development solutions. Innovations like these can shorten the SPICE model development cycle from several months to a few weeks or even hours for quick iteration addressing the efficiency bottleneck of DTCO. The advanced simulation technologies speed-up challenging circuit simulation by several times, and the latest cell library characterization solution provides the best throughput with near-linear scaling on thousands of x86 or ARM CPU cores on a computer farm or public cloud.

It aims to enable faster turnaround from technology development to advanced chip designs. Solutions include advanced analysis capabilities for high-sigma yield, aging, EM/IR, ESD, signal integrity and more targeting optimum yield and power, performance and area (PPA).

Primarius also provides the 9812 series, an industry-golden low frequency noise testing system used by most industry-leading semiconductor companies worldwide. Its latest release, 9812AC, is the only commercial low-frequency noise system under AC excitation and designed for the most advanced process development and chip designs.

Magwel N.V. Acquisition
Primarius acquired Belgian-based Magwel N.V. driven by broad market demand and technological evolution, integrating its chip-level HBM ESD analysis platform, the power device design and layout verification tool suite and other technologies into the Primarius portfolio.

“Primarius and Magwel share a common goal of enhancing the market competitiveness of overall analog and power semiconductor solutions,” states Dr. Lianfeng Yang, President of Primarius. “Magwel's integration will further advance our strategy to optimize DTCO, enhance our technology portfolio, expand our product coverage and further strengthen and consolidate our market competitiveness.”

Availability and Pricing
Primarius Technologies. Pricing is available upon request.

For more information, visit the Primarius website or send email to [email protected].

Primarius Technologies at 61st DAC
Primarius Technologies will be in DAC booth #1415 Monday, June 24, through Wednesday, June 26, from 10 a.m. until 6 p.m. at Moscone West in San Francisco.

To arrange a private meeting or demonstration of the Primarius Technologies product portfolio, send email to: [email protected].

DAC registration is open.

About Primarius
Primarius Technologies (688206.SH) is a global electronic design automation (EDA) company providing innovative DTCO-enabled EDA solutions for advanced technology development, and complex full custom designs including analog, mixed-signal and memory circuits. Primarius provides the industry’s de facto golden SPICE modeling solution adopted by most of the leading semiconductor companies for more than a decade, and leading SPICE/FastSPICE technologies proven by leading memory and SoC design companies worldwide. Its design enablement EDA solutions enable a full coverage of fab technology development and fabless COT flow development including device testing systems, SPICE modeling and PDK development solutions, and standard cell library characterization solutions. Built around an innovative SPICE/FastSPICE dual engine, Primarius provides a complete circuit simulation and analysis solution with comprehensive high-sigma yield and signal integrity analysis, aging and EM/IR, ESD simulation and advanced circuit checking capabilities. Primarius also provides a complete full custom design environment with advanced circuit design and optimization, layout automation and physical verification functions, and hierarchy design planning and timing analysis solutions for advanced SoC designs. Visit Primarius Technologies for more information.

• Read more about Primarius to Feature Fast, Accurate Modeling, Characterization, Simulation Solutions at 61st Design Automation Conference

Kitchener, Ontario, June 13, 2024 – PEER Group®, the largest supplier of innovative factory automation software products for the semiconductor industry, will launch the latest versions of its best-in-class automation and connectivity products at SEMICON West 2024.

The new versions of PEER® Tool Orchestrator (PTO®) and EIB® OEM feature multiplatform support for Windows and Linux, the latest technologies including Microsoft .NET and gRPC, and the ability to be deployed as a container.

“We’re excited to launch the latest versions of our flagship products, PTO and EIB OEM at booth 339 during SEMICON West,” says Mike Barrett, PEER Group’s Vice President, Global Sales. “By continuously reinvesting in our products, we make sure our customers get access to the latest technologies and advancements in tool automation and connectivity. Now, with PTO and EIB OEM, our customers benefit from more deployment flexibility, higher performance, reduced costs, and faster time to market.”

Cybersecurity forum
Building on the momentum of last year’s SEMICON West Global Cybersecurity Forum and subsequent establishment of the SEMI Semiconductor Manufacturing Cybersecurity Consortium (SMCC), SEMI is presenting an all-new forum for 2024, Assuring Cybersecurity Resilience Through Industry Partnership.

Hosted by Doug Suerich, PEER Group’s Director of Marketing and Governing Council member of the (SMCC), the forum will feature presentations from cybersecurity thought leaders who will share best practices examples from other industries and how they can be adopted by semiconductor manufacturing. Attendees will also learn about the progress made by the SMCC and the different ways industry members can get involved in helping guide the best path forward to securing and protecting our supply chain.

Smart Manufacturing Pavilion
Suerich will also perform moderating duties at the Smart Manufacturing Pavilion Stage, which will feature presentations on the latest advancements in smart manufacturing, including digital twins, AI, automation, and more.

To learn more about PEER Group’s presence at SEMICON West 2024, or to book a meeting during the show, visit: .

About PEER Group
PEER Group® is the largest supplier of innovative factory automation software products for the semiconductor industry. Since 1992, our solutions have helped the world’s most advanced OEMs and factories reduce time to market and lower costs by solving their equipment automation, data management, and process control problems. An award-winning company, PEER Group’s commitment to quality has been recognized by Intel’s EPIC Supplier Program, naming PEER Group a Distinguished Supplier in 2024. Follow PEER Group on LinkedIn.

• Read more about PEER Group launching latest products at SEMICON West

Axiomise, a company noted for enabling formal verification adoption, today announced the formation of its Technical Advisory Board and its first two members, Dr. Vidya Chandran Darbari and Colin McKellar.

Dr. Darbari is an Axiomise co-founder and company director as well as Senior Lecturer in Structural Biology at Queen Mary University of London (QMUL). McKellar, formerly Vice President of Imagination Technologies, is currently Senior Director of Hardware at X-Silicon Inc.

“Vidya and Colin have long served as my unofficial advisers and confidants as I built Axiomise from the ground up,” remarks Dr. Ashish Darbari, founder and CEO of Axiomise. “Formalizing our relationships with Vidya and Colin will further strengthen the company and the expertise of our formal verification experts.”

“I have had the pleasure of watching Axiomise grow from early startup to a formidable verification provider and I couldn’t be prouder,” states Dr. Darbari. “I look forward to adding my voice as a member of the Technical Advisory Board.

My relationship with Ashish goes back to the early days of Imagination,” notes McKellar. “I watched with amazement and respect as he implemented a rigorous formal verification flow that caught bugs that would have forced costly respins and threats to the company’s good name and reputation.”

About Dr. Vidya Chandran Darbari
Dr Vidya Chandran Darbari, an Axiomise co-founder and company director, has a multi-disciplinary record combining medicine, life sciences, mathematics and technology. A leader and key contributor who leads from the front, Dr. Darbari helped steer Axiomise from its early stages to establishing it as a global leader in formal verification consulting and services, training and RISC-V solutions. She is a senior lecturer at the Queen Mary University of London with several impactful publications in high-end journals including Nature and Science. Dr Darbari received her Bachelor of Medicine, Bachelor of Surgery (MBBS) degree from Seth G.S. Medical College (KEM Hospital) in Mumbai, India, before completing her Master of Technology (MTech) degree from Indian Institute of Technology (IIT) Bombay. Dr. Darbari obtained her Doctorate degree from the University of Cambridge. She has been recognized for her innovative research through Biochemical Society Early Career Award, British Crystallographic Society Early Career prize and recently a Research Excellence Award by the Science and Engineering Faculty at QMUL.

About Colin McKellar
Colin McKellar brings the customer experience to the Axiomise team having been a key player in driving customer engagements in his previous roles with Apple, Intel, TI, SiFive and SEGA among others. He started his career in electronics 30 years ago in Sony Broadcast and Professional working on HD video encode and decode. Most of his career was spent working at Imagination Technologies as a key contributor to the graphics IP roadmap and was instrumental in bringing in and maturing a world-class verification infrastructure including simulation, formal verification and large FPGA, emulation and silicon farms. McKellar joined X-Silicon in 2023 with the responsibility to drive product and execution for bringing graphics and AI acceleration to the RISC-V ecosystem. He has a wealth of design and verification experience across GPU, CPU, AI and SoC chips successfully managing large multinational teams of more than 200 engineers.

About Axiomise
Axiomise is accelerating formal verification adoption through its unique combination of training, consulting, services and specialized verification solutions for RISC-V. Axiomise was founded by Dr. Ashish Darbari, FBCS, FIETE, DPhil (Oxford), who has been a formal verification practitioner for more than two decades with 60 patents in formal verification and over 70 publications.

Engage with Axiomise at:
Website: www.axiomise.com
Twitter: @axiomise
LinkedIn: https://www.linkedin.com/company/axiomise/
Facebook: https://www.facebook.com/axiomise

• Read more about Axiomise Names Two Executives to Newly Formed Technical Advisory Board