Business and Markets

When most people hear “semiconductors,” they think of something abstract: tiny chips, complex equations, cleanrooms hidden behind glass. Relevant, sure, but distant. Compare that to professions like architects or doctors. We can picture their training. We understand their impact. We see a clear path from curiosity to contribution. The semiconductor industry deserves the same clarity and more. Because semiconductors don’t just power devices. They power progress. The semiconductor industry plays a crucial role in sustaining modern life and will remain instrumental in the future. We know this all too well because most of us work within this industry. It isn’t abstract or difficult for us to see how we fit into the grand scheme of this critical industry. It is important to reflect on our initial motivation for entering this field. The technological advancements we are currently developing were likely beyond consideration when we began our careers. Historically, we’ve done a great job of explaining how someone becomes a doctor or an architect: education, residency or apprenticeship, specialization, growth. The semiconductor industry can and must do the same.Imagine clearly mapped pathways that show:High school students how math, science, and technical programs connect to real semiconductor jobsCommunity college and university students how internships, co-ops, and labs translate into manufacturing, design, or research rolesCareer-changers and Veterans how reskilling programs, certifications, and on-the-job training can open doors without starting overWhen people can see the steps, the industry becomes less intimidating and far more inviting.Introducing ChipPathThis is where the SEMI Foundation’s newest platform, ChipPath, comes in! ChipPath, powered by the National Network for Microelectronics Education (NNME) , makes it easier for individuals to understand where they fit today and where they can grow tomorrow. “ChipPath marks a major step forward in our mission to connect people to opportunities in the semiconductor industry,” said Shari Liss, Vice President of Global Workforce Development and Initiatives at SEMI. “By combining career exploration, education pathways, and live job data into one platform, we’re not just helping individuals find jobs, we’re helping them build lifelong careers that drive innovation and impact.”ChipPath helps users explore roles across the semiconductor ecosystem, not just by job title, but by skills, interests, and pathways. A student interested in problem-solving, automation, or precision work can see how those interests translate into manufacturing, technician, or engineering support roles. A career-changer with experience in logistics, quality, or data analysis can quickly identify how their existing skills map to in-demand semiconductor jobs.This shift from “Do I belong here?” to “I can see myself doing this” is foundational. When people can visualize a role that fits them, they are far more likely to pursue it with confidence.Perhaps most importantly, ChipPath doesn’t end with exploration and preparation, it connects talent to actual job openings across SEMI member companies. By serving as a shared access point between job seekers, educators, training providers, and employers, ChipPath strengthens the entire talent ecosystem. Candidates gain visibility into opportunities they may never have discovered on their own. Employers gain access to a broader, more diverse, and better-prepared pool of talent aligned to semiconductor workforce needs.This connection transforms workforce development from a fragmented effort into a coordinated system; one where awareness, training, preparation, and hiring reinforce one another.Access for job seekers doesn’t end once they apply. ChipPath includes resources that help them prepare for the next critical step: the interview. Through guidance on interviewing expectations, communication, and workplace readiness, ChipPath helps candidates show up informed, confident, and prepared to engage. This preparation reduces anxiety for candidates and increases the likelihood of successful matches for employers.When candidates understand how to talk about their skills, experiences, and potential in industry-relevant terms, interviews become more productive, and hiring decisions become clearer.For employers, ChipPath is more than a platform, it has the potential to be a workforce multiplier. It reduces friction for job seekers, improves candidate readiness, and helps align skills with real demand across the industry. By leveraging ChipPath alongside outreach and engagement strategies, employers can help create a talent journey that is easier to navigate, access, and succeed in.When people can see where they fit, understand how to prepare, and connect directly to opportunity, the semiconductor industry becomes within reach.Job seekers today want and need more than just a salary; they want meaningful work and pride in what they do. Our industry offers these opportunities, but we must guide them to find it.Visit http://nnme.org/chippath to explore the platform, build your profile, and take your first step toward a future in semiconductors.Melinda Gomez is Program Manager, Veteran Initiatives at the SEMI Foundation.

Cybersecurity vulnerabilities within the semiconductor supply chain are a growing concern, ranging from individual threats to whole supply chain cyber resilience. It is imperative that the semiconductor industry addresses these risks. Last year, the Semiconductor Manufacturing Cybersecurity Consortium (SMCC) at SEMI introduced Semiconductor Supplier Cybersecurity Assessment (SSCA), providing a streamlined framework allowing suppliers to complete one standardized questionnaire to comply efficiently. The assessment process involves suppliers presenting evidence to support their claims of security controls and measures put in place. Such a body of evidence is critical to establish confidence in the suppliers’ ability to manage risk and comply with standards. The SSCA is a free, open-access resource for the semiconductor industry. This is intentionally made openly available to support SMCC’s mission to strengthen cybersecurity across the semiconductor manufacturing ecosystem. The questionnaire aligns with the six functions of the National Institute of Standards and Technology (NIST) cybersecurity framework 2.0: Govern, Identify, Protect, Detect, Respond and Recover. A recent project led by Swansea University’s Systems Security Group (SSG), in close collaboration with SEMI SMCC, is mapping the evidence requirements necessary for SSCA assurance. The project is funded by the UK Research and Innovation (UKRI) as part of seed funding to support UK/US/Germany collaborative research and innovation projects in the field of semiconductor security. UKRI supports such collaboration in the interest of “maintaining confidence in security throughout the design and manufacturing processes,” and particularly to support research addressing “what tools and techniques could help to reduce the risks associated with third-party hardware design and manufacturing services?”.The project ensures that the global ecosystem is engaged so that evidence requirements developed are acceptable, cost-effective, in line with the latest standards and practice, and ultimately suitable for adoption. As part of this project, two workshops are being organized, one in Germany at Bavarian Chip Alliance, Nuremberg on Tuesday, March 10 and one in the UK at Swansea University on Thursday, March 12, aiming to introduce SSCA and the evidence requirements, gather feedback and inspire early adoption. Join either of these workshops to help shape the evidence requirements and help prepare for effective supply chain security assurance. Participants must download the SSCA framework prior to the workshop.Register for the Germany Workshop on March 10Register for the UK Workshop on March 12Key TopicsIntroduction to Semiconductor Manufacturing Cybersecurity Consortium (SMCC)Standardized Semiconductor Cybersecurity Assessment (SSCA)Supply chain assurance and evidence mappingGroup discussion to feedback on evidence requirementsOpen Q A with cybersecurity and compliance expertsWho Should AttendCybersecurity and compliance professionalsSemiconductor suppliersLegal and regulatory affairs professionalsFabless chip designers and foundriesTesting, packaging, design software, R D tools and IPManufacturing/assembly equipment and ancillary fab servicesIntegrated device manufacturersAbout the authors:Siraj Shaikh is a Professor in Systems Security at Swansea University (UK). His research interests lie at the intersection of cybersecurity, systems engineering, and computer science addressing cyber-physical systems security for automotive and transport systems. He is also Co-Founder and Chief Scientist at CyberOwl, which is dedicated to risk analytics and security monitoring for the maritime sector.Mayura Padmanabhan is a Technical Project Manager at SEMI who manages the Cybersecurity Technology Coalition and Traceability activities.

The GENESIS EU project is reshaping how Europe thinks about semiconductor manufacturing. Its goal is simple but ambitious: reduce usage of harmful chemicals from chip production, cut emissions and waste, and make the industry more circular and resilient.Launched on 1 May 2025, GENESIS – GENerate in Europe a Sustainable Industry for Semiconductor – is a research and innovation project co-funded by the European Union through Chips JU and its participating member states. In addition, Swiss partners are supported by the Swiss State Secretariat for Education, Research and Innovation (SERI).Coordinated by CEA-Leti in Grenoble, GENESIS brings together 58 partners from across the semiconductor value chain: materials and chemistry suppliers, equipment manufacturers, semiconductor fabs, research and technology organisations (RTOs), universities, small and medium-sized enterprises (SMEs), recycling specialists and communication experts. Together, they are working to build a resilient, circular and environmentally responsible microelectronics sector aligned with the European Green Deal and the European Chips Act.Mission and VisionGENESIS exists to future-proof the European semiconductor industry. The project focuses on:Eliminating or replacing per- and polyfluoroalkyl substances (PFAS) and other hazardous substances used in manufacturing processes;Reducing waste and greenhouse gas emissions throughout the production chain;Securing access to critical materials through smarter use, reuse and circular strategies;Deploying advanced monitoring and sensing solutions for gas and liquid environments in fabs.Six Work Packages, One Integrated ApproachTo reach its objectives, GENESIS is structured into six work packages.Work Package 1 – Management, Specifications, and MethodsLead: CEA-LetiWP1 keeps the project on track. It manages the technical, administrative and financial coordination of GENESIS and defines common specifications and methodologies. This includes setting technical recommendations and carrying out environmental impact assessments so that shared targets and consistent methods guide all subsequent work.Work Package 2 – Process, Monitoring Sensing Hardware and SolutionLead: CSEMWP2 develops real-time monitoring technologies capable of detecting and quantifying emissions from process gases such as NF₃, CF₄ or SF₆. By improving transparency and enabling process feedback, GENESIS contributes to the transition toward low-emission semiconductor fabs aligned with EU climate goals.Work Package 3 – Environmentally Friendly Materials AlternativesLead: imecWith global PFAS restrictions tightening, the semiconductor sector urgently needs high-performance, safe alternatives. GENESIS in WP3, is designing and qualifying materials for key manufacturing steps including lithography, etching, cleaning, deposition, and packaging, that reduce industry dependence on PFAS and higher GWP gases while ensuring compatibility with industry performance requirements.Work Package 4 – Minimisation of Waste and EmissionsLead: FraunhoferWP4 addresses the complexity of semiconductor waste streams and explores innovations to enhance abatement efficiency. GENESIS develops recycling, recovery, and closed-loop solutions for gases, slurries, and solvents, with the aim of significantly reducing waste across fabs.Work Package 5 – Materials Scarcity Impact MitigationLead: Università degli Studi di Roma Tor VergataEurope’s dependence on critical raw materials—including gallium, indium, and rare earth elements—represents both an environmental and strategic challenge. GENESIS in WP5 focuses on reducing CRM usage through process innovation and strengthening circularity to enhance supply chain resilience.Work Package 6 – Regulations, Dissemination, Communication and ExploitationLead: SEMI EuropeWP 6 is dedicated to ensuring that GENESIS creates meaningful and lasting impact beyond its technical achievements. It integrates regulatory monitoring, dissemination, communication, and exploitation activities to connect the project’s innovations with industry needs, European policy developments, and wider society. WP6 is coordinated by SEMI Europe, supported by expert partners across the consortium, and serves as the bridge between GENESIS’s scientific work and its real-world influence.Long-term strategyGENESIS is built with one goal in mind: making sure the work happening inside the project translates into real change across Europe’s semiconductor ecosystem. To support this, the project focuses on four key impact areas that help move ideas from research into industry, policy and long-term community engagement.Helping Industry Put Results to WorkA core part of GENESIS is understanding how each partner can use the project’s results in their own environment. Whether it’s new materials, smarter monitoring solutions or better waste-reduction approaches, partners define clear pathways for adoption so GENESIS innovations can move naturally into real industrial use.Staying Connected to Europe’s Policy AgendaSustainability and chemical regulations in Europe are evolving fast, and GENESIS stays close to these developments. The project brings technical insights to discussions around the Green Deal, PFAS regulation, and critical raw materials. This makes sure GENESIS is not only aligned with policy trends, but also contributes to shaping them.Making Knowledge Accessible and Future-FocusedOpen access is an essential part of GENESIS. The project shares its research outputs publicly and supports the creation of educational material for universities and training programmes. This helps the next generation of engineers and specialists build on GENESIS knowledge and carry it forward.Keeping GENESIS Visible and RelevantGENESIS maintains a strong presence across events, conferences, publications and expert discussions. This ongoing engagement ensures that project results remain visible, understood and connected to wider conversations on sustainable semiconductor manufacturing—helping extend the project’s influence well beyond its duration.Towards a Sustainable Semiconductor FutureGENESIS shows that high-performance chips and environmental responsibility can coexist. By uniting materials science, process engineering, monitoring technologies, environmental assessment and policy insight, GENESIS is helping define what responsible, future-ready semiconductor manufacturing will look like tomorrow.Jatin Mendiratta, Communications CoordinatorSEMI Europe Phone: +49 160 402 8899Email: [email protected]

The semiconductor industry is expanding at an unprecedented pace. Global semiconductor revenues are now forecast to exceed $1 trillion annually by 2030, yet recruitment is struggling to keep pace with the demand for new workers. This is why talent development is a critical focus for SEMI and the SEMI Foundation.Young professionals and students are crucial stakeholders of future talent. Held during SEMICON Europa, Building the Talent Pipeline event provided a showcase for some of Europe’s most enthusiastic promoters of careers in the industry: the Student Ambassadors of the European Chip Skills Academy (ECSA). The session opened with Andra Bornea, a Master’s student of electrical engineering at the Technical University of Cluj-Napoca in Romania, who shared the inspiring story of her journey towards a career in electronics. “For me, it started when I attended the ECS Summer School in 2023 along with 39 other students. It was a life-changing experience,” Bornea shared.The Summer School is a week-long programme jointly organised by AENEAS, ECSA, EPoSS and Inside, bringing together lectures, demonstrations and interactive sessions that give students a first-hand glimpse into what a career in semiconductors can look like. For Bornea, the impact was immediate and decisive. “Attending the Summer School convinced me to shift the focus of my studies from telecommunications and pursue a Master’s in electrical engineering,” she added. Today, Bornea is one of 70 students across Europe who form the ECSA Student Ambassador Programme, a community she describes as “a vibrant network of motivated students working towards the goal of keeping Europe at the forefront of the global semiconductor industry.”Andra Bornea, Technical University of Cluj-Napoca The event also featured other ECSA student ambassadors who are actively promoting the semiconductor industry within their own academic communities. One of them was András Bálint Mészáros, an electrical engineering student at the Budapest University of Technology and Economics, who spoke about his determination to build a student electronics club despite facing administrative hurdles along the way. Reflecting on the process, Mészáros said, “ECSA provided good opportunities to start a community of students interested in observing how the microelectronics industry works.”András Mészáros, Budapest University of Technology and Economics A similar spirit of initiative was shared by Nassim Beladel, a Master’s student at ETH Zurich, who described founding Young Neuromorphs which is a student association focused on computational hardware design inspired by the structure of the human brain. Beladel outlined ambitious plans for the group, including an FPGA hackathon in 2026 supported by the Edge AI Foundation, as well as a proposal to present the association’s work at an IEEE event in Shanghai. Nassim Beladel, ETH Zürich These new initiatives supplement a vibrant network of clubs and events around Europe. Octavian-Constantin Axinte, a Master’s student at the Technical University of Cluj-Napoca, told the forum of a Romanian competition for electronics students which has its roots way back in 1992. The Technologies of Interconnections in Electronics (TIE) contest attracted 1,500 students to its final stage in 2025. Axinte said that the benefits of participation included “hands-on experience of professional work, interaction with teachers, and, if all goes well, a job offer!” Octavian Axinte, Technical University of Cluj-Napoca Pioneering Research Efforts of the Next Generation of Students The Building the Talent Pipeline event also gave ECSA student ambassadors an opportunity to describe the findings of research projects that they have undertaken. Laura Sondakh, a Master’s student at Ghent University, presented her research into the environmental and social impacts of tantalum and cobalt which are critical minerals used in electronic components such as capacitors. “These minerals mostly come from the Democratic Republic of Congo, a country which ranks very low on development indices,” she explained, noting that many mines are located in conflict-affected regions in the east of the country. Laura Sondakh, Ghent University Vuk Vulević, a Bachelor’s student of telecommunications and IT at the University of Belgrade, shared his work on the applications of quantum computing, highlighting its potential beyond classic engineering uses such as machine learning. He explained how quantum technologies could also be applied “in pharmacology, for simulating complex molecules and testing compounds virtually, and in finance, for performing risk analyses and Monte Carlo simulations at high speed.” Vuk Vulević, University of Belgrade Z Zainab, a Research Assistant at Hochschule Anhalt, shared insights from her research into how mechanical strain can be introduced during the wafer saw-dicing process which is a critical step in turning wafers into individual chips. Using Raman spectroscopy, her work helps identify how key process parameters influence wafer integrity, enabling manufacturers to better optimise dicing conditions and reduce hidden damage that can affect chip reliability and manufacturing efficiency.Z Zainab, Research Assistant, Hochschule Anhalt Future Plans for Building the Talent Pipeline The event concluded by looking ahead at how SEMI and its partners are scaling up programmes to support talent development worldwide. Victoria Cummings, Senior Manager for Workforce Development and EU Projects at SEMI Europe, introduced Reinforcing Skills in Chips Design for Europe (RESCHIP4EU), a Master’s program for training the next generation of semiconductor designers supported by SEMI Europe and STMicroelectronics. Outlining the project’s ambition, Cummings said, “The program has a broad curriculum, covering everything from silicon chips and SoCs to safety-critical software, how to run a team, and how to start a semiconductor business.” Victoria Cummings, Senior Manager, Workforce Development and EU Projects, SEMI Europe The focus then shifted towards engaging younger learners. Marco van Schagen and Tijl Bouman, co-founders of JuniorIOT, unveiled their newest workshop, Chips in Schools, which builds on their work to spark interest in electronics among younger students. During a hands-on demonstration, audience members of all ages were invited to examine LEDs under a microscope, learning how different chips can be identified and classified by function.The Chips in Schools workshop will soon be available on the ECSA e-learning platform as part of the ongoing collaboration between ECSA and JuniorIOT. Reflecting on the importance of early engagement, van Schagen noted: “When we talk about the talent pipeline, we need to ask where this pipeline really begins. For us, it’s so important that we reach out to children early to foster their sense of curiosity and discovery.”Marco van Schagen, Co-founder of JuniorIOT, demonstrating the Chips in Schools workshop with Victoria Cummings.Rounding off the session, Mike Glavin, Program Director for Workforce Development at the SEMI Foundation, spoke about efforts to significantly scale the foundation’s impact. He described how, despite hundreds of individual microelectronics education initiatives across schools and colleges in the United States, their collective impact has often been limited by fragmentation and a lack of coordinated promotion. To address this, Glavin introduced the National Network for Microelectronics Education (NNME), an initiative designed to unify and amplify existing programmes by connecting educators, students and regional partners. The goal, he explained, is to build scalable, sustainable talent pipelines: “We want to answer the questions, how do we train teachers to educate students about semiconductors? How do we connect to networks through which we can train educators at scale? And how do we develop resources so that a university can host its own semiconductor day, rather than requiring the SEMI Foundation to put it on?” Mike Glavin, Program Director for Workforce Development, SEMI Foundation From university labs to industry-aligned Master’s programs, the message at SEMICON Europa 2025 was clear: talent development is critical to sustaining Europe’s semiconductor ambitions. SEMI would like to thank its partners across academia and industry, as well as the vibrant community of ECSA Student Ambassadors, whose collaboration, commitment and creativity are helping to build a diverse, resilient talent pipeline and shaping the future of the global microelectronics ecosystem.SEMI Contact Jatin Mendiratta, Communications Coordinator, European Projects Email: [email protected]

At SEMICON Europa 2025, the Executive Forum programs brought together experts from across the semiconductor value chain to address two critical challenges shaping the industry’s future in Europe: the transformation of the automotive sector and the pursuit of smarter, more competitive manufacturing.Smart Mobility in a Changing MarketKnut Krümmel, Senior Partner Automotive at Porsche Consulting, set the tone with a stark question, “Are we facing a Detroit scenario in Europe, especially in Germany?” – a reference to the decline since the 1990s of the famous “Motor City.” He pointed out that all three of Germany’s giant OEMs, Volkswagen, Mercedes-Benz and BMW, are rapidly losing market share in China in the face of a destructive price war, and have suffered large declines in reported earnings. Krümmel outlined four strategic imperatives for Europe’s auto industry: reduce complexity and increase standardization, become software-defined, design regulation that supports innovation, and build stronger partnerships across the ecosystem. He emphasized, “A new mindset is needed—people need to be hungry to win and prepared to suffer in pursuit of victory.”Knut Krümmel, Senior Partner Automotive, Porsche Consulting GmbHAndreas Aal, Head of Semiconductor Strategy at Volkswagen AG and Chair of Europe at SEMI Smart Mobility Global Automotive Advisory Council (GAAC), introduced a proactive approach to redefine the market. He shared Volkswagen’s vision for mobility-as-a-service, exemplified by its roboshuttle pilot in Hamburg. “It is very difficult for a traditional OEM to go into the full digital services world. But this is what we want to do,” said Aal.Andreas Aal, Semiconductor Strategy Volkswagen AG and Chair of Europe GAAC, VolkswagenJan-Philipp Gerhmann, Vice President of Marketing and Strategy for Automotive at NXP Semiconductors, added that the traditional value chain is being upended. The industry is shifting from a hierarchical supply chain to vertical integration, with companies like Tesla designing their own chips. Gehrmann introduced NXP’s CoreRide platform, a modular “skateboard” architecture enabling plug-and-play Advanced Driver Assistance Systems (ADAS) and infotainment features for future vehicles.Jan-Philipp Gehrmann, Vice President of Marketing Strategy, NXPA perspective on the future of semiconductors in autonomous vehicles was provided by Dieter Hoffend, Business Director for Automotive at imec: “For autonomous vehicles, you need a higher-end compute capability, which needs a transition to smaller nodes – and that is very costly. In fact, semiconductor companies will not want to commit volume to automotive customers for their most expensive leading-edge ICs. This means that a chiplet architecture will be the most cost-effective approach for vehicles, and will provide the greatest supply chain resilience. To support this, imec’s vision is of an open chiplet marketplace of heterogeneous chiplets which are interoperable.”Dieter Hoffend, Business Director Automotive Sector, imecAchieving End-to-end Manufacturing ExcellenceThe Executive Forum then shifted to a discussion of smart semiconductor manufacturing. Giovanni Notarnicola, Partner at Porsche Consulting, highlighted the untapped potential of AI in fabs. “AI requires massive amounts of data—but fabs often don’t own or control their data. And second, AI talent doesn’t typically reside in semiconductor companies,” said Notarnicola. His recommendation: “AI is not an IT issue—it’s a cross-functional technology. Isolating AI in the IT department is an old-fashioned view which will deter AI talent from joining the industry.”And Notarnicola encouraged the industry to leverage the new white paper produced by SEMI End-to-End Smart Manufacturing Group, which provides an in-depth report on the application of AI in semiconductor fabrication. Giovanni Notarnicola, Partner, Porsche ConsultingOliver Aubel, Corporate Lead for Automotive Solutions at GlobalFoundries, echoed the opportunity. “We have 1 billion sensors in a fab, but 30% of the signals are statistical noise. AI could help us make better sense of the data.”Oliver Aubel, Corporate Lead for Automotive Solutions at GlobalFoundriesA session on smart manufacturing brought to light other proven methods for improving the performance of fabs. Dr. Holland Smith, Director of Data Science at INFICON, described fab control technology that INFICON had helped STMicroelectronics to deploy. As Thomas Gimmig, Director for Industry 4.0 at STMicroelectronics, said, “Our model was a highway control room – a place where a single person controls 220km of road monitored by 400 cameras, and handles one alert every three minutes on average. This is only possible with a huge amount of automation.”Left: Thomas Gimmig, Director for Industry 4.0 at STMicroelectronics; Right: Dr. Holland Smith, Director of Data Science at INFICONAt STMicroelectronics, the new fab control room mimics this model, automating anomaly detection and problem solving. Smith described how the system will not be limited to detecting and handling anomalies which have already occurred. “There is a plan to look ahead at problems which could emerge in future, and to configure it to make proactive suggestions which will prevent anomalies from occurring in the first place,” said Smith. Jamie Potter, co-founder and CEO of Flexciton, showcased how intelligent scheduling tools based on real-time fab capacity are transforming operations. “In the modern fab decisions must be made more frequently, with more intelligence and with fewer people. And that is why fabs need to be made more autonomous,” said Potter.Jamie Potter, CEO Cofounder, Flexciton Ltd“Our tool is based on a dynamic capacity model of the fab, so WIP optimization is based on knowledge of what the fab can actually do now, rather than – as is normally the case in fabs today – on an abstract algorithm which is derived from operational results observed in the past.” Potter said. Robert Wallace, Solutions Architect at Seagate, which has deployed the Flexciton technology, confirmed the impact: “We increased throughput without increasing cycle times, and saw a 30% drop in deviations from forecast completion times.” Robert Wallace, Solutions Architect at SeagateAntoine Amade, President (EMEA) of Entegris, emphasized the importance of benchmarking to guide performance improvements: “We have a robust library of fab case studies. These benchmarks can become the foundation for best practices.” Antoine Amade, President (EMEA) of EntegrisRegulatory Burdens and Regional Challenges In a panel session, the discussion turned to the issues that European semiconductor manufacturing faces in particular. Herbert Blaschitz, Executive Vice President of Advanced Technology Facilities at Exyte, put a strong emphasis on the drag that European regulation imposes on the construction of new fabrication plants: “There is three times more paperwork to complete in Europe than in Asia.” Blaschitz made the contrast with Taiwan, “where they have standard codes of regulation specifically for a wafer fab. In Europe, we have regulations for skyscrapers, we have regulations for building family homes. But we have nothing for wafer fabs.”It could be worse for companies building all new fabs. According to Stephen Rothrock, President and CEO of ATREG, “We are affected by permits and politics most of all when trying to push through the repurposing of fabs.”From Left to Right: Mark Puttock, Sr. Director - Technology and Innovation, Entegris; Giovanni Notarnicola, Partner, Porsche Consulting; Stephen Rothrock, President/CEO, ATREG; Jean-René Lèquepeys, Deputy Director and Chief Technology Officer, CEA-Leti; Herbert Blaschitz, Executive VP of Advanced Technology Facilities, Exyte; Oliver Aubel, Corporate Lead Automotive Solutions, GlobalFoundriesSustainable Manufacturing Practices: A Source of Competitive Advantage?The forum ended with a debate on the value of and problems with Europe’s commitment to sustainability. As Mark Puttock, Senior Director for Technology and Innovation at Entegris, acknowledged concerns that sustainability practices could raise costs and reduce process efficiency. But Jean-René Lèquepeys, Deputy Director and Chief Technology Officer at CEA-Leti, countered: “sustainability can be a competitive advantage. For instance, the industry is under pressure to eliminate PFAS from its processes. CEA-Leti is working on this problem, and the whole world is looking for a solution.”The event concluded with a moment of celebration: Ilya Zabelinsky, Co-founder of the International Subfab Research Labs (ISRL), won a diamond prize sponsored by Nanores Lab,Left: Jakub GawczyńskiJakub Gawczyński, Head of Nanores Lab; Right: Ilya Zabelinsky, Co-founder of the International Subfab Research Labs (ISRL)On behalf of SEMI, we extend our sincere gratitude to the speakers, sponsors, and participants who contributed their expertise and vision to the programs at SEMICON Europa 2025.SEMI ContactAna Bernardo, Senior Manager of Technology Programs SalesEmail: [email protected]

The CxO Summit at SEMICON Europa 2025 spotlighted Europe’s ongoing efforts to build a resilient and globally competitive semiconductor industry, while calling for greater ambition, speed, and unity in execution. Following global disruptions with the automotive supply chain crisis, the European Union launched a continent-wide strategy through the EU Chips Act. While the Act has already spurred significant developments, including construction of the new ESMC fab in Dresden, Europe remains far from its goal of achieving a 20% share of global semiconductor production by 2030. The CxO Summit, part of the SEMICON Europa event in Munich, provided an opportunity for industry leaders to share ideas about how to catalyze the next phase of the European industry’s growth.Ajit Manocha, President and CEO of SEMI opened the summit by describing today’s industry landscape with one word: “unprecedented.” Manocha said, “The global growth of the industry is unprecedented, with 107 new fabs set to come online by 2028, but the uncertainties are unprecedented, from geopolitics to the talent shortage to environmental concerns. So we need unprecedented solutions.” Ajit Manocha, President and CEO, SEMILaith Altimime, President of SEMI Europe echoed the mood of uncertainty, describing Europe as caught “in a perfect storm.” Altimime said, “As we face a combination of internal challenges and intensifying external competition, collaboration is not optional — it is mission critical.” Laith Altimime, President, SEMI EuropePierre Chastenet, Head of the Unit for Microelectronics and Photonics, European Commission, highlighted the tangible progress made under the EU Chips Act. “We now have a proper toolbox to handle a future crisis in the supply chain. The Chips for Europe initiative has led to the creation of five pilot lines for advanced technologies such as FD-SOI and wide bandgap semiconductors.” Chastenet added, “Europe must now capitalize on its strengths, from materials and equipment to design tools and cutting-edge research emerging from our RTOs.”Pierre Chastanet, Head of the Unit for Microelectronics and Photonics, European CommissionEchoing the call for action, Oliver Schenk, Member of the European Parliament, urged stronger regional unity. “Europe must act together, act faster, and act with much bigger ambition,” Schenk said, reinforcing the need for cross-border commitment to strengthen the continent’s semiconductor position.Oliver Schenk, Member of the European Parliament, European ParliamentHighlighting Europe’s most critical technology gap, Luc Van den hove, President and CEO of imec, unveiled plans for a new advanced fab backed by €2.5 billion in investment from the EU, the Flemish government, and ASML. Van den hove urged Europe to commit wholeheartedly to advanced technologies: “We must be more ambitious, and focus on disruptive breakthroughs rather than incremental change if we want to ensure a prosperous future.”Luc Van den hove, President CEO, imecAt the CxO Summit, CEA-Leti and ASML signed a memorandum of understanding (MoU) to deepen their collaboration and accelerate innovation in mainstream semiconductor technologies. Building on promising results in hybrid bonding, the partnership will now target 'More-than-Moore' innovations, including heterogeneous integration and novel substrates like SiC and GaN. “We aim to combine ASML’s world-class lithography expertise with CEA-Leti’s system-level innovation,” said Sébastien Dauvé, CEO of CEA-Leti. The collaboration is set to strengthen Europe’s ecosystem by shortening the path from early research to industrial impact.Left: Anne Hidma, Senior Vice President EUR US, ASML; Right: Sébastien Dauvé, CEO, CEA-LetiTurning to Europe’s industrial base, Christian Senger, CEO of Volkswagen Autonomous Mobility, emphasized the need to shift from risk-aversion to opportunity. While the region’s automotive sector faces intense global competition, particularly from China, Senger highlighted that Europe has the potential to lead in new mobility markets. “The market for autonomous roboshuttles for people transport in large cities is forecast to be worth €400 billion in the US and Europe alone,” he said. With American firms like Waymo and Uber leading the robotaxi space, Senger stressed that Europe must “act swiftly to create an environment that supports an autonomous mobility industry here.”Christian Senger, Member of the Board for Fully Autonomous Mobility and Transport CEO of ADMT GmbH, VolkswagenEurope’s Potential to Create Advanced TechnologyOne of these RTOs, CEA-Leti, is responsible for the FAMES pilot line for FD-SOI technology. Sébastien Dauvé, CEO of CEA-Leti, agreed with Pierre Chastenet that the pilot lines show great promise. He said, “FD-SOI is a big trend in semiconductors, because it enables very low power consumption in embedded devices. We think that adoption of the technology will grow in the coming years, and that is good, because most of the technology is produced in Europe.”Sébastien Dauvé, CEO, CEA-LetiEurope is also widely recognized to be the leading global voice on sustainability – a huge issue of concern to the semiconductor industry. Henri Berthe, President of the Semiconductor and Battery Segment at Scheider Electric, told the summit that 500 million tonnes of CO2 emissions per year are attributable to the semiconductor industry – “more than the whole of Mexico emits!” he said. “We need to make fabs more efficient, and that is why Schneider Electric has launched a new playbook with Applied Materials for sustainable energy abundance for the industry.”Henri Berthe, President of the Semiconductor Segment, Schneider ElectricAnother aspect of Europe’s playbook is support for new fabs. The flagship is ESMC, the joint venture between TSMC, NXP Semiconductors, Bosch, and Infineon. Christian Koitzsch, president and managing director of ESMC, reported to the summit that the project to build in Dresden a 12nm FinFET foundry and a 28nm CMOS line, requiring a total investment of €10bn, is on schedule. “We are now developing local supply chains, hosting a series of ESMC Supplier Days which are open not only to German but generally to European suppliers,” said Koitzsch.Christian Koitzsch, President and Managing Director, European Semiconductor Manufacturing Company (ESMC)As Manfred Horstmann, General Manager and Senior Vice President of Global Foundries, pointed out, the building of the ESMC fab means that Dresden is established as the center of a cluster of semiconductor industry companies. “Global Foundries has its Fab 1 and a mask center in Dresden. In fact, one-third of the chips produced throughout the whole of Europe now comes from Dresden.”Manfred Horstmann, General Manager and Senior Vice President, GlobalFoundriesAn example of ambition was given by Terence Gan, Executive Director of the Institute of Microelectronics of Singapore. Gan told the summit how Singapore has used pilot lines to stimulate research and development in new technologies. He said: “We started research into advanced packaging as long ago as 2011. Most people thought we were mad! But today, there is strong demand for our advanced packaging capabilities because of the rise of AI and its need for high-performance computing.”Terence Gan, Executive Director, Institute of MicroelectronicsBreaking Barriers to ProgressDespite momentum, bureaucratic inefficiencies continue to hamper progress. Narjiss Haddaoui, Managing Director of European Economics called for faster decision-making: “In global competition, speed is a decisive factor. To act fast enough, the EU must change its ‘software’ - the processes by which it considers and makes decisions.” Narjiss Haddaoui, Managing Director, European economicsThe stifling character of European bureaucracy is reflected in the region’s approach to building fabs. Herbert Blaschitz, Executive Vice President of Advanced Technology Facilities at Exyte, compared fab construction timelines: 20 months in Taiwan, 34 in Europe, and 38 in the U.S., attributing delays in Europe to paperwork bottlenecks.Herbert Blaschitz, Executive VP of Advanced Technology Facilities, ExyteFabio Gualandris, President for Quality, Manufacturing and Technology at STMicroelectronics raised another concern — 100% of raw materials used in European fabs come from outside the region. Christophe Frey, Vice-President for EU Engagements at Arm France, added that geopolitical tensions are clouding the path forward: “We are a bit lost in the smoke from the big fire in the world’s semiconductor industry.” Fabio Gualandris, President Quality, Manufacturing Technology, STMicroelectronics Christophe Frey, Vice-President of EU Engagements, Arm FrancePlaybooks For Future SuccessSo amid the uncertainty and global tension, what lessons can the industry learn from successful regional examples? Tuomas Korpela, Business Development Senior Manager at Nokia, credited Finland’s strategic procurement and policy tools with enabling a vibrant semiconductor ecosystem: “Finland creates demand for advanced chips using industrial policy tools, alongside strategic procurement in sectors such as defense and aerospace, and connectivity.” Tuomas Korpela, Business Development Senior Manager - Corporate Development Organization, NokiaAt a regional level, Joerg Schulze, Director of the Bavarian Chips Alliance, said that his organization was supported by the Bavarian State Ministry of Economic Affairs, as well as by companies and universities. “We help semiconductor companies to establish themselves and grow here through help with site searches, networking and contacts, funding and support, and talent acquisition,” said Schulze.Joerg Schulze, Spokesperson for the Bavarian Chips Alliance, Director of the Fraunhofer IISB, Bayern Innovativ GmbHCompanies in the European semiconductor supply chain also provided the summit with their insights into the roots of global success. André Grede, Chief Technology Officer of Comet, described how his company’s strategy is not to wait for customers to tell it what they need, but to be “ahead of the curve.” Grede said: “Is staying in sync with the customer enough? Not for us - we are deeply embedded with our customers, and constantly looking to broaden our relevance to them.”André Grede, CTO, CometChristophe Maleville, Chief Technology Officer of Soitec, provided a real-world example of how this is done. He said: “Our engineered substrates using RF-SOI technology reduce the drain on a mobile phone’s battery power, and cut our customers’ board footprint thanks to RF front end integration. As a result, our products are now in 100% of 5G smartphones.”Christophe Maleville, CTO, SoitecAnne Hidma, Senior Vice-President for Europe and the US at ASML, shared the company’s success formula: “The reasons for ASML’s success include customer focus – decide which markets you are going to be in, and which you are not. We are also all-in on innovation. We nurture an ecosystem, which for us includes imec and CEA-Leti, as well as partnerships with academia. And lastly, we have a strong supply base, which is a core strength of Europe.” In a time marked by both uncertainty and opportunity, the example of ASML shows how the European semiconductor supply chain can survive and thrive.Anne Hidma, Senior Vice President EUR US, ASMLEurope’s Path ForwardThe CxO Summit made one thing clear: Europe has world-class innovation, policy momentum, and industrial commitment. What’s needed now is faster execution, deeper collaboration, and the courage to invest in the technologies of tomorrow. As the industry heads toward the $1 trillion milestone, the decisions made today will shape Europe’s place in the semiconductor world for decades to come.On behalf of SEMI, the SEMI Europe team would like to express appreciation to the industry leaders for sharing their visions and readiness to collaborate during the CxO Summit.SEMI ContactLaith Altimime, President SEMI [email protected]

As the world enters a new era of deep tech innovation, fields such as AI chips, Advanced Computing, Autonomous Vehicles, Smart Manufacturing, and MedTech have become strategic priorities for global investors and corporate venture capital (CVC). This momentum has accelerated collaboration between startups and the semiconductor supply chain, transforming innovative ideas into scalable market solutions.As part of its effort to foster global startup engagement, SEMI connects global innovators through two key platforms — the Silicon Startups Zone and the IC Taiwan Grand Challenge (ICTGC) — to accelerate innovation across the semiconductor ecosystem.Silicon Startups Zone: A Global Stage for Semiconductor Innovation The Silicon Startups Zone serves as a gateway for global startups and investors exploring opportunities in semiconductor innovation. Launched at SEMICON Taiwan 2025, the Silicon Startups Zone is organized by SEMI with support from the National Science and Technology Council (NSTC). It features over 20 startup teams from Taiwan and around the world, showcasing advancements in AI chips, advanced packaging, EDA tools, and sustainable solutions.Through UPNext Stage presentations and live technology showcases, startups engage directly with investors, chip designers, and technology providers. SEMICON Taiwan attracts over 100,000 industry professionals, fostering new partnerships, investment discussions, and collaborations — reinforcing Taiwan’s pivotal role in connecting global innovation with the semiconductor supply chain. The Silicon Startups Zone is more than just an exhibit space — it is a starting point for collaboration and commercialization. By leveraging SEMI’s global network and Taiwan’s world-class manufacturing ecosystem, the platform accelerates startup growth and builds a sustainable pathway for next-generation innovation.The 2026 Silicon Startups Zone welcomes qualified startups to participate, offering a dedicated showcase area, UPNext Stage speaking opportunities, and exclusive marketing and media exposure. For more details, please contact Sophie Chen at [email protected] Taiwan Grand Challenge (ICTGC): Precision Scouting for Global Deep Tech Collaboration Organized by the NSTC and promoted by SEMI, the IC Taiwan Grand Challenge (ICTGC) is a global competition focused on Deep Tech innovation — based in Taiwan and open to the world. With the theme “Prototyping to Production,” ICTGC identifies startups and innovators in five key areas: AI Chip Technology, Smart Mobility, Smart Manufacturing, MedTech, and Green Technology. The program invites global startups, research institutions, and entrepreneurial teams to apply. Selected winners receive up to US $30,000 in prize funding, along with technical mentorship and access to semiconductor manufacturing resources, including EDA tools, wafer fabrication, and packaging technologies. The 2026 Call for Proposals are open now through February 28, 2026. More than a competition, ICTGC serves as a platform for collaboration — connecting the semiconductor supply chain, academia, and venture partners to help startups accelerate development and market entry. For more details on the call proposals, please contact Sophie Chen at [email protected] or submit via the Google form.Two Platforms, One Mission: Connecting Innovation for the Future Together, the Silicon Startups Zone and IC Taiwan Grand Challenge (ICTGC) create a pathway for Deep Tech startups — from discovery to collaboration and growth. Through these initiatives, SEMI connects global innovators with the semiconductor ecosystem, driving cross-border partnerships and accelerating next-generation technologies. Please click here for more information.SEMI Contact Sophie Chen, Coordinator, Technical Projects Email: [email protected]

The 2025 SEMICON West Market Symposium brought together leading analysts and strategists to decode the powerful forces shaping the global semiconductor market. Building on last year’s focus on fabless growth and workforce initiatives, this year’s sessions centered on the rising influence of geopolitics, trade policy, and AI-driven investment. Experts from SEMI, Integrated Insights, Boston Consulting Group, Kearney, PwC, WSTS and TechSearch shared perspectives on how global shifts from tariffs to technology races are redefining supply chain resilience and regional competitiveness.On October 6 in Phoenix, Arizona, Clark Tseng, Senior Director of SEMI Market Intelligence, hosted the symposium and presented along with industry experts on the current trade environment from various angles. Discussions ranged from the effects of U.S. tariffs across the globe, to sector-specific considerations and market growth areas. US Trade Dynamics in Semiconductors As the geopolitical landscape in the U.S. becomes more complex, Iacob Koch-Weser, Associate Director, Global Trade Investment at Boston Consulting Group outlined the impact that tariffs are having on the U.S. industry. The average American tariff, he said, is higher than any time in the last 75 years. Although the semiconductor industry is less affected by high tariffs than other sectors, Koch-Weser noted that might change with the administration’s expanded Section 232 Tariff that imposes 50% tariffs on steel, aluminum, and their derivatives on nearly all trading partners. To explain, he described four potential Section 232 tariff scenarios, underscoring limited Section 232 enforcement as the ideal approach.Tariffs may be deprioritized in favor of chips incentivesThere may be targeted carveouts for alliesThe administration may impose high tariffs with limited exceptionsThere may be a 100% tariff rate To cope with tariff uncertainty, Koch-Weser recommended that companies consider reshaping policies, mastering trade compliance, and reconfiguring supply chains if possible. He also shared four potential outcomes for the future of U.S. trade that could take effect within the next 18-24 months. The U.S. may run its own system while the rest of the world aligns to World Trade Organization (WTO) rules.North American countries may form a stronghold, leaving all other countries to choose between the North American alliance and WTO standards.Countries may form new blocs and preferential agreements, creating multiple economic spheres worldwide.Global cooperation could break down, forcing countries to fend for themselves.With everything considered, he reinforced that the U.S. is still an attractive place for semiconductor investment. The current administration, he said, recognizes the importance of bringing advanced technologies back to the U.S. Navigating Uncertainty: AI-Driven Growth and the U.S. Semiconductor Manufacturing RenaissanceContinuing discussions on tariffs, SEMI’s Clark Tseng painted a picture of the current U.S. semiconductor industry. He divided his presentation into four key areas: near-term economic uncertainty, AI changes everything, semiconductor market equipment forecast, and material market outlook.Near-term economic uncertainty: U.S. tariff policies are contributing to inflationary pressures and altering global trade patterns, leading to cross-border uncertainty that is slowing investment. U.S. tariff revenue, he said, has expanded from $7 billion in January 2025 to $29.5 billion by August, forcing companies to sacrifice margins to compensate. AI changes everything: By 2030, Tseng noted that nearly half of the semiconductor industry’s capital expenditure will be driven by AI, pointing to sustained growth in AI-driven cloud infrastructure spending through 2028 forecasts. AI is also moving beyond data centers into edge computing and endpoint devices.Semiconductor market equipment forecast: Tseng reported that the outlook for the equipment market remains strong over the next three years. However, the biggest risk to the market is a potential slowdown in AI investment and adoption. Additionally, U.S. export controls and changes in regional supply chains present some challenges. Last year, China was the largest market for semiconductor equipment, but Tseng expects continued normalization amid broader market adjustments. Taiwan and South Korea experienced the strongest year-over-year growth, driven by demand for AI chips and high-bandwidth memory (HBM). Material market outlook: Silicon wafer shipments grew strongly in Q2 of 2025, but Tseng flagged this as unexpected and cited tariffs as a possible explanation. He noted the 300mm wafer segment is expected to grow 7% in 2025, while 200mm is projected to decline. The total wafer material market, he said, is also expected to grow by 6% this year. Additionally, wet chemicals experienced a 16% expansion in 2025, while silicon wafers, photolithography materials, and CMP materials are in recovery. Semiconductor Market – Status Outlook Tobias Pröttel (or Proettel), CEO of World Semiconductor Trade Statistics (WSTS), reported that the industry’s rebound remains firmly on track, with the latest WSTS statistics confirming a 19% year-over-year increase in global semiconductor sales during the first half of 2025. Total revenue reached $346 billion over the period, supported by strong demand for AI-driven infrastructure and next-generation data centers. Based on this solid first-half performance, WSTS has raised its full-year 2025 forecast to $728 billion, representing 15% annual growth, and now expects the market to reach around $800 billion in 2026, keeping the industry on course toward the $1 trillion milestone before the decade’s end.Logic and Memory continue to lead the expansion, driven by GPUs, AI accelerators, and high-bandwidth memory (HBM), while other product categories are showing steady recovery after the recent downturn. Pröttel noted that this growth is not confined to a single region: the Americas, China, and Asia Pacific are all posting double-digit gains, reflecting strong global momentum across the semiconductor value chain.Strategic Approaches to Semiconductors by Major Economies Following Pröttel, Kearney’s Vice President, PERLab, Sanjay Kumar outlined the semiconductor investment climates in South Korea, Japan, Taiwan, and India. South Korea is currently focused on maintaining its lead in memory, diversifying into logic, localizing its supply chain, developing advanced packaging capabilities, and investing in startups. Kumar also noted the Korean approach of offering loans, as opposed to the U.S. strategy of providing direct grants. In addition, Kumar said the Korean government plays an active role in how it wants its companies to grow, whereas the U.S. takes a more passive approach in this regard.Japan is also honing its leadership in key areas like materials and memory, and Kumar also pointed to the country’s efforts to build additional advanced packaging capacity. Japan, he said, aims to grow its industry though a mix of grants, loans, and tax credits. Among the country’s notable subsidies include a 50% subsidy for TSMC – its largest so far – as well as a $4 billion subsidy for Rapidus. Taiwan’s semiconductor industry is critical for protecting its national security. As a region with limited land, power, and water, Kumar noted that Taiwan is currently focused on developing its talent base. Its government is offering tax credits for R D and equipment and up to a 50% cost share for R D projects. India, he said, has one of the most ambitious incentive programs in the world. Through its India Semiconductor Mission (ISM), the country offers a 50% federal subsidy, in addition to a 20-30% state subsidy in its quest to cover the entire semiconductor ecosystem. Kumar also spotlighted some of India’s successes – like the joint venture between Renesas, CG Power and Industrial Solutions, and Stars Microelectronics – to build a new OSAT facility.Adapting to New Policy and Navigating the U.S. Semiconductor Landscape – Insights from Taiwan Taiwan is a critical trade partner of the U.S., ranking fourth in total trade volume as of July 2025. With Taiwan’s stronghold on the U.S. chip ecosystem, Paul Poliakov, Senior Manager, International Tax Services, CPA at PwC Taiwan detailed both the bottlenecks and developments regarding Taiwan companies’ investments in the U.S. Among the investment bottlenecks he highlighted were higher costs of building facilities in the U.S., multiple layers of compliance requirements that may be intimidating for new market entrants, and complex visa and tax regulations. In addition, Section 232 investigations on semiconductors are ongoing, with several potential policy changes that could take effect. The pending United States-Taiwan Expedited Double-Tax Relief Act could help ease burdens, he said, but it has yet to pass in the U.S. Senate as of October 2025. If it passes, it will integrate benefits for Taiwanese individuals and businesses into the U.S. tax code, which could substantially benefit Taiwanese investment in the U.S., including manufacturing, services, distribution, and a wide variety of other industries. Furthermore, Poliakov suggested that businesses maintain flexibility in their investment strategies, engage with U.S. state and local governments that can offer investment incentives, and work with professionals to ensure regulatory compliance. Geopolitical Shifts in Advanced Packaging AssemblyIn the final presentation of the 2025 Market Symposium, Jan Vardaman, Founder and President of TechSearch International provided an overview of the current advanced packaging market. Although advanced packaging represents the highest growth area in the industry, Vardaman highlighted that packaging complexity is also soaring. R D, testing, and equipment support infrastructure, she said, are becoming more critical for meeting future packaging needs. Even though assembly is mostly done in Asia, new U.S.-based advanced packaging facilities from Amkor, TSMC, and others represent signs of change. Still, Vardaman noted that the U.S. has almost no capability to produce advanced IC substrates using build-up film, which are needed to support high density applications. In addition, she highlighted that building more silicon fabs on U.S. soil won’t solve its national security or supply chain concerns.For the U.S. to create a sustainable packaging ecosystem, Vardaman concluded that support of assembly facilities is crucial. Ultimately, businesses must be willing to pay more for U.S.-based packaging in favor of potential supply chain resilience and national security benefits. SEMI would like to thank all speakers, sponsors, and attendees for the success of this year’s Market Symposium. Explore the latest SEMI Market Intelligence reports, covering historical reporting, actionable foresight into emerging trends and technology investments to make confident, forward-looking decisions across the semiconductor and microelectronics value chain.Clark Tseng is Senior Director, Market Intelligence Team at SEMI. Nishita Rao is Director, Product Marketing at SEMI.

The semiconductor industry continues to push the boundaries of innovation, making quality management more critical than ever. To address these challenges, SEMI Quality Benchmarking Consortium (QBC) brings together leading companies to share best practices, benchmark performance, and drive collective improvement across the global semiconductor ecosystem.The latest QBC meeting was hosted by Roberto Lissoni of STMicroelectronics at their Agrate site near Milan, Italy. Representatives from Bosch, GlobalFoundries, Infineon, Micron, NXP, and Texas Instruments gathered for two days of deep discussion and knowledge exchange. (From Right to Left) – Roberto Lissoni (STMicroelecetronics), Giorgio Cesana (STMicroelectronics), Fern Yoon (Texas Instruments), Jens Luepke (Infineon), Mark da Silva (SEMI), Kerstin Nocke (Bosch), John Lepper (GlobalFoundries), Bill Lechten (Micron), Lou Cerra (NXP)With over 5,000 employees, ST’s Agrate facility is the company’s largest in Italy, with a strong commitment to innovation through university collaborations. The site includes both 200mm and 300mm wafer fabs, R D centers, and product development teams. STMicroelectronics Agrate, ItalyThe QBC operates on a “Give-to-Get” philosophy: members must actively contribute survey responses and participate in open discussions to access shared benchmarking data. This meeting focused on four topics: zero defect customer satisfaction, safe launch, knowledge management, and organizational comparisons. Participants presented their approaches, shared lessons learned, and engaged in roundtable discussions to identify best-known methods and address common challenges. Zero Defect and Continuous ImprovementParticipants explored the evolving definition of “zero defect,” emphasizing that it’s not about literal perfection, but about meeting customer commitments and requirements. Quality programs are multi-year, cross-functional initiatives, often embedded in broader operational excellence campaigns. Companies leverage KPIs such as parts per million, cost of nonconformance, and customer satisfaction. They tie these metrics to incentive programs and executive reporting. Continuous improvement is driven by Lean, Six Sigma, and employee engagement, with a strong focus on early detection (“shift left”), cross-functional teams, and digital tools for analytics and feedback. Customer Satisfaction and ScorecardsCustomer scorecards and surveys are central to measuring satisfaction, with processes varying by region and account type. Most organizations use a mix of manual and automated systems to collect, review, and act on scorecard data, supplementing these with relationship and transactional surveys. AI and predictive analytics are emerging tools for anticipating customer feedback and improving proactive management, though data security remains a priority. Safe Launch and Risk ManagementThe QBC companies shared decision criteria, risk assessment methodologies (FMEA, TRA), and enhanced control plans for new products and technologies. Cross-functional collaboration is key, with product quality managers accountable for planning and reporting. Digitalization and integration with manufacturing execution systems (MES) are advancing, and there’s growing interest in leveraging AI for risk assessment and process optimization. Knowledge Management and Lessons LearnedKnowledge management remains a challenge, with most companies relying on distributed databases, expert teams, and informal networks. They are piloting structured lessons learned forums, audit systems, and semantic search tools to improve findability and reuse. Effective knowledge management happens when insights are embedded directly into business processes, supported by continuous review and governance. Looking Ahead: AI, Predictive Quality, and ExpansionThe consortium plans to explore topics such as artificial intelligence, predictive quality management, and secure data sharing through dedicated sessions and working groups, with a focus on practical applications and insights from external subject matter experts.Read about the first QBC meeting hosted by Infineon here. Sarah Shen is Senior Coordinator, MEMS Sensors Industry Group at SEMI.

Last month, leading-edge equipment company ASML announced a surprising €1.3 billion investment into French AI company Mistral. The two companies touted stronger collaboration and the desire to “innovate faster together.” Even though some observers were skeptical, the commitment of one European tech champion into an aspiring European tech firm in the world’s hottest industry made plenty of sense. Writing for Bloomberg, columnist Lionel Laurent noted that such a deal was “a win for Europe’s tech ambitions” and that Mistral would have increased credibility in an AI race dominated by the United States and China.Europe’s tech prowess indeed lags behind its global rivals. ASML is, perhaps surprisingly (or not, depending on your vantage point), Europe’s largest tech giant by market cap at $406 billion. Europe boasts no tech goliaths the size of Amazon or NVIDIA and is often left following the lead of American tech firms as they chart the commercialization of new technologies. In the semiconductor industry, Europe’s chip manufacturers comprise only 9% of global market share today compared to 44% in 1990. Despite the bleak reality that Europe’s tech ecosystem finds itself in, there are reasons to believe that the nadir of recent years is slowly giving way to a more robust and respected innovation landscape. This piece will focus specifically on semiconductor manufacturing, demonstrating how Europe is taking its technological future seriously, and how, despite the challenges that remain, ultimately Europe is poised to succeed.Three Shocks – How We Arrived At This MomentThough Europe may not have been satisfied with the technological balance of power of recent decades, such an arrangement was largely tenable in a globalized world which prioritized free markets and international security in the aftermath of the Cold War. Though numerous cracks appeared in previous decades, the last five years in particular have given way to three shocks which have awoken European policymakers.The first, of course, was the COVID pandemic and the decimation of supply chains that caused a rapid seesaw in chip inventories – from extreme shortage to extreme oversupply – that companies in the automotive and industrial sector are just now recovering from. One senior German official was quoted as saying, “We lost 1-1.5% of our GDP in 2021 because of a lack of semiconductors – or about €40 billion.”Only two years later would come Russia’s unthinkable invasion of Ukraine, an unwelcome new reality which has forced Europe to reckon with its defense posture and supply chain. Semiconductors, again, play a key role here – Europe is reliant on China’s legacy chip production, meaning that low-tech chips often find their way into strategic weaponry.Lastly, a second Trump administration has surprised and rallied European governments to respond to “America first” rhetoric. Combined with the aforementioned shocks, recent events have convinced even Europe’s most ardent globalists that the continent must now invest where necessary in order to protect its borders and foster a competitive and sovereign technology ecosystem.The Underwhelming Response So FarFast forward to today where Europe’s COVID supply chain disruptions quickly gave way to ambitious policy in the form of the €43 billion European Chips Act intended to stimulate private investment to complement public capital and push Europe’s chip manufacturing market share to 20%. In the more than two years since the legislation’s passing, however, announced projects have underwhelmed. Big splashes from Intel and Wolfspeed have failed to materialize due to overambitious market expectations. Today, you can almost count the key recipients on one hand – STMicroelectronics, Infineon, TSMC, GlobalFoundries, Silicon Box, and amsOSRAM.Despite the sense of cynicism from some corners, however, understanding the slow progress to this point helps to unlock the right strategies moving forward. Already, many industry stakeholders and policymakers have questioned if attracting manufacturing full stop is the right strategy. Peter Wennink, former CEO of ASML, called the European Commission’s target to secure 20% of the global chip market by 2030 “totally unrealistic,” emphasizing that Europe’s current share is “8% at best.”Even if Wennink’s conclusion is too harsh, the tangible lack of investment over the past couple of years paired with the urgent need for Europe to maintain and grow its semiconductor prowess in response to concerns of security and sovereignty still demands a workable solution. The answer lies in building upon Europe’s very real strengths in the chip industry, narrowing the scope of investment to key strategic areas and in continuing to prioritize collaboration at all costs. How Europe Can Still Meet The MomentAny conversation about Europe’s contributions to the global semiconductor industry should begin with its unparalleled research ecosystem, and there’s no better place to start than with Belgium’s imec, one of the foremost research institutions chip companies depend on. Earlier this year, imec’s President and CEO Luc Van den hove emphatically reminded his audience that “you can’t make an advanced chip without European technology.” Van den hove’s point was that Europe should be leaning into its strengths as a research powerhouse rather than trying to chase leading-edge nodes. The FAMES Pilot Line is one example of what that research prowess looks like in practice. Funded with €830 million via the EU Chips Act, the initiative brings together Europe’s leading research institutions (imec, Fraunhofer, CEA-Leti, and Tyndall) to develop open access to several key microelectronic technologies, with a strong emphasis on low-power applications for markets such as automotive, IoT, and mobile devices. Central to FAMES is its “open access” policy which enables European manufacturers to use its pilot line to develop prototypes and evaluate next-generation technologies. Chip companies without any manufacturing presence in Europe stand on the outside looking in, risking technological inferiority.While Europe flexes its academic prowess, however, it is increasingly recognizing its vulnerability when it comes to more mature-node technologies and production. Investments such as ESMC – TSMC’s joint-venture with regional champions Bosch, Infineon, and NXP – are a good start, but Europe fundamentally needs more mature tech, particularly for defense. In a recent piece for Foreign Affairs Magazine, authors Chris Miller and John Allen argued that Europe indeed has a promising semiconductor opportunity ahead of it, but only if it enhances cooperation with the United States. The fact that the two regions have similar goals and geopolitical rivals is an opportunity for Europe to attract greater chip investment from U.S. firms looking for Europe’s leading research capabilities and defense customers. The authors implore European policymakers to:“ensure that their chip companies can capitalize on the surge in defense spending by investing more in new defense technologies and fostering connections between large chip firms and small defense start-ups. European chip companies that have previously focused on civilian markets must realize that the defense industry, and particularly the drone sector, will drive growth and technological change.”Targeting these investments intelligently remains to be seen, but there can be no doubt that Europe is taking the funding challenge seriously. Germany, France, Italy, and the United Kingdom have all raised their defense spending as a percentage of national income, with Germany announcing plans to double its defense spending to €650 billion over the next five years.Securing Position In Europe's Semiconductor RenaissanceEurope’s semiconductor future will not be built by mimicking Taiwan’s fabrication prowess or outspending America’s subsidies. Instead, success lies in doubling down on what Europe already does exceptionally well – world-class research infrastructure, strategic positioning in mature and specialty nodes, and an increasingly robust defense industrial base hungry for secure semiconductor supply. As European chip subsidies continue and defense budgets surge across the continent and geopolitical fractures deepen, the strategic calculus is clear – semiconductor companies without meaningful European capacity risk ceding ground to competitors who recognized the shift early. The question is no longer whether Europe matters in the global chip ecosystem, but rather which companies will position themselves to capitalize on its inevitable growth.About Stephen M. RothrockStephen Rothrock founded ATREG in 2000 to help the world’s advanced technology companies divest and acquire infrastructure-rich manufacturing assets, including wafer fabs (front- and back-end) as well as MEMS, solar, display, and R D facilities. Over the last 25 years, his firm has completed 40% of all global operational wafer fab sales in the semiconductor industry, a total of 60 transactions. Recent global acquisitions and dispositions have involved Allegro MicroSystems, Bosch, Elmos, Fujitsu, GlobalFoundries, IBM, Infineon, Japan Display (JDI), Micron, NXP, onsemi, Qualcomm, Renesas, Sony, Texas Instruments, and VIS to name just a few. Prior to founding ATREG, Rothrock established Colliers International’s Global Corporate Services initiative and headed the company’s U.S. division based in Seattle, WashBefore that, he worked as Director for Savills International real estate brokerage in London UK, establishing their global corporate services platform serving large multinationals, many of whom were leading technology companies. Rothrock also served on the UK-listed property company’s international board. He spent four years near Paris, France working for an international NGO. Rothrock holds an MA degree from the University of Hull, UK and a BA degree in Business Commerce from the University of Washington in Seattle, USA.