Kitchener, Ontario, July 13, 2022

PEER Group®, the largest supplier of innovative semiconductor factory automation software, is proud to share that two members of its engineering team have been recognized by SEMI during SEMICON West 2022 for contributions they’ve made to the semiconductor industry.

The recipients are Albert Fuchigami, who received the 2022 Leadership Award, and Kristen Matsumoto, who was named among the inaugural SEMICON West 20 Under 30 recognition program. SEMI is the global industry association representing the electronics manufacturing and design supply chain.

Fuchigami, a Senior Software Developer at PEER Group, was presented with the honor during the Standards Awards Ceremony & Networking Event, which took place July 12 during SEMICON West. In a statement provided by SEMI, Fuchigami was chosen for providing “immense value to the SEMI Standards program,” and “through his mentorship, Albert has proven himself to be a true leader and a pillar of the SEMI Standards program.”

“I am honored to receive this award,” shares Fuchigami, who co-leads the SEMI North America Data Diagnostic Acquisition Task Force and contributes to the Information & Control Technical Committee. “Working with the technical committee members in developing standards that drive our industry forward is incredibly rewarding.”

This year marks the first-ever SEMICON West 20 Under 30 recognition program, which honors the industry's brightest young leaders who have demonstrated success in their careers in the microelectronics supply chain.

For Matsumoto, a Senior Quality Assurance Specialist at PEER Group, being part of the cohort of 20 Under 30 winners reaffirms his passion and excitement for working in the semiconductor industry. “I've been incredibly lucky in my career to work on interesting projects with incredible people,” says Matsumoto, while adding: “As the role semiconductors play in our world continues to increase, we're going to have to solve a lot of problems, and do a bunch of really cool science and engineering. It's going to be a fun few decades.”

About PEER Group
PEER Group® is a leading supplier of innovative factory automation software products for the semiconductor industry. Since 1992, our solutions have helped the world’s most advanced OEMs and factories reduce time to market and lower costs by solving their equipment automation, data management, and process control problems. A multi-award winning company, PEER Group has been named a Best Workplace by Great Place to Work Canada 11 times, and most recently was one of six recipients of Intel’s 2022 EPIC Outstanding Supplier Award, which recognizes the absolute top performers in the Intel supply chain. Follow PEER Group on LinkedIn and Twitter at @PEERgroup_Inc..

• Read more about PEER Group employees recognized for contributions to the semiconductor industry

Deventer, July 13, 2022 – RoodMicrotec N.V., a leading independent company for semiconductors supply and quality services, will publish the Company’s first half-year report for 2022 before stock opening on July 21, 2022.

CEO Martin Sallenhag and CFO Arvid Ladega will comment on the report and will respond to questions during the conference call for media, analysts and shareholders on July 21, 2022 at 9:30 CEST.

You are invited to join the Microsoft TEAMS event using the following login instructions:
Join with your computer or mobile app Click here to join the meeting
Or call in (audio only)
+49 69 509544247 Germany, Frankfurt am Main
+31 20 399 9804 The Netherlands, Amsterdam
+32 2 895 09 68 Belgium, Bruxelles
+41 43 217 23 02 Switzerland, Zurich

Find a local number – in case you are in another country
Phone Conference ID: 760 330 187#

About RoodMicrotec
RoodMicrotec is a leading independent company for semiconductor supply and quality services. With more than 50 years of experience in the semiconductor and electronics industry, RoodMicrotec is well-established as a highly valued partner for many companies worldwide. The Company provides full-turnkey ASIC services for complex microchips that are customized to handle specific applications for individual customers. In cooperation with strong partners, RoodMicrotec manages the entire development and production flow of ASICs in the target volume, ranging from low quantities up to multiple millions per year. The turnkey solution includes project management, wafer test, assembly, final test, qualification, failure analysis and logistics. All services comply with the industrial and quality requirements of the high reliability, aerospace, automotive, healthcare and industrial sectors. RoodMicrotec’s headquarter is located in Deventer, Netherlands, with operational units in Nördlingen and Stuttgart, Germany.

For more information visit https://www.roodmicrotec.com

Further information
Martin Sallenhag - CEO, Arvid Ladega - CFO
Telephone: +31 570 745623 Email: [email protected] Web: www.roodmicrotec.com

This press release is published in English only.

• Read more about RoodMicrotec N.V.: Invitation to the presentation of the first half-year’s results for 2022

MRSI Systems (Mycronic Group) is pleased to announce the introduction of MRSI-H-HPLD+, the latest advancement in the MRSI-H/HVM-series product line. This new variant of the successful MRSI-H-HPLD, tailored for high power laser die attachment applications, significantly improves the throughput by using parallel processing while maintaining high accuracy and flexibility. MRSI-H-HPLD+ will be available in the 3rd quarter of 2022.

“MRSI’s die bonders have been widely used over many years by high power laser manufacturers. This new HPLD+ version takes the performance to the next level. This new product continues with our proven track record of providing a combination of ultra-precision, high-speed, and high-flexibility. This is critical for our customers’ high-mix high-volume flexible manufacturing,” said Dr. Yi Qian, Mycronic Group’s Vice President and General Manager for MRSI Systems.

For additional information, please contact:
Dr. Irving Wang
Director of Product Marketing, MRSI Systems, Mycronic Group
Tel: +1 (978) 667 9449, e-mail: [email protected]
Time Zone: ET – Eastern Time

Jennifer Russo
Marketing Manager, MRSI Systems, Mycronic Group
Tel: +1 (978) 495 9731, e-mail: [email protected]
Time Zone: ET – Eastern Time

About MRSI Systems
MRSI Systems (Mycronic Group) is the leading manufacturer of fully automated, high-speed, high-precision and flexible eutectic and epoxy die bonding systems. We offer solutions for research and development, low-to-medium volume production, and high-volume manufacturing of photonic devices such as lasers, detectors, modulators, AOCs, WDM/EML TO-Cans, Optical transceivers, LiDAR, VR/AR, sensors, and optical imaging products. With 30+ years of industry experience and our worldwide local technical support team, we provide the most effective systems and assembly solutions for all packaging levels including chip-on-wafer (CoW), chip-on-carrier (CoC), PCB, and gold-box packaging. For more information visit www.mrsisystems.com

About Mycronic
Mycronic is a Swedish high-tech company engaged in the development, manufacture and marketing of production equipment with high precision and flexibility requirements for the electronics industry. Mycronic’s headquarters are located in Täby, north of Stockholm and the Group has subsidiaries in China, France, Germany, Japan, the Netherlands, Singapore, South Korea, United Kingdom, the United States and Vietnam. Mycronic is listed on Nasdaq Stockholm. www.mycronic.com

• Read more about MRSI launches new Die Bonder with improved throughput for high power laser manufacturers

Sikama International is excited to exhibit at SEMICON West 2022 this July, presenting the innovative Electron Attachment fluxless reflow technology, our upcoming 40th anniversary, and an extensive product line for a broad range of applications providing customers with the highest efficiency, smallest footprint, and most versatility in the industry. Our patented Electron Attachment technology, developed in partnership with AirProducts™, provides unmatched performance offering truly safe and residue-free fluxless reflow. The system is operated with N2 cover gas and an H2/N2 blend with less than 5% hydrogen, ensuring safe operation. The EA UP1200 utilizes an electrically isolated ceramic roller transport mechanism to move the work item from zone-to-zone through the oven. The work item is deoxidized in the EA zones prior to reflow which eliminates the need for flux coating or washing. This technology has shown to be superior to formic acid processes time and time again. In addition, this revolutionary breakthrough offers the safest and lowest cost per wafer yet for the semiconductor packaging industry.

Sikama is looking forward to discussing their full product line at SEMICON West this year. Visit our booth #1447 to learn more and enter to win an iPad Air!

• Read more about Sikama International at SEMICON West 2022 – “Reliable, Repeatable, Responsible Reflow”

Breker Verification Systems, the leading provider of advanced test content synthesis solutions, including RISC-V Cache Coherency, and Codasip, the leading supplier of customizable RISC-V processor IP, today announced an extensive technical collaboration to develop and improve rigorous verification processes for common RISC-V SoC scenarios.

Today’s announcement comes as Breker and Codasip demonstrate their RISC-V SoC verification and processor IP solutions at Design Automation Conference (DAC) in Booth #2528 and #1451, respectively, at Moscone West here.

As RISC-V processor developments extend more into the application processor space, the requirement for high-quality verification techniques that address common SoC scenarios such as cache coherency, security and power management has become critical. Typically, these processes consist of applying a range of algorithms to drive interleaved test content, a largely ad hoc process. Codasip’s and Breker’s core competency in verification can be applied to the industry problem at large to establish a prescribed verification flow for SoC verification to increase the state of the art for the good of the entire RISC-V community.

“As the complexity of RISC-V processors for state-of-the-art systems continues to increase, testing the final SoC to ensure perfect operation in all conditions is both complex and essential,” remarks David Kelf, CEO of Breker Verification Systems. “Codasip’s expertise in this area coupled with Breker’s renowned solutions can be combined to provide a framework for SoC scenarios, such as cache coherency testing, that will bring precision and rigor to this increasingly complex challenge.”

“Codasip is building the highest quality RISC-V processors on the market, and an essential element of this to ensure exacting levels of operation in SoCs that make use of these devices,” notes Melaine Facon, Director Codasip Design Centre (France). “We are investing heavily in verification excellence and are delighted to work with Breker for the good of the entire RISC-V community and industry at large.”

Visit Breker and Codasip at DAC
RISC-V SoC verification and processor IP solutions demonstrations in the Breker and Codasip will be available today through Wednesday, July 13, from 10 a.m. until 6 p.m.
Send email to [email protected] or [email protected] to arrange a meeting or demonstration.

About Codasip
Codasip delivers leading-edge RISC-V processor IP and high-level processor design tools, providing IC designers with all the advantages of the RISC-V open ISA, along with the unique ability to customize the processor IP. As a founding member of RISC-V International and a long-term supplier of LLVM and GNU-based processor solutions, Codasip is committed to open standards for embedded and application processors. Formed in 2014 and headquartered in Munich, Germany, Codasip currently has R&D centers in Europe and sales representatives worldwide. For more information about our products and services, visit www.codasip.com. For more information about RISC-V, visit www.riscv.org.

About Breker Verification Systems
Breker Verification Systems is a leading provider of Portable Stimulus solutions, a standard means to specify verification intent and behaviors reusable across target platforms. It is the first company to introduce graph-based verification and the synthesis of powerful test sets from intent-based, abstract scenario models based on AI planning algorithms. Breker’s Test Suite Synthesis and TrekApp library allows the automated generation of high-coverage, powerful test cases for deployment into a variety of UVM, SoC and Post-Silicon verification environments. Case studies that feature Altera (now Intel), Analog Devices, Broadcom, IBM, Huawei and other companies leveraging Breker’s solutions are available on the Breker website. Breker is privately held and works with leading semiconductor companies worldwide.

Engage with Breker at:
Website: www.brekersystems.com
Twitter: @BrekerSystems
LinkedIn: https://www.linkedin.com/company/breker-verification-systems/
Facebook: https://www.facebook.com/BrekerSystems/

TrekSoC, TrekSoC-Si, TrekBox and SoC Scenario Modeling are registered trademark of Breker Verification Systems. Breker Verification Systems acknowledges trademarks or registered trademarks of other organizations for their respective products.

• Read more about Breker Verification Systems and Codasip Announce Cooperation to Drive Open, Commercial-Grade RISC-V SoC Verification Processes

Oxford, United Kingdom – July 6th, 2022 – Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced a partnership with Breker Verification Systems, a leading provider of advanced test content synthesis solutions for SoC, UVM and Post-Silicon verification environments.

With a combined approach to standards-based verification, development teams will be able to efficiently transition from RISC-V processor functional design verification (DV) right through to system level and SoC integration testing, including automated cache coherency validation.

With the new flexibility offered by the open, standard ISA (Instruction Set Architecture) of RISC-V, SoC developers can now optimize a custom processor for domain specific applications. However, the use of these new RISC-V cores introduces additional system level integration verification challenges.

Together, leveraging their proven expertise in processor simulation and system verification respectively, Imperas and Breker plan to develop interfaces and standards to unify the functional verification design flows to enable DV teams to improve efficiency and verification IP reuse across the complete verification process from plan to silicon prototype.

“RISC-V represents an inflection point for semiconductor verification as the design freedoms provided by the open ISA means an assumption of the responsibility of the processor and system verification task,” said David Kelf, CEO at Breker Verification Systems. “In partnering with Imperas, the leaders in RISC-V processor verification, we can offer a combination of technologies and interface standards for IP and SoC testing that ensures commercial grade verification for these flexible devices right through to the end platform.”

“RISC-V marks the end of the one-size-fits-all approach to processor IP, now all SoC developers can explore new innovations with processor IP configured for the target application,” said Simon Davidmann, CEO at Imperas Software Ltd. “Many of our customers are exploring the design side possibilities of new processor architectures and their implications for SoCs and systems in parallel, extending the verification scope from IP cores to system level integration. With Breker’s proven system verification experience, we are streamlining the critical verification tasks to enable the full potential of RISC-V based devices with commercial-grade verified quality.”

Imperas and Breker at the Design Automation Conference 2022 (DAC 59)
Imperas and Breker will participate at DAC, July 10-14 in San Francisco, California. Please stop by and see the latest developments for RISC-V Verification, see Breker at booth #2528 and Imperas at booths #2336 and also in the OpenHW pavilion at #2340 https://www.dac.com

About Breker
Breker Verification Systems is a leading provider of Portable Stimulus solutions, a standard means to specify verification intent and behaviors reusable across target platforms. It is the first company to introduce graph-based verification and the synthesis of powerful test sets from intent-based, abstract scenario models based on AI planning algorithms. Breker’s Test Suite Synthesis and TrekApp library allows the automated generation of high-coverage, powerful test cases for deployment into a variety of UVM, SoC and Post-Silicon verification environments. Case studies that feature Altera (now Intel), Analog Devices, Broadcom, IBM and other companies leveraging Breker’s solutions are available on the Breker website at https://brekersystems.com.

About Imperas
Imperas is the leading provider of RISC-V processor models, hardware design verification solutions, and virtual prototypes for software simulation. Imperas, along with Open Virtual Platforms (OVP), promotes open-source model availability for a spectrum of processors, IP vendors, CPU architectures, system IP and reference platform models of processors and systems ranging from simple single core bare metal platforms to full heterogeneous multicore systems booting SMP Linux. All models are available from Imperas at www.imperas.com and the Open Virtual Platforms (OVP) website at www.OVPworld.org.

For more information about Imperas, please see www.imperas.com. Follow Imperas on LinkedIn, twitter @ImperasSoftware and YouTube.

• Read more about Imperas Announces Partnership with Breker to Drive Rigorous Processor-to-System Level Verification for RISC-V

Yield Engineering Systems, Inc. (YES), a leading manufacturer of process equipment for semiconductor advanced packaging, life sciences, and “More-than-Moore” applications, today announced that it has promoted Dan O’Connell to Vice President of Strategic Accounts.

Mr. O’Connell joined YES in November of 2021 as Senior Director of Key Account Management. In his newly expanded role, he will work closely with the company’s Sales, Marketing and Technology teams to nurture strategic customer relationships and ensure YES’s alignment with current and future customer technology requirements.

“Dan’s extensive strategic account experience in the semiconductor industry has contributed to our rapid growth,” said Rezwan Lateef, President of YES. “His proven ability to develop strong industry relationships aimed at enabling technology roadmaps, coupled with his intimate knowledge of Advanced Packaging processes, make Dan a valued addition to our senior leadership team.”

Prior to joining YES, Mr. O’Connell held senior key account management positions of increasing responsibility at ASM Pacific Technology Ltd., Tokyo Electron (TEL), LAM/Novellus, and Ebara. He holds a bachelor’s degree in Chemical Engineering from Worcester Polytechnic Institute.

About YES
Yield Engineering Systems, Inc. (YES) is a preferred provider of high-tech, cost-effective equipment for enhancing surfaces and materials. The company’s product lines include thermal processing systems, chemical vapor deposition (CVD) systems, and wet process equipment used for the precise surface modification of semiconductor substrates, semiconductor and MEMS devices, LED displays, and biodevices. Customers ranging from startups to Fortune 100 companies rely on YES systems to create and volume-produce innovative products in a wide range of markets. YES is headquartered in Fremont, California, with a growing global presence. For more information, please visit yieldengineering.com.

• Read more about YES Names Dan O’Connell as Vice President of Strategic Accounts

Breker Verification Systems, the leading provider of advanced test content synthesis solutions, including RISC-V Cache Coherency and other SoC integration Verification Intellectual Property (VIP) in the “TrekApps” family, today joined RISC-V International (RVI) as a strategic member.

Breker will offer its expertise in SoC verification solutions to the RVI working groups.

“As the complexity of RISC-V processors for state-of-the-art systems continues to increase, rigorous commercial verification has become paramount,” remarks Calista Redmond, CEO of RISC-V International, the non-profit organization that maintains RISC-V as a free and open processor instruction set architecture (ISA). “Breker’s proven expertise and insights in this area are invaluable to enable the industry to address these challenges.”

Breker is known for its leadership in test content synthesis that leverages C++ and the Accellera Portable Stimulus Standard (PSS) specification models for UVM and SoC applications. It provides a portfolio of TrekApps that generates high-coverage, optimized tests to address common verification scenarios, including Cache Coherency, Security, Power Domain Management, Packet Generation, and the integration of ARM and RISC-V processors. Breker’s portfolio, in use at many leading semiconductor companies, is directly applicable to RISC-V SoCs, and invaluable to both processor developers driving quality and end-users looking to increase confidence in integrated devices.

“RISC-V International has revolutionized the semiconductor industry, and we are now seeing the result of this in widespread industry activity and at many of our semiconductor customers,” notes David Kelf, Breker’s CEO. “Rigorous, commercial verification is now critical for the ongoing success of RISC-V and Breker is committed to work with the organization to provide such solutions.”
Breker became a member to influence the development of a cache coherency and integration test content platform for RISC-V processor development and end-use verification. With the RISC-V ISA leveraged in greater numbers of advanced, application processors, this type of platform offers critical test functionality for many RISC-V stakeholders.

Breker at Design Automation Conference
Breker will demonstrate its System Coherency Synthesis TrekApp and other solutions at Design Automation Conference (DAC) in Booth #2528 (Second floor) Monday, July 11, through Wednesday, July 13, from 10 a.m. until 6 p.m. at the Moscone West in San Francisco.
Send email to [email protected] to arrange a meeting or demonstration.

About Breker Verification Systems
Breker Verification Systems is a leading provider of Portable Stimulus solutions, a standard means to specify verification intent and behaviors reusable across target platforms. It is the first company to introduce graph-based verification and the synthesis of powerful test sets from intent-based, abstract scenario models based on AI planning algorithms. Breker’s Test Suite Synthesis and TrekApp library allows the automated generation of high-coverage, powerful test cases for deployment into a variety of UVM, SoC and Post-Silicon verification environments. Case studies that feature Altera (now Intel), Analog Devices, Broadcom, IBM, Huawei and other companies leveraging Breker’s solutions are available on the Breker website. Breker is privately held and works with leading semiconductor companies worldwide.

Engage with Breker at:
Website: www.brekersystems.com
Twitter: @BrekerSystems
LinkedIn: https://www.linkedin.com/company/breker-verification-systems/
Facebook: https://www.facebook.com/BrekerSystems/

• Read more about Breker Verification Systems Joins RISC-V International as a Strategic Member to Drive Cache Coherency and SoC Integration Verification Methodologies

Primarius Technologies will unveil its flexible and scalable design environment for custom memory and analog/mixed-signal IC design and new circuit simulation and design enablement solutions during the Design Automation Conference (DAC) July 11-13 at Moscone Center in San Francisco.

Demonstrations will feature Primarius’ NanoDesigner™, a full custom design platform; SDEP™, an innovative spec-driven modeling automation platform; PCellLab™, a PDK parameterized cell library development platform; NanoCell™, a standard cell library characterization solution; and 9812AC, the first commercial AC dynamic noise measurement system.

Other demonstrations will highlight products such as an all-in-one semiconductor parameter analyzer FS-Pro™, and a portfolio of solutions for SPICE model, process design kit (PDK) and standard cell library verification including ME-Pro™, PQLab™ and LibWiz™.

New Additions to Primarius Product Portfolio
Primarius is committed to delivering innovative data-driven design technology co-optimization (DTCO) EDA solutions powered by leading-edge SPICE/FastSPICE simulation technologies, shortening time to market and improving yield, power, performance and area of circuit designs at advanced process nodes.

Its DTCO solutions such as SDEP, PCellLab, NanoCell and FS-Pro reduce the iteration cycle from process technology development to IC design for models, PDKs and standard cell development products available from Primarius.

NanoDesigner provides an extendable and flexible design environment with schematic entry, layout editing and in-design physical verification that supports full-custom memory and analog/mixed-signal designs. It integrates with NanoSpice, Primarius’ circuit simulator series that offer the full spectrum of circuit simulation capabilities including high-performance parallel SPICE to an adaptive dual-simulation engine FastSPICE. Both offer more accurate and faster results than traditional SPICE and FastSPICE. NanoDesigner’s expanded capabilities cover mixed-signal verification, aging, EM/IR, random telegraph noise (RTN) and high Sigma yield analysis.
PCellLab, a user-friendly automated standard Pcell library development tool, pairs with PQLab, a PDK-quality verification platform, to form a complete solution for PCell generation and verification.

Primarius’ new NanoCell, a solution used for standard cell library characterization, and LibWiz, a user-friendly GUI to qualify libraries, combine for a standard cell library characterization and qualification solution.

And finally, 9812AC is the first commercial low-frequency dynamic noise measurement system. It has superior capabilities and versatility for measuring low-frequency noise characteristics of semiconductor devices over a wide range of bias voltage and excitation frequencies.

More Products in the Primarius Portfolio
SDEP, an innovative model development platform designed to tackle advanced SPICE modeling challenges, provides a system to retain and receive device modeling expertise and build automated flows for different process platforms and applications with intelligent target-oriented algorithms. It has a built-in parallel SPICE simulation engine for fast performance and includes rich data analysis and validation utilities, powerful parameter control and optimization functions and flow automation features.

FS-Pro is an all-in-one parametric analyzer used with semiconductor device DC/AC, reliability and statistical measurement solutions.

At 2022 Design Automation Conference
Primarius Technologies will exhibit at DAC Booth #1419 (First floor) Monday, July 11, through Wednesday, July 13, from 10 a.m. until 6 p.m. at the Moscone Center in San Francisco.

To arrange a meeting or demonstration of the Primarius Technologies product portfolio, send email to: [email protected].

About Primarius
Primarius Technologies (688206.SH) is a global electronic design automation (EDA) company. It delivers the semiconductor industry’s leading design enablement technologies for advanced SPICE modeling, PDK generation and standard cell library characterizations, and a complete design technology co-optimization (DTCO)-enabled custom design flow for complex memory, analog and mixed-signal designs. Powered by leading-edge SPICE/FastSPICE simulation technologies, Primarius is committed to delivering innovative DTCO solutions. Its mission is to shorten time to market and improve yield, power, performance and area of circuit designs at advanced process nodes. Primarius’ unique data-driven EDA solutions are supported by a full range of semiconductor parametric testing systems and the industry’s golden low-frequency noise testing systems. Visit Primarius Technologies for more information.

• Read more about Primarius Unveils Custom Design Environment, Circuit Simulation and Design Enablement Solutions at DAC

The global demand for computer chips is so high that existing product capacities can’t keep up. Therefore, unscheduled production downtime in Semiconductor fabs, must be avoided at any cost. Busch Vacuum Solutions developed a new service concept that ensures the availability of the vacuum supply, which plays an essential role in the semiconductor production process. This new service helps avoid unpredictable downtime and even makes it possible to reduce the overall operational costs by up to 35%.

The top priority given to all suppliers in the semiconductor and flat-panel market is the reduction of unscheduled downtime. In response, Busch Vacuum Solutions developed the unique vacuum pump remanufacturing service ARPQP (Advanced Remanufacture Product Quality Planning). The new service follows the four core principles of the world-class automotive standards of APQP in remanufacturing vacuum pumps. Following these principles is considered the highest standard for safe, efficient, reliable, and optimized manufacturing. ARPQP represents a new level of reliability for customers and focuses on advanced thinking and preemptive action for prevention. Busch is the first company in the field of vacuum technology to have embraced this standard. Vacuum pumps are remanufactured to automotive quality standards.

ARPQP has already proven to be successful among many Busch customers. The reasons why customers decide to use ARPQP vary. Yet, they all have the same objectives: avoid unscheduled downtime and improve performance. Their experiences after a few months are convincing. In all fabs, the failure rate for all types of vacuum pumps has decreased. One of the biggest Semiconductor manufacturers in the world experienced a 35% reduction in vacuum pump exchanges per year after implementing ARPQP for the entire installed base of vacuum pumps. This improvement led to a 7% increased production equipment availability, which is key when the loading of the Fab is already 100%.

About Busch Vacuum Solutions
Busch Vacuum Solutions USA sales and manufacturing headquarters is in Virginia Beach, VA where a team of 500 dedicated employees takes care of all their customer’s industrial vacuum needs. Busch USA is part of the global Busch Vacuum Solutions family owned company with over 3500 employees in more than 40 countries.

For more information about Busch: www.buschusa.com

• Read more about Avoid Unscheduled Downtime in Semicon Fabs with Preventive Vacuum Service