For the second straight year, SEMICON China, among the world’s largest and most influential semiconductor industry events, was the first local tradeshow of its scale held in-person, reflecting China’s rising prominence in the semiconductor industry. After securing approval from the Chinese government to hold large events, SEMI staged SEMICON China 2020 and 2021 with advanced protections against COVID-19 in place. There were no reported infections at either event. Highlights from SEMICON China 2021: Large Scale: Attendance of over 92,000, including more than 66,000 visitors and 25,000 exhibitors. Expo hall totaled 84,500 square meters with about 1,100 exhibiting companies and over 4,000 booths. World-Class Thought Leaders: Strong industry support from key foundries, OSATs, equipment and materials suppliers. Keynote speeches featured world-class industry leaders and head of China’s IC industry fund and global investment consulting agency, who explored the latest global business, technology and market trends and hot domestic investment topics. Concurrent Forums: Forums included SIIP China: SEMI Innovation Investment; Smart Manufacturing; Advanced Manufacturing; Advanced Packaging; Memory; Power Compound Semiconductor; China Display Conference; the all-new Advanced Materials Forum; and China Semiconductor Technology International Conference (CSTIC). Rich Digital Content: SEMICON China’s digital platform provided a rich array of content to attendees around the world including the Grand Opening Keynote and CSTIC, which were broadcast live online. Workforce Development: SEMI China worked closely with industry and government partners to promote SEMI Workforce Development programs to help attract and retain talent for China’s semiconductor industry. SEMICON China again featured the SEMI Workforce Pavilion and SEMI Workforce CXO Talent Forum. Outstanding COVID-19 Protective Measures: SEMICON China deployed advanced testing and monitoring equipment and implemented strict COVID-19 preventative measures to ensure a safe environment for all attendees to network and conduct business. Looking Ahead With the resounding success of SEMICON China 2021, optimism is growing that more physical events will be held with travel restrictions set to ease later this year. The more than 2,500 SEMI members around the world are eager to again network and collaborate face-to-face with customers, suppliers and partners to solve challenges in the microelectronics industry and drive semiconductor innovation that continues to transform how we work and live. That very innovation made many businesses more resilient as the virus spread and enabled people worldwide to work, learn, and shop from home. As SEMI starts to stage other events in-person, we will put in place advanced protective measures against COVID-19 to ensure the safety and well-being of all attendees. As the vaccination roll-out continues worldwide and new COVID-19 strains emerge, SEMI’s flagship SEMICON events are evolving in several ways, most notably with a larger digital presence. In this new era, we offer an international platform for SEMI members and partners across the microelectronics supply chain to collaborate, discuss industry trends, solve common challenges, network, and accelerate business growth through physical, virtual, and hybrid formats. Hybrid events – on-site exhibitions and conferences featuring a digital presence – allow the face-to-face connections so important to the semiconductor industry but also improve the attendee experience by offering an online option with the following benefits: More international accessibility to content live or on-demand Robust interactivity with live-streamed events, allowing more people to participate Greater cost effectiveness to enable companies and people under tight budgets to take advantage of world-class content, including keynote presentations, panel discussions, and technical sessions. In a recent survey of advanced manufacturing businesses, Informa Markets, a multinational publishing, business intelligence, and exhibitions group, found that 93% of respondents are likely to return to in-person events between August and December 2021, signaling a widespread eagerness for the return of live events and face-to-face connections. SEMICONs Scheduled for 2021 In a normal year, each of the seven regions where SEMI operates stages a SEMICON, with the exhibitions spread throughout the year. With the world continuing to combat COVID-19, more SEMICONs have been moved to the second half of 2021 – most of them with a hybrid format so exhibitors and attendees can take advantage of the increasing popularity of online events. After last year’s disruptions to the SEMICON schedule – and with more experience in the new normal – SEMI is excited to welcome the businesses and peers who couldn’t attend the 2020 events back to the in-person and hybrid shows. Innovation never sleeps. And SEMI will continue to evolve its events to help you form the partnerships and make the connections vital to the growth of your company and the industry. For more information about regional SEMICONs, please visit the SEMI events page. About the Author David Ghodsizadeh is the Director of Global Product Marketing at SEMI, where he develops customer-centric strategies to market SEMI Membership, Market Data, Expositions, Smart Initiatives, and Technology Communities to members, partners, and industry peers. Connect with David on LinkedIn.

Traditionally, defect classification is done manually by operators or using Automated Optical Inspection (AOI) machines, often leading to classification inconsistencies. Also, rules-based AOIs may at times be unable to fully satisfy project requirements due to the rigidity of inspection recipes. SixSense – Breaking the Status Quo with Artificial Intelligence Enter SixSense, an AI-powered defect classification software platform that has been making breakthroughs in defect detection and classification for semiconductors to make manufacturing smarter and more efficient. Founded in 2018, SixSense has already amassed a wealth of experience and chalked up a number of successes such as automating the manual image classification process, reducing manufacturing false rejects, and capturing escapees. Infineon Technologies and GlobalFoundries were amongst the early adopters of SixSense’s platform: classifAI. With Infineon, classifAI has allowed over-rejection rates to be precisely quantified. classifAI – Simple UI, Easy Usage, Powerful Models As a UI-based assistive software platform, classifAI, SixSense’s automated defect classification platform is built with the defect and yield engineer in mind. SixSense takes care of all the back-end complexities – such as coding, algorithm modelling and deployment – to enable end users to get started and use the platform with a simple GUI. The simplified end-to-end AI pipeline offered on the platform includes data labelling to make data AI-ready, model training, and model testing. Ultimately, models are deployed on the production floor for 24/7 inferencing of hundreds of millions of images every year, at scale, across processes, tools and sites. Machine learning models built by the SixSense team have seen strong results, with model accuracy of up to 98% in certain use cases. Track Record of delighting IDMs, Foundries and OSAT Customers SixSense has consistently solved visual inspection problems and enabled the success of IDMs, foundries and OSATs since its inception. The AI technology has helped a range of customers across 100mm-300mm wafer standards, both pure silicon and compound wafers, and caters to specific end-use market requirements such as RF and automotive. Partnerships between startups and established manufacturers are key to actualizing the value of AI in manufacturing. “Our collaboration with AI startup SixSense has enabled us to explore opportunities in yield gain, improving cycle time, and real-time monitoring of process shifts,” said Dato’ Tan Soo Hee, Executive Vice President, Global Backend Operations at Infineon Technologies Asia Pacific. “SixSense has been very attentive to the needs of our engineering team, addressing project requirements using a customer-first approach evident in the design of the intuitive software platform,” said Melvyn Peh, Principal Engineer, Automation-Scan-Pack, Infineon Technologies Asia Pacific. The intelligent annotation module is one of many offered by SixSense, which uses AI to train AI and accelerate the data annotation process by focusing on the semiconductor-specific requirements. Another valuable module in classifAI is advanced analytics that capture the heatmap for defect distribution on the images. Images are stacked on top of each other, with the location of defects aggregated to provide the defect heatmap. Through this, systematic failure patterns were identified that allowed defect engineers to zero in on key sources of failure and assist in root-cause analysis. Infrastructure – Scale Fast, Adapt Quickly, Accelerate Value Creation In the dynamic world of technology, machine learning and AI projects must meet changing infrastructure demands. A cloud-first approach is often favored for the plethora of benefits it offers. “We’re looking forward to a great partnership with SixSense, treading together hand in hand exploring fresh ideas and possibilities,” said Manju Jalali, Vice President of digital manufacturing at GlobalFoundries, who oversees the company-wide roll out of classifAI. For use cases where on-premise deployments are preferred, SixSense offers such options for infrastructure integration, satisfying all possible infrastructure requirements in the market. Contributing to a vibrant innovation ecosystem SixSense was mentioned by Singapore’s Deputy Prime Minister Heng Swee Keat during an event that marked Infineon’s 50th anniversary in Singapore: “I am heartened that Infineon will be investing more than $27 million over three years on an AI initiative in Singapore. Under this initiative, Infineon Singapore will be partnering academia, industry, and local startup SixSense AI to develop new AI solutions and courses.” Explosive Growth of AI in Chip Manufacturing According to a McKinsey Company report, AI contribution to semiconductor company earnings is projected to rise to between $85 billion and $95 billion per year in the coming years. SixSense has been taking great strides in creating value for their semiconductor customers. “SixSense offers tremendous value in a high-growth vertical in the semiconductor industry, marrying the latest deep learning algorithm with the compute power of the cloud,” said Rajan Rajgopal, CEO of DenseLight Semiconductor. “This leads to faster root-cause analysis that helps reduce the cost of non-conformance and improve quality.” Dominic Teo is Enterprise Business Development Representative at SixSense. He can be reached at [email protected].

What does it mean to identify as LGBTQIA+ in the semiconductor industry? It’s an interesting question to ask, but a difficult one to answer. Because we live in a world in which cisgender heteronormity is assumed, it’s possible to self-identify as LGBTQIA+ without sharing that information publicly. Coworkers and managers might not even realize that their colleague or employee is gay, lesbian, transgender, non-binary or other. Unlike other minorities, notably people of color, LGBTQIA+ people may choose to keep their identities invisible.As I began outreach for this article, I recognized that some people might not want to expose a potential vulnerability to both their co-workers and a broader global audience of SEMI members, so I tried to make them feel more comfortable. I told them I’m a lesbian. I said that I’d send content for their review before publishing. But I quickly discovered that wasn’t enough, despite sweeping cultural and legal advances around LGBTQIA+ attitudes and identity. According to a 2020 Gallup Poll, 5.6% of U.S. adults now identify as LGBTQIA+, up from 4.5% just three years ago. In 2004, Massachusetts became the first U.S. state to legalize same-sex marriage, and in 2015, the U.S. Supreme Court made same-sex marriage legal in all 50 states. The semiconductor industry has been historically conservative. The times, however, are changing. Large chip companies such as AMD, Intel and Lam Research actively support diversity and inclusion efforts across minority groups, including LGBTQIA+, and that’s a good thing, but is it enough? And if not, what actions can SEMI members take to help LGBTQIA+ people in semiconductors feel safe enough to choose visibility?According to Antoinette Hamilton, global head of Inclusion and Diversity at Lam Research, more than 46% of LGBTQIA+ employees in the industry aren’t out in the workplace. That tells us there’s still work to be done, a challenge that Lam is embracing. With its Pride employee resource group (ERG) leading the way, partnerships with organizations such as PFLAG and Out Equal, and recruitment efforts made through organizations such as Out in Science, Technology, Engineering, and Mathematics (oSTEM), Lam has earned a score of 100 on the Human Rights Campaign Foundation’s Corporate Equality Index and was named one of the Best Places to Work for LGBTQ Equality.“At Lam, we understand the importance of empowering employees to bring their authentic self to work,” says Hamilton. “We believe when employees feel valued and included, each person can reach their full potential.”Back in 1992 when Intel paid to relocate Judi Goldstein, her partner and their son from New Jersey to Oregon, mainstream cultural attitudes toward gays and lesbians were very different. According to a June 1992 Gallup poll, only 48% of Americans thought that “gay or lesbian relations between consenting adults should be legal,” with 44% saying they should be illegal. A May 2020 Gallup poll recorded a dramatic shift in attitudes, with 72% affirming the legality of same-sex relations and only 24% opposed.By the late 1990s, Intel had extended domestic partner benefits to same-sex couples. “I registered my partner – now my wife – and our son, and realized that from then on, my whole family would have health insurance through Intel,” says Goldstein, who identifies as a gay woman and uses she/her pronouns. “Both relocating my family and providing family health coverage solidified my attachment to Intel, which was way ahead of other companies at the time.”By 1995, Goldstein became one of the first members of IGLOBE, Intel’s ERG for LGBTQ+ employees. Since that time, she’s observed further progress at Intel, first with the addition of gender identity and expression to Intel’s anti-harassment policy, and later with the inclusion of gender-neutral bathrooms at all major US sites. And advancement didn’t stop there.“We now have international IGLOBE chapters, a celebration of Pride Month in June, company support for the Equality Act and other legislation, a provision for transgender health benefits, and the launch of Self-ID efforts in 2017,” she says.From her start as software engineer more than 32 years ago to her current positions as director of the Open Source Audio and Security Engineering teams, Goldstein has played an instrumental role pioneering new technologies and mentoring other engineers at Intel – in addition to serving as a role model for LGBTQIA+ employees coming through the ranks. Now a grandmother with a five-year-old granddaughter, Goldstein lives in Oregon with her wife of more than 30 and two dogs. Location, Location, LocationAs social animals, we tend to value safe and welcoming places to live. When you’re LGBTQIA+, this may mean moving to an urban area that is more likely to embrace diverse orientations and cultures.After getting his master’s in astrophysics, Chuck Chung had a decision to make. Remain in the same field, which would limit his options on where to live, or get a doctorate in engineering, which would expand them.“In the ‘90s when I was making this choice, things were very different, and I knew that where I worked and lived would have a huge impact on how open I could be,” said Chung. “While I would have loved a career in astrophysics, I realized that engineering would be a more practical choice because I was more likely to find work in a city.”Both personally and professionally, engineering has proved a good choice for Chung. He’s lived in San Francisco and Silicon Valley for the past 18 years, where being out in the workplace is rarely an issue. “I compartmentalize my personal and professional lives when necessary, such as when business colleagues who are overseas talk about their families in casual conversation. Most of the time, though, my identity as a gay man is a non-issue, and I work for a company that really cares.”From his pioneering work in MEMS and genetic sequencing to his current focus on the next generation of microarchitectures at IBM, Chung has long thrived. Now, with a new book on MEMS Product Development – co-authored with two other Ph.D.’s, Alissa Fitzgerald and Carolyn White of A.M. Fitzgerald Associates – the best days of Chung’s career may still be ahead of him. He lives in the Bay area with his husband and their two children.Kunal Garg’s identity didn’t influence his career choices because when he started in semiconductors, he wasn’t out to himself or others. A few years into his engineering career at his former company, Garg realized his identity as a gay man at a time when the national discussion about same-sex marriage was at its apex – leading to some uncomfortable situations at work. “As some of my colleagues and managers openly debated same-sex marriage, they seemed oblivious to the fact that there were LGBTQIA+ people at work,” says Garg. “I knew then that I wanted to steer such conversations in a way that would feel safe and inviting for people like me, who work in this industry while being true to their identities.”Once he’d come out to his family and friends, particularly after he married his husband, Garg wasn’t willing to stay silent at work. “Although it took courage and internal struggle to come out to colleagues, my identity as a gay man wasn’t something I wanted to hide or deny anymore,” he says. “Some people laughed when I mentioned my ‘husband.’ The idea that their colleague, an engineer, an Indian immigrant, a man, could be gay and married to another guy was so foreign, it was almost laughable. Luckily, this didn’t stop me from being myself at work, and over time, these types of conversations became very rare.”Nonetheless, Garg looked around for ways to be part of the LGBTQIA+ engineering community. When he moved to AMD in Austin, he wanted to start with a clean slate. “When my manager called to invite me to join his team at AMD, I casually brought up the fact that my husband was going to need to start looking for a new job in Austin. And, very casually, he asked me what my husband did for a living, and we went on to discuss how Austin would be a great city for us to live in,” says Garg. “The fact that this was such a normal conversation was a big factor in my decision to join AMD.”Soon after starting as a design engineer at AMD, Garg found that LGBTQIA+ engineering community for which he’d been searching. He joined AMD’s Pride ERG, a group that he now chairs. “Being a part of this ERG has been transformational for me on a personal level and has allowed me to connect with my fellow engineers and people in my industry, beyond our mutual love for science and technology.”Become a change agentWhile some chip companies actively promote inclusion and diversity of LGBTQIA+ employees, others still have a long way to go. SEMI and the SEMI Foundation are uniquely positioned to help advance LGBTQIA+ equity issues in the microelectronics industry. "The SEMI Foundation is committed to promoting Diversity, Equity, and Inclusion (DEI) in our industry for the benefit of our workers and our member companies,” says Shari Liss, executive director of the SEMI Foundation. “We are designing programs for human resources departments, company leaders, and DEI allies to make the case for stronger DEI practices that will attract, retain, and promote LGBTQIA+ individuals and other underrepresented groups in our industry. We will soon publish SEMI's Roadmap to Diversity, Equity, and Inclusion and DEI Toolkit, which will contain tools to help companies strengthen their workplace cultures so everyone – including those that identify as LGBTQIA+ – will feel welcome, and will be able to do their best work."“If we want to truly see the semiconductor industry flourish on a global level, we need to push for equitable treatment of LGBTQIA+ and other minority employees,” says Garg. “SEMI can help by educating industry leaders, especially in countries outside North America and Europe, on how diversity and inclusion through policy are vital to their sustained productivity. These workshops and trainings should be data-driven to encourage companies to hire more LGBTQIA+ employees and to create policies that promote the well-being of all employees.”It’s not just at the company level or the industry association level that matters. Just as individuals are necessary change agents in proliferating greater equity among women and people of color, they’re also needed as allies of LGBTQIA+ people.“Like so many of us, I’d love to wave a magic wand to end discrimination based on gender identity or sexual orientation, but like any cultural shift, most change comes in small steps, not in giant leaps,” said Karen Lightman, executive director, Metro21: Smart Cities Institute – Carnegie Mellon University. “Fortunately, it’s easy to help make those small steps by becoming an ally to LGBTQIA+-identified people. When you see an injustice, don’t stay silent. Use your voice. There’s transformative power in that act alone. As one step, I’ve started using my pronouns when I introduce myself and now include them in my digital signature. It’s an easy way for me to express that I am an ally to LGBTQIA+-identified people.”Help us make the change. Use your voice. Get involved. Encourage your company to advocate for LGBTQIA+ inclusion and diversity.Maria Vetrano, principal of Vetrano Communications, is a PR consultant at SEMI Foundation.

Adnan Hamid, CEO, founder and visionary of Breker Verification Systems, an ESD Alliance member based in San Jose, Calif., once described his job in chip design verification at AMD as “breaking things.” When it came to naming his startup, Breaker was a natural choice. After some consideration, the “a” was dropped and the company became Breker. Now Hamid is breaking the most complex semiconductor designs and Breker, moving from a startup to a scale-up company, is a noted part of the functional verification space. Smith: Why does verification continue to take the most amount of time in a project cycle? Hamid: The project cycle for semiconductor design has changed. Design abstraction has been raised to a much higher level than the days when developers were connecting logic gates. Today’s developers are typing functions that don’t include lower-level implementation details. Designs incorporate more blocks of reusable IP. Both reduce design time. Meanwhile, designs are getting bigger with more blocks of IP stitched together, all in need of testing. As design complexity grows, the amount of testing and verification increases as a square of design effort. One block requires one functional verification effort. Four blocks of IP mean up to 16 functional interactions require verification. While design is moving up the abstraction level, that’s not the case for verification, where plenty of detail must be reimplemented. Verification has certainly evolved, but engineers still think at the level of independent stimulus, response and coverage, driving the need to allocate so much time for verification. Smith: Are chips targeting artificial intelligence and machine learning applications more difficult to verify? If so, why? Hamid: Yes, absolutely and it’s an interesting challenge, especially given that machine learning is based on massively connected processing element arrays. Attempting to verify the individual processing elements and the critical interconnects is complex. AI device arrays and, interestingly, verification test content operation may both be thought of as a mathematical graph of processing elements and interconnect. Their operation involves walking through the graph form to generate a result. Finding the optimum path through these arrays is key. To understand how these systems may be effectively verified, it is worth investigating planning algorithms. Originally proposed by IBM, these hold the key to this type of verification process. The AI- style algorithm starts backward at the end of the processing element array and tracks down the most optimal and likely paths through it. At Breker, we have used these planning algorithms extensively to drive our graph-based test content synthesis process. Smith: Does system integration require verification? Hamid: Yes, it does. In the past, most functional verification has been performed at the block level. However, with the increase in more specialized SoCs, functionality is spread across multiple blocks, as well as the software running on the processors, driving full system-on-chip (SoC) functional verification. In addition, new requirements such as security and safety must be validated. A system-level infrastructure such as cache coherency and power domain execution has become more complex and these must also be tested. The new frontier in verification is ensuring a fully operational SoC. Of course, given the size of these SoCs, hardware-assisted verification such as emulation is essential, and porting tests from block simulations to SoC emulations has become a requirement. This porting process is problematic and this in turn has driven portable tests, giving rise to the idea behind Accellera’s Portable Stimulus Standard (PSS), of which Breker was a major participant. Indeed, some companies are taking this to the next level by composing their system-level testbench at the same time as they commence SoC architectural design, and then developing the hardware design, software design and test content all in parallel, in the so-called “shift-left” manner. Smith: Is “shift-left” a growing trend that are you seeing in verification? Hamid: Yes. Shift-left is taking hold in hardware and software design, giving way to an increase in early test content composition. Then as individual blocks are finished and connected, their verification is driven from this same test content, saving a significant amount of time and effort. This is a huge verification and test generation change that was inevitable given the increased time-to-market constraints and SoC complexity. Figure 1: Shift-left is ushering in the next generation of SoC verification. Source: Breker Smith: As an entrepreneur, what advice would you give someone founding a startup or thinking about starting one? Hamid: Do not take the attitude “Build it and they will come.” My best advice for an entrepreneur or fledgling entrepreneur is to solve a specific customer problem, however narrow it might seem. Including services as part of a product offering and developing partnerships with other vendors helps with this and turns your company into a solution provider not a product developer. This is essential for getting the right products to market on time and within budget, and then ultimately scaling them across the market. The ESD Alliance and Accellera are hosting a two-part webcast series on the work-from-home experience titled Remote Work, Remote Chip Design: Building Chips During a Pandemic. The first panel, Wednesday, June 9, at 9:00am PDT, will feature a discussion led by Tom Fitzpatrick, strategic verification architect from Siemens EDA verification engineers through their experiences converting their home offices into verification test labs. The second panel in July will explore how executives managed a remote workforce and explain how they plan to bring employees back to physical offices. About Bob Smith Robert (Bob) Smith is executive director of the ESD Alliance, a SEMI Technology Community. He is responsible for the management and operations of the ESD Alliance, an international association of companies providing goods and services throughout the semiconductor design ecosystem.

“The most important work you can do in the coming year is to start engaging allies.” This is how Dr. Joanne Kamens, Executive Director of Addgene, began her keynote at this year’s Women in Semiconductors (WiS) program in early May. Diversity and inclusion challenges in the workplace are not a “woman problem, they’re a people problem,” she noted.After a one-year hiatus due to COVID-19, WiS reconvened in a virtual format. Dr. Kamens, who has been working on diversity and inclusion efforts for two decades, discussed how the events of the last 14 months continue to impact women disproportionately. In addition to setting the stage for breakout topics following her presentation, Dr. Kamens’ keynote, Driving Change for Inclusion: The Leaders You Want and Want to Be, addressed the underlying issues that prevent not only women but under-represented and under-recognized groups from advancing in STEM fields.Why now? Dr. Kamens pointed to the perfect storm of social and racial events over the last several years in addition to getting a view into each other’s personal lives because of work from home – babies on Zoom, cats interrupting Microsoft Teams meetings – that has exposed our humanity. The most important take-home message from her presentation? “People are people. They’re your most valuable resource.” At the beginning of the COVID-19 shutdown, Dr. Kamens was quick to implement measures to support and allow time for self-care and ensure well-being for all her people, recognizing an immediate need for support and encouragement. To her, this was something obvious to do as a leader. Unfortunately, this is not the case in many organizations.Dr. Kamens noted that when times are stressful, “we go to ground,” falling back on biases. Everyone has biases. However, stressful situations cause us to go back to our defaults – which often means disregarding the needs of underrepresented groups. Implicit biases in both men and women often cause women to be treated differently. Biases create “schema” that impact vital decision-making and can backfire when brought into the workplace. They can lead to inequities in hiring and promotion, or worse.Dr. Kamens also talked about leaders, and how sometimes people are promoted to management because they are good at their jobs, not because they are skilled at managing people. Good managers seek honest feedback, learn from other people, provide opportunities for growth and development and delegate effectively. Dr. Kamens suggested that a good way to drive greater inclusion and better management is to do away with annual reviews, which are a “hot bed for bias,” she said, and are incredibly problematic from an inclusion and leadership perspective.Why did Dr. Kamens focus on leaders? Because change “must come from the top. No company’s culture will change if leadership is not involved in driving and espousing the needed change.”Dr. Kamens stressed that leaders need to promote others. “A leader’s job is to help lift others into the spotlight,” she said. Also, we must lead with humanity. This pandemic has shown that people need different things to do their best work. Finally, who you hire is who your company is, and how it is seen. “Don’t keep jerks, don’t foster jerks and don’t hire jerks,” she advised.Dr. Kamens talked about what really makes people happy.Flexible work scheduleStrong sense of engagement at workFeeling of being appreciated and valuedHaving a high degree of freedom and diversity built into their jobsGood relationships with clients and colleaguesHowever, she insisted that the happiness “sweet spot” is different for everyone.In conclusion, Dr. Kamens stated that good leaders hold everyone accountable, are intentional about the culture they want to create, empower everyone to call out bias and remove barriers to the good work of others.Following Dr. Kamens’ keynote, the program pivoted to breakout sessions on several topics inspired by workplace challenges resulting from the pandemic. These robust conversations resulted in the elevation of common themes, and recommendations for any company looking to better support their employees:Working with Hybrid (in person and online) Teams: There are so many ways to communicate (text, calls, video calls, emails) and it is important to determine what is best for your team. Choose quick phone calls or Slack/Teams chats when full meetings aren’t necessary. Most importantly, make a concerted effort to actively facilitate the meetings so everyone can participate, whether people are on-site or remote.Leading Remotely: Consider that some one-on-one check-ins with direct reports could be done while both of you are on a walk instead of on a computer to allow for a different environment. Make deadlines and expectations crystal clear. Allow frequent breaks from meetings to alleviate video meeting fatigue. Consider virtual coffee chats, lunch breaks with colleagues, casual conversations and happy hours.Mental Well-Being: Companies need to provide the infrastructure for employees to work from home, while protecting people who must work on-site. Consider creating dedicated teams for socially distanced and virtual activities. Remind employees about employee assistance programs for those who are struggling. Consider providing free meals for people working in the office. Remind employees to take breaks (away from the computer), take PTO, and practice self-care. Back-to-back meetings, often at all hours due to time zone differences, can cause significant stress and fatigue. Consider allowing employees more flexibility to manage their calendars, and allow extra time in meetings to socialize.Networking/Team Building: It can be difficult for people new to a company or a team to truly connect with new co-workers. Leaders can schedule meetings with new hires and seasoned employees, using a “speed-dating” format, trivia, or other ice-breaker activities. Encourage new team members to communicate with coworkers and managers and invite people who are struggling to reach out. If you are a new employee, have the courage to ask for what you need, be it a mentor, a check-in, or an afternoon off. If you are looking for individuals in other companies to connect with, find affinity groups and directly email people doing similar work with a request to connect.The most important takeaway from the whole event was: Trust your employees. Give them the flexibility in their schedules and communication styles to do their best work. If the pandemic has shown one thing, it’s that employees can be trusted to work remotely and get the job done. The challenge of juggling work, home and everything in between is unique to everyone. Careers and lives have different phases, and everyone needs to find the balance that works for them within current circumstances. Women especially need to be able to ask for support and flexibility or we risk losing even more of them from our companies.Women in Semiconductors is an important event for professionals across our industry. It was wonderful to share the space with brilliant thinkers and creators and to have such a rich discussion around the issues women face. We are grateful for WiS committee members, sponsors and everyone who participated for contributing to an excellent discussion. Mark your calendars for May 2, 2022, when the event returns to Saratoga Springs, New York.Margaret Kindling is senior program manager, Diversity, Equity and Inclusion, at SEMI; Priya Mukundhan, Ph.D. is metrology product manager at Onto Innovation; and Hannah Rosen is EHS equipment integration engineer at TEL.

A change is underway in the manufacturing sector as the use of curvilinear shapes on photomasks grows, leading to the real possibility of curvilinear shapes in designs. It may just be the start of a revolution away from Manhattan or rectangular shapes to curvilinear shapes. Changing the physical design infrastructure to be curvilinear seems too daunting a task. Are curvilinear shapes in designs a real possibility? I turned to Aki Fujimura, CEO of D2S, a member of the ESD Alliance, a SEMI Technology Community, to further explain the shape of the future. Smith: What is the difference between Manhattan and curvilinear shapes? Fujimura: Manufactured masks and wafers are all curvilinear, even if the input CAD geometries are rectilinear (shown in Figure 1). It’s always been true that nature can’t make 90-degree turns, so sharp corners were always a matter of how closely you looked. These days, at the leading-edge nodes and their required resolutions, wafers and even masks are all visibly curvilinear as you can see in the graphic on the left in Figure 2. Since the 1980s, both chip design and chip manufacturing systems have used axis-aligned rectangles, or “Manhattan” geometries, because 1) that was sufficient to design transistors and interconnect for the most part, and 2) CPU-based computer algorithms can be made much more efficient for Manhattan geometries. Curvilinear shapes can be piecewise linear polygons of some resolution, or spline-like formats that are curvilinear at any resolution, or specific curved patterns like circles and ovals. Figure 1: All shapes on masks and wafers are curvilinear, even if the input geometries are Manhattan. Source: D2S Smith: What are the benefits of curvilinear masks? Fujimura: The manufacturing side of the semiconductor community knows that the best possible process window for wafer lithography is obtained by using curvilinear correction of mask shapes instead of Manhattan shapes. There have been numerous studies on the topic over several decades. The technique to generate purely curvilinear mask shapes is known as inverse lithography technology or ILT and is an advanced form of optical proximity correction (OPC). At a February 2020 eBeam Initiative event, Micron Technology presented a study showing process window improvement up to 85% for advanced memory designs as a result of using curvilinear ILT (shown in Figure 2). Additionally, Ryan Pearman from D2S presented a study at Photomask Japan 2019 showing that it is preferable to move toward a completely curvilinear paradigm, not only because ILT is better, but because the mask manufactured will have reduced variability. Figure 2: Micron Technology explained the benefits of curvilinear mask shapes for advanced memory at the eBeam Initiative event during 2020 SPIE Advanced Lithography Conference. Source: Micron Technology Smith: If the benefits have been known for decades, why is it happening only now? Fujimura: Several things happened at the same time. Multi-beam mask writing is now available. GPU acceleration for general computing has become mainstream. And wafer process window (resilience to manufacturing variation) is increasingly a problem for the leading-edge nodes as we are in the 5nm node, going to 3nm. Curvilinear ILT is needed much more now than before, will soon be needed for EUV lithography too, and is now possible because of multi-beam mask writing and GPU acceleration. Smith: Curvilinear mask shapes enable curvilinear design shapes too? Fujimura: Adoption of curvilinear mask shapes is the first step in targeting curvilinear shapes on wafers. Without curvilinear masks, it is difficult to target and reliably manufacture curvilinear designs. Curvilinear ILT works in the pixel-space to output the desired mask shape to maximize the process window for wafer lithography. A side effect of curvilinear ILT is that it can also take curvilinear targets as input. ILT, most likely GPU-accelerated ILT, works with rasterized input data, so the ILT algorithm itself is not affected even in runtime by having any amount of curvilinear design data. The resulting mask shapes are written in multi-beam mask writers, which write pixels with doses. They too will write curvilinear masks at the same speed as Manhattan masks. Suddenly now, curvilinear designs can be handled by chip manufacturing equally well for the first time in about 30 years. Smith: But curvilinear designs would be hard, right? There are a lot of tools that depend on the Manhattan assumption. Fujimura: Yes, you’re right. We’re not going to suddenly see chips that have curvilinear routing all over the place, or curvilinear intra-connect in standard cells or memory cells. The entire physical design infrastructure that includes place and route, timing, custom layout, parasitic extraction and design rule checking moving to curvilinear design all at once is extremely unlikely. Could portions of these problems be tackled for specific cases over time as “hot spot” solutions? With GPU-accelerated SPICE being available now, as an example, if GPU acceleration is adopted for design, the same transformation that happened in manufacturing can (gradually) happen in design too. The key question is whether it’s worth the trouble. Smith: Is it worth the trouble? Fujimura: I don’t know if it’s worth the trouble for the entire infrastructure. For hot spots, “hot” for various reasons, there are certainly benefits. Jogging a 32-bit bus by one grid is certainly much more economical space-wise with curvilinear shapes. Inside standard cells or memory cells, there are certain types of features that pack better with curvilinear designs. In general, interconnect is the limiter to chip size of course, but there are always critical areas that could use help to shrink. There are manufacturability benefits as well. In general, when something changes so drastically as this for the first time in 30 years, there’s bound to be some innovation that takes advantage of the discontinuity. Let’s see what the combined capitalistic power of the entire community might be able to come up with. The first thing is to let everyone know that curvilinear designs will be manufacturable today. Hear insights from other leading electronic system design industry CEOs at the SEMI ESD Alliance CEO Outlook on May 18, 2021, 2:00pm-3:00pm PDT. Panelists will discuss the state of the industry along with their views of the outlook for the coming years. Registration is free for SEMI members. About Bob Smith Robert (Bob) Smith is executive director of the ESD Alliance, a SEMI Technology Community. He is responsible for the management and operations of the ESD Alliance, an international association of companies providing goods and services throughout the semiconductor design ecosystem.

As part of bi-weekly meetings of the SEMI Environment, Health, Safety and Sustainability (EHSS) community to share information on the impacts of the pandemic, the EHSS COVID-19 Working Group recently revealed that companies are offering PTO to employees to get vaccinated.

On April 21, 2021, the European Commission put forward the long-awaited Proposal for a Regulation on a European approach for Artificial Intelligence, introducing for the first time harmonized rules for the development, placement and use of secure and ethical artificial intelligence (AI) in Europe. The proposed regulation’s wide scope subjects providers, importers, distributors, and users of AI systems to regulatory scrutiny. It also includes providers and users outside of the European Union (EU) that deploy AI systems or use AI system outputs in the EU. With extraterritorial scope, the proposed regulation aims to further strengthen the EU’s leadership in shaping global standards and norms for new technologies. A European Path to Safe AI Following a risk-based approach, the proposed regulation classifies AI systems according to the level of danger they pose in the following categories: Unacceptable risk: AI poses unacceptable risk to systems or applications with the potential to manipulate human behavior and exploit vulnerabilities of groups of people to cause psychological or physical harm. Examples of prohibited AI systems include social-scoring systems and biometric identification that can be used by public authorities. High risk: The proposal identifies two main categories: AI systems used as safety components of products (or are a product themselves), and other stand-alone AI systems that have fundamental rights implications. Considering their intended purpose, the proposal identifies specific conformity assessment measures for both groups. AI systems intended to be used as security components will require a conformity assessment by an independent third party. Such systems will also be subject to the same ex-ante and ex-post compliance and enforcement mechanisms as products of which they are part. In contrast, stand-alone AI systems assessed through internal checks would require ex-ante compliance with all requirements of the regulation as well as with robust standards for quality and risk management and post-market monitoring. The proposed regulation identifies eight areas of high risk including AI systems in safety components of products (e.g., machinery, radio equipment, AI applications in robot-assisted surgery), critical infrastructures (e.g., transport), educational and vocational training (e.g., exam scoring) and employment (e.g., monitoring or evaluation of persons in work-related contractual relationships). Prior to their introduction to market, high-risk AI systems will be a subject to strict requirements including the use of high-quality datasets; adequate risk assessment and mitigation systems; high levels of robustness, accuracy, and security; clear and adequate user information; detailed system documentation and logging of activities to ensure traceability of results. Human oversight and control must be ensured. Low and Minimal risk: For limited-risk AI systems (e.g., chatbots), the regulation proposes only minimum transparency obligations, while minimal risk AI systems posing little to no risk (e.g., AI in spam filters) will not be regulated. Boosting AI Excellence from Lab to Market Continuous innovation of AI requires a secure environment that can support responsible validation of AI technologies. To that end, the proposal encourages the set-up of testing and experimentation facilities or so called AI regulatory sandboxes. Established by one or more Member States, the sandboxes will provide a controlled environment to test innovative technologies under strict oversight before their market introduction. These facilities could play an instrumental role in connecting the Europe’s R D ecosystem, creating new partnerships among numerous stakeholders. In addition to regulatory sandboxes, the European Commission intents to set up: A Public-Private Partnership (PPP) on AI, data and robotics designed to implement and invest in strategic research innovation and a deployment agenda for Europe Additional Networks of AI Excellence Centers to foster exchange of knowledge and advance collaboration with the industry Testing and experimentation facilities to test state-of-the-art technology Digital Innovation Hubs, one-stop shops to provide access to technical expertise and experimentation An AI-on-demand platform as a central European toolbox of AI resources (e.g., expertise, algorithms, software frameworks and development tools). Next Steps The proposed regulation is the at the start of a lengthy legislative process and will be debated by the European Parliament and European Council in the coming months. Given the importance of AI, and number of stakeholders involved, it is likely the proposed regulation will face various changes before being applied across the EU. For its part, SEMI Europe will maintain discourse with key public and private stakeholders on the proposed regulation, closely monitoring related policy developments as they unfold. Marek Kysela is senior coordinator of Advocacy at SEMI Europe.

As we move through Q2 of 2021, it seems that the world is finally approaching normalcy. But I don’t believe our lives and businesses will ever be the same. Travel is unlikely to return to the same level as pre-COVID-19 for many years. I’m sure many companies will establish tighter travel policies and budgets as virtual conferencing has proven to be beneficial and cost-effective. Patients and doctors who were skeptical of telemedicine are embracing it, and although it’s not perfect, it has filled a needed gap. Online learning essentially happened over a weekend and will now be part of many curriculums and programs. All of these elements have spurred our semiconductor industry into a super cycle. Demand for chips is leading to an increased demand for semiconductor equipment. Semiconductor capital equipment expenditures in 2020 surpassed $63 billion and are forecast to top $70 billion in 2021. The secondary equipment market typically makes up about 5% to 10% of that. Our inquiries have definitely increased this year. With this in mind, I’d like to share some thoughts for the remainder of the year. Storage of Chipmaking Equipment Not New The semiconductor industry has been experiencing an equipment shortage for some time. It is difficult for original equipment manufacturers (OEMs) to support such a large variety of products and technologies. Some companies use equipment for manufacturing 150mm, 200mm and 300mm wafers. Fabs still run 30-year-old technology on 150mm wafers while the latest technology is manufactured on 300mm wafers. We’ve also seen new technologies like silicon carbide (SiC) being developed on these smaller wafer sizes. Unfortunately, some OEMs stopped making 150mm and 200mm some time ago and have only recently jumped back into the market. These OEMs have had to balance technological advances, pricing, and manufacturing capacity to meet this demand since their primary focus is on 300mm equipment. Third-party refurbished equipment suppliers have also experienced an increase in demand over the last several years. We see it increasing at all technology levels over the next three to five years. This translates to increased equipment pricing for both new and used equipment, as well as increased lead times. Growing Demand for Legacy Tools Many electronic products we use and are familiar with don't require state-of-the-art technology. For instance, cellphones, electric vehicles, wearables, monitors and industrial products still contain many chips manufactured on 200mm wafers using 200mm equipment. There are still approximately 200 200mm fabs worldwide and this makes up about 25% of all wafer capacity regardless of wafer size. These fabs manufacture analog devices, MEMS products, power management ICs, RF devices, discrete devices and sensors. We have also seen an increase in lead times for 200mm equipment. Typical lead times of three to six months have increased in some cases to one year or more. This situation has created a dramatic increase in chip making equipment prices and we do not expect much relief there. Many OEMs transitioned to 300mm equipment prior to 2010. Revenue and profit margins are much higher for them on 300mm equipment. 200mm manufacturing was supported by many third parties for a while. However, in 2016 we saw a resurgence in 200mm equipment, and at that time many OEMs began jump-starting their supply chains. It took some time for them to develop new supply chains, upgrade technology and in some cases hire newly trained engineers to support these new tool sets. All this costs money, which is why we will continue to see an increase in new legacy equipment pricing. Because manufacturers and products may not be able to support these prices, we expect the robust third-party ecosystem to continue. SurplusGLOBAL's Response to this Demand One of the advantages we bring to the secondary equipment market is our ability to recycle technology. We continuously search for opportunities to purchase large packages of tools from companies that are transitioning technology nodes, moving from 200mm to 300mm wafer size or changing product lines. We spend approximately $65 million to $100 million each year on purchasing equipment and in some cases storing it for the right customer. For instance, a memory company may be changing technology nodes and no longer needs its equipment. This use to happen on a predictable schedule. Instead of scrapping that equipment, SurplusGLOBAL purchases and stores it. Sometimes we only need to store it for one month before relocating it. However, in many cases, we store it for one year or more. We may power it on at a later date if it is in good condition. In some cases, we work with an OEM or third party to have it refurbished and ready for a new customer. In response to the need for more secondary market equipment, we have opened up additional offices in Japan and Singapore to stay close to and better support our customers in those regions. Finally, our biggest and most recent endeavor is building our Semiconductor Equipment Cluster, which opens in July 2021. Learn more about the SurplusGLOBAL Semiconductor Equipment Cluster. Emerald Greig is executive vice president Americas at SurplusGLOBAL.

In 2020, the global semiconductor materials market expanded 5% to reach $55.3 billion in revenue to set a new industry record. The momentum in growth is expected to continue throughout 2021 despite the lingering pandemic.