Technology and Trends

RITdb is a semiconductor manufacturing database project organized as a Working Group under SEMI’s CAST (Collaborative Alliance for Semiconductor Test) Technology Community. Originally, RITdb was the “Rich Interactive Test Database” and the original goal was to create a shared architecture that supports smart adaptive testing for semiconductor makers by providing ready access to integrated, consistent, easy-to-use data across the entire manufacturing and test process. Figure 1 illustrates this process for making integrated circuits and how RITdb will collect data from the entire manufacturing flow. Figure 1: Manufacturing Flow for Making Integrated Circuits RITdb’s end goal is to enable access to any sort of manufacturing data across the life of a product from inside or outside of the factory that made the product.Adaptive test has two scopes: The Historical Scope: Make disparate data obtained from many different sources available on demand while dealing with issues of sharing, trust, and data security amongst all database users. The Immediate Scope (Now): Enable real-time decision making about processes and parts moving through the manufacturing process based on process history, results, and feedback. Figure 2 illustrates a manufacturing flow that takes advantage of the RITdb database to make real-time decisions based on test results for devices as they move onward from the immediately preceding process step and from rules that have been developed over multiple manufacturing runs using previous test data in the historical manufacturing record. Figure 2: Real-Time Manufacturing Flow that Makes Decisions based on RITdb data. Image Source: IEEE Electronics Packaging Society HIR (Heterogeneous Integration Roadmap) One of the development issues that the CAST RITdb Working Group has wrestled with is how to make data as easy to extract from the database as it is to put into the database. Many previous manufacturing database development efforts have stumbled over this goal, yet it’s imperative that data be easily accessible if it’s to be used for real-time decision making.The end goal is for RITdb to become an “interplanetary” file system, which means that the database should be distributed over both time and distance. It should be available everywhere it’s needed. In addition, the data in the database has attached metadata to permit content-aware access. The metadata allows a data-consuming application to extract just the data it needs from the database, which reduces the amount of traffic over the manufacturing networking system and speeds database transactions.Further, the database must maintain data integrity, which means that it uses hash-based naming and immutable files to make the data easy to find, so that the data-consuming application knows that the data it obtains from the database is correct, and to prevent data deletion. The database must also be secure, with access controls and encryption to protect data. Finally, the RITdb database employs versioning so that any changes made to the database can be easily tracked and traced over time.RITdb GoalsThe RITdb project has been driven by several goals: Enable plug-and-play database access so that many types of testing tools can feed data into the database in support of diverse test and manufacturing applications. Support generation of and access to real-time streaming data as well as to data previously stored in the database. Allow data from different producer tools to be merged, synchronized, and then delivered to data-consuming applications. Permit new data types to be easily added to the database without adversely affecting the existing database model. This goal allows new data types to be added to the database even before there’s an idea of how to use this new data. Integrate cleanly with the Adaptive Test Model. The Data in the LakeTo meet all of these objectives, RITdb employs a “data lake” instead of a “data-warehouse” model. The data-warehouse model is a more traditional “big data” approach to databases where data is cleaned and normalized when it’s imported into the one, large database. A database using the data-lake model stores a pool of disparate but related data, which is cleaned and normalized at the point of creation. This approach better serves the goals of the RITdb database project by allowing real-time decision making based on prepared, good data with provenance.Data provenance encompasses many data characteristics that require answers to many questions regarding: Identity: What is this data? Integrity: Who created this data, where was this data created, and is this truly the data that was created? Security: Who can access this data? Locality: Is this data grouped with other data based on some characteristic? Lineage: Where did this data come from? In addition, RITdb incorporates other features to satisfy the “Now” scope. It supports a streaming data-flow model using RITdb packets and events. It uses a real-time messaging infrastructure based on IOT bidirectional, machine-to-machine communications and the MQTT (Message Queuing Telemetry Transport) protocol, an ISO standard (ISO/IEC PRF 20922) for publish-and-subscribe messaging, and the CBOR (Concise Binary Object Representation, a serialized, binary data format loosely based on JSON) format for payload data within the messages. Finally, the RITdb streaming protocol permits real-time rules checking so that an application program can look at data streaming in from a test cell and make real-time decisions based on that data.Currently, planned submission for RITdb specification to SEMI for balloting is scheduled for 1Q19. To learn more about the SEMI CAST Technology Community, its RITdb activity, and/or to engage in this effort, please contact Paul Trio, senior manager of Strategic Initiatives) at SEMI, at [email protected] Ajouri is a systems integration engineer at Texas Instruments.

Jason Jelinek, a software technical manager at John Deere Electronics Solutions, has parlayed his more than two decades of embedded software engineering experience into commercializing controls and sensing technologies for rugged/harsh environments, including agriculture/off-road and aerospace. During his keynote at the upcoming FLEX and MEMS Sensors Technical Congress 2019, February 18-21 in Monterey, Calif., Jelinek will address the driving need for advanced sensing technologies that will fuel the continued growth of autonomy in agriculture.SEMI’s Maria Vetrano asked Jelinek to help FLEX/MSTC attendees understand his vision of autonomy in agriculture, which heavily leverages advanced sensing technologies to help farmers master equipment logistics, handle vehicle- and fleet-level operational efficiency, and manage the entire lifecycle of crops.SEMI: Did autonomy in agriculture start with autonomous equipment, such as tractors and combines?JELINEK: Automation, the first step on the road to autonomy, has been occurring in agriculture for a long time. Over the past 100 years, automation has dramatically reduced manual effort and simplified jobs in farming, allowing operators to focus more on administrative and other aspects of their work.The evolution of the combine is a good example of automation in agriculture. Long ago farmers would use a scythe to cut down the crop before bundling or stacking it up. Later they would manually thresh and winnow the crop to get the grain. Over time, we developed windrowers to cut the grain, threshing machines to separate the grain from the chaff, and winnowing machines to get only the grain. Combines now “combine” all those steps to go from grain on the stalk in the field to grain in the hopper. One person in a combine can do the work that once required many people and animals — all in a much shorter timeframe. We are now looking at automating harvesting to maximize yield and reduce fuel consumption. The AUTOTRAC feature on John Deere machines is a recent example. AUTOTRAC divides a field into rows based upon the parameters of the machine in operation, supporting hands-free driving with very high accuracy. It allows consistent, accurate rows for tilling, planting, crop treatment and harvesting, saving considerable time, improving overall quality and freeing the operator to do other work while in the vehicle.The Exact Emerge and Section Control features (which also use AUTOTRAC) will spur greater future autonomy. Control over both the seed spacing (Exact Emerge) and when the machine drops seeds (Section Control) prevents overseeding and provides the right seed-spacing for optimal crop production.As we look to the future, sustained growth in automation of jobs will enable the development of fully autonomous equipment. Currently, however, skilled operators are still closely involved in job management and execution. To realize greater autonomy, we will need machines that make the decisions once made by people.SEMI: How will autonomy in agriculture change the ways that we grow and harvest food — and even affect when we sell it?JELINEK: Autonomy will lead to more efficient production, reducing fuel, fertilizer, herbicide and water requirements. It will also enable fewer people to do more of the work.Let’s start with conditions that are hard, even impossible, to control: weather and staffing.While farming is still tied to the weather — and will remain so for some time — more efficient operations will allow tilling, planting, spraying and harvesting of fields to occur in shorter time windows that more easily match conducive weather conditions.There is also a human-resource issue: The agricultural industry must compensate for population decline in the rural areas where farmers operate. Doing more with less is essential for agriculture to continue to meet the rising food and clothing demands of the world’s population.SEMI: To what degree will we see artificial intelligence in autonomous agricultural systems?JELINEK: While autonomous systems had their start at the vehicle level, they will one day move to the entire fleet, providing suggestions on when the owner should execute operations. Autonomous systems may also help owners to decide when to store or sell crops, based on market conditions, operating costs and desired margin levels. That’s the initial level of artificial intelligence that I foresee.SEMI: How can sensing improve autonomy in agriculture?JELINEK: The challenges we face in agriculture are many, but technology will help us meet them. We must transfer responsibility for operations and decision-making from the skilled operator to the intelligent machine. Through increased use of sensing, we can gather large amounts of data, which autonomous agricultural systems will process, communicate and interpret to streamline jobs and boost agricultural production.SEMI: What would you like FLEX/MSTC attendees to take away from your presentation?JELINEK: I would like FLEX/MSTC attendees to understand the environment in which agricultural sensors need to operate. We need sensing solutions that will survive and thrive in rugged, outdoor variable environments to support the automation that will fuel autonomy.I would also like to engage suppliers in the application of current technology to meet our sensing needs.Jason Jelinek will present Autonomy in Agriculture at FLEX/MSTC on Tuesday, February 19 at 9:00 am.Register today to connect with him at the event. To learn more, click here.MSTC Flex 2019 is organized by the MEMS Sensors Industry Group (MSIG) and FlexTech. Maria Vetrano is a public relations consultant at SEMI.

Welcome to our first post for 2019 here at the SOI Consortium's Advanced Substrate News. First and foremost, may we wish you and yours a safe, happy, healthy and prosperous year. It should be a good year across the SOI ecosystem, with new products, players, IP, technologies and tools -- and high volumes. What's new? Let's start with the people, as the Consortium welcomes new team members. Jon Cheek of NXP will join Carlos Mazure as Executive Co-Director. He'll be replacing ST's Giorgio Cesana in that role – and goodness knows those are some big shoes to fill. Giorgio has given of his time and expertise so tirelessly over many years. He'll of course still be a key resource for the SOI ecosystem, and though we'll miss him here at the Consortium, we know he'll be doing great things in SOI at ST. So a heartfelt thanks to Giorgio Cesana from all of us. Jon Cheek has a long history in engineering management at companies that have been leading users of SOI: AMD, Freescale and now NXP. As such, he understands what companies need to design great products, and how the Consortium can help further build, promote, connect and support the ecosystem. The Consortium team also welcomes Jean-Eric Michallet of Leti, who'll bring deep bizdev expertise and a keen sense of what it takes to reach further into the ecosystem. (Astute long-time ASN readers might remember his post from five years ago about 3D monolithic integration – now dubbed “Cool Cube” by Leti.) And finally, look to hear more from and about the Consortium, as our team is rounded out with the addition of the comm marketing savvy of Erin Berard of Soitec. In addition to new team members, the Consortium is very pleased to welcome new member Applied Materials. Though new to the Consortium, AMAT has a long history in the heart of SOI ecosystem – in fact they've been working with SOI wafer-leader Soitec for over 25 years. AMAT ion implanters are a key enabler to what became and is Soitec's industry-leading Smart CutTM SOI wafer manufacturing process. And of course AMAT equipment is used to make virtually every chip in the world, so their breadth of vision as a consortium member is clearly a fabulous addition. 2019 will also be marked by the expansion of the highly successful SOI Academy series, the first of which was held this past fall in Shanghai. We'll keep you posted as these and other Consortium events are announced throughout the year. In fact, 2019 marks a decade of (excellent!) SOI Consortium events events around the world: our first symposium was held back in 2009. Kicking off this year, save April 9th on your calendar for our Annual SOI Silicon Valley Symposium. Then watch this page for more events across the globe. What will the year bring? On the product side, RF-SOI for 5G is of course super hot. Last summer, a SemiconductorEngineering headline proclaimed RF-SOI Wars Begin. And what we heard at the International RF-SOI Workshop last fall in Shanghai (presentations here) certainly confirmed that in the coming year the race will continue unabated. [caption id="attachment_14476" align="alignright" width="300"] Part 3 in SemiconductorEngineering's "Experts at the Table" series on FD-SOI featured James Lamb of Brewer Science, Giorgio Cesana of ST, Olivier Vatel of Screen, and Carlos Mazure of Soitec. (Image courtesy: SemiconductorEngineering.com)[/caption] And for FD-SOI, you might want to read the SE series published over the last six months. The latest, published a couple of weeks ago looks at FD-SOI at the Edge. There are some great insights from SOI Consortium members there. In terms of products, too, there's lots of activity. Last summer, Samsung indicated they'd taped out over 60 products since they first began offering 28FDS three years ago. It's a trend they see accelerating. Full production of 18FDS is slated for this fall. And also last summer GlobalFoundries indicated they had over 50 client designs on 22FDX. “We’re only just beginning,” said GF CEO Tom Caulfield at the time. “We have found a way to separate ourselves from the pack by emphasizing our differentiated FD-SOI roadmap and client-focused offerings that are poised to enable connected intelligence. " For its part, ST, as we learned at the last SOI Consortium Japan Workshop, has been doing FD-SOI for five years now. And while we don't have number, we learned that some of those products are now in their second and third generations, and that some big FD-SOI chips coming out this year with embedded memory and RF, with especially good traction in mmWave, automotive and IoT. So while the outlook for the overall industry is anyone's guess for the coming year, the outlook for chips built on SOI technologies is very good indeed.

SEMI met with Martin Schrems, director of Strategy and Business Development at AT S AG, to discuss Fan-Out technology trends ahead of SEMI 3D Systems Summit in Dresden, Germany.SEMI: What are the AT S AG mission and vision and your role within the company?Schrems: AT S AG is evolving from a pure PCB manufacturer towards an interconnect solution provider. We can clearly see a continued trend towards miniaturization and modularization by (3D) integration of components such as integrated circuits and passives. Module sizes tend to increase by integrating more functions and system-level requirements. As a PCB maker, we have served such system-level requirements for a long time. Further integration offers opportunities to embed components in PCBs or substrates, offer layout and simulation services, as well as provide assembly and test services depending on specific customer requirements. As director of Strategy and Business Development, I work with my colleagues in AT S, customers, and partners across the industry towards understanding and leveraging this major transformation in the electronics industry.SEMI: What project are you currently working on that you think will make a difference in 2019?Schrems: There are number of very exciting projects, many of them already involving AT S contributions to module integration. Some of these projects involve key customers directly. We see exciting opportunities for integration of larger multi-function modules by combining PCB, substrate, and embedding core competences.SEMI: The focus of your presentation at the 3D Systems Summit will be on "Fan-Out System-in-Board technology enabling module and system-level integration.” What do you see as the key trend in this area?Schrems: Fan-Out technologies are used to distribute I/O pad connections of nanoCMOS ICs over a larger area. This relaxes bump pitch and feature size requirements for subsequent system-level PCB interconnects. In some cases, Fan-Out layers already provide a substitute to currently used Flip-Chip substrates. Well-known examples are Fan-Out packages for application processors for smartphones. There is definitely a trend in the market towards Fan-Out for high-end processor applications. Advantages of such Fan-Out packages are shorter electrical connections and a reduced thickness.However, one weakness of current Fan-Out packages is that only a limited number of components can be integrated due to mechanical stability challenges – a barrier to further component integration in larger modules. Currently, the only way to integrate more components is to use laminate-based PCBs and substrates with conventional Surface Mount Technology. Recent proposals like our “Fan-Out System-in-Board” (FO-SiBTM) technology are expected to provide an alternative Fan-Out packaging option at the board-level in the future.SEMI: Please elaborate. Schrems: Fan-Out capability and integration of more components – typically up to the 100 and more needed for electronics integration at system level – can be achieved simultaneously by combining technologies from the PCB and the packaging world. PCB laminates such as glass particles and organic materials provide mechanical stability for large boards. The recent introduction of substrate-like PCBs (mSAP) has already paved the way to cover applications that were reserved for substrates and classical packaging in the past.With FO-SiBTM technology, we have taken it a step further and offer the option to integrate SAP substrate layers onto the PCB with lines/spaces below 10µm. FO-SiBTM makes it possible to directly contact nanoCMOS chips on PCBs without any intermediate substrates. Further adding Cu pillar technology at panel level will enable Fan-Out structures even for surface-mounted components, making recent R D on panel-level Cu pillar technology very important. Through joint R D, we can drive progress in the industry to further enable cost-effective heterogeneous 3D integration.SEMI: What are your expectations for the 3D Systems Summit in Dresden, and why do you recommend your members and other industry leaders to attend?Schrems: The 3D summit is the high-level conference where key electronics industry players discuss major heterogeneous integration trends. Therefore, we very much appreciate the opportunities to exchange ideas across the supply chain including users, developers of integrated electronics hardware and tool manufacturers. Serena Brischetto is a marketing and communications manager at SEMI Europe.

Francois Jeanneau, president and CEO of Novasentis, has spent the last two decades building strategic relationships, increasing revenues and catapulting growth at leading consumer OEMs and ODMs. Jeanneau will present the world’s thinnest haptic actuator technology at the upcoming FLEX and MEMS Sensors Technical Congress 2019, February 18-21 in Monterey, Calif. SEMI’s Maria Vetrano interviewed Jeanneau to give FLEX and MSTC attendees a preview of this new technology that will enable rich, customizable haptic experiences with virtual reality (VR), hand-held game controllers and flexible wearable devices such as wristbands.SEMI: What do consumers want from haptic feedback? How can the technology industry improve the user experience with haptics?JEANNEAU: In many applications such as VR and gaming, our visual and auditory senses are satisfied by high-resolution displays and good-quality speakers, but they lack the sensation of realistic touch. That’s because haptic technology has lagged the technological advancements that we have made in displays, microphones and speakers. It’s also fallen far behind what is possible on the software side. At the same time, consumers are demanding more from their VR and gaming experiences.Through improvements in haptics, prospective home-buyers touring a home via VR headset will be able to “feel” those granite countertops in the kitchen, assess whether their couch will fit in the living room and check out the view from the back porch, all from the comfort of their own home. Virtual travelers will be able to touch the marble walls of the Taj Mahal, and sports enthusiasts will feel the impact of a tennis ball when they use their haptics 2.0-enabled controller.Haptics will dramatically improve what’s possible in wearable devices as well. From their smartwatches, consumers will discern hundreds of different sensations, from a mild heartbeat to a sharp reminder that they are steering a car through an intersection. This is all possible through new haptic actuator technologies that can accept hundreds of inputs to generate an entire haptic language of outputs.SEMI: What are some major obstacles to realizing improvements in haptics for flexible devices such as wrist-worn devices?JEANNEAU: The best wrist-worn devices today offer a rudimentary haptic output that merely says, “hey, pay attention to me.” To comprehend the alert, the user must look at the display, press a few buttons and then interact with the device. This distracts the user while riding/driving, creating potentially dangerous situations. It’s also frowned upon, particularly in the middle of a meeting!The legacy haptic technologies – eccentric rotating mass (ERM) motors and linear resonant actuators (LRAs) – that are currently used in today’s devices are problematic on multiple levels. They are bulky, sometimes occupying a third of the real estate in a smartwatch. As they are generally made of metal, they are also heavy and too thick for many devices. Their output tends to be slow, lagging the output in the display, making the whole experience clunky. They tend to be power-hungry as well.SEMI: How is Novasentis approaching these technical challenges?JEANNEAU: Novasentis has created an extremely thin (150 um), flexible and low-power polymer film actuator that is small enough to be easily embedded into the next generation of smarter wearable devices and garments; the actuator can provide hundreds of different types of vibrating feedback to the wearer for improved notification and/or suggested actions. The film actuator (that can replace a mechanical motor vibrator found in smartphones and smartwatches) is made by stacking layers of electroactive polymer and metal to create the piezoelectric structure. Upon power-up via a modulated waveform, the molecules move to align themselves in response, which elongates and relaxes the polymer. This causes the attached substrate (wristband in a watch, for example) to bend and relax, thus, causing the vibration effect, or haptic and audio feedback (which is unique to our material).SEMI: How will you demonstrate your technical approach at FLEX 2019?JEANNEAU: We will bring examples of designs incorporating our technology as we share live demos of wearables, game controllers and other applications. We will also bring actual haptic actuator materials for show and tell.Francois Jeanneau will present Flexible Actuators for Sensational Haptics at Flex and MSTC on Wednesday, February 20 at 8:00 am. Register today to connect with him at the event. To learn more, click here. MSTC Flex 2019 is organized by the MEMS Sensors Industry Group (MSIG) and FlexTech. Maria Vetrano is a public relations consultant at SEMI.

OSATs (outsourced assembly and test companies) currently handle the bulk of assembly and test activity for the worldwide semiconductor industry. These companies’ factories have a manual operation legacy: Decision-making is manual. Materials and WIP (work in process) movement is manual. Practically everything in these factories is done manually. In addition, OSAT factory environments typically present many physical constraints with respect to equipment layout, material carriers and storage. All of these constraints present challenges when trying to automate material handling in these factories. OSATs also operate with far smaller gross and operating profit margins than IDMs, yet the percentage of worldwide semiconductor product handled by OSATs is currently increasing from year to year while the IDM share is decreasing. The combination of increased business volume with lower margins encourages OSATs to automate their factories, but there are challenges that must be overcome. Technical challenges abound OSATs face many technical challenges when trying to automate production. First, installed legacy equipment in these factories is typically 25 to 30 years old. This older equipment was simply not designed to accommodate automated materials handlers. For example, access doors on older equipment make automated WIP delivery and pickup nearly impossible without significant modifications to the equipment. Second, these factories are not equipped with the infrastructure needed to support automation. To start with, most of this older equipment is not SECS/GEM compliant. (SECS/GEM is the semiconductor industry's standard equipment interface protocol for equipment-to-host data communications.) This capability must either be retrofitted to the existing equipment or some other means of extracting required data from the equipment – getting it from the PLCs controlling the equipment, for example – must be employed. Similarly, the WIP carriers currently in use – wafer carriers, trays, magazines, and the like – are not designed for automation. In contrast to the semiconductor wafer fab industry, it seems that almost every company in the OSAT domain has a different idea concerning what a carrier should look like. In particular, there’s no such thing as the standard 300mm FOUP (Front Opening Unified Pod), which carries wafers from one tool to the next inside of semiconductor fabs. The variations in carrier shapes, configurations, and even gripping handles in the OSAT domain thwarts progress in OSAT factory automation. How do you design a materials-handling robot with the grippers and flexibility needed to adapt to all of these different carriers? It’s a difficult question and an expensive proposition. OSAT facilities themselves are designed for human-based materials handling, not automated materials handling, simply because they were designed at a time when automation was not contemplated. As a result, the equipment in these facilities is packed very closely together (to reduce floor space costs), as shown in Figure 1. Figure 1: Equipment in a test facility is often tightly packed, which impedes the adoption of automated materials handling. It’s very difficult to add automated materials handling equipment at floor level or even at ceiling level in these OSAT factories, as is frequently done inside of a semiconductor wafer fab. You will not see AGVs (automated guided vehicles) moving around inside of legacy OSAT factories because there’s simply no room for them to move around. Tackling the challenges So, what can be done to handle these all of challenges? You must start by understanding the nature of the operations taking place inside of the factory. As stated above, most of these operations are currently performed manually. All of the decisions and the materials transport is performed by humans. There’s simply no way to transition from a fully manual operation to a fully automated operation in one jump. It’s too far a reach. A significant amount of work is needed just to reach the level where automated decision making is possible. Key systems must be added to enable this level of automation. Many companies tried and failed to automate assembly and test in OSAT facilities about 25 years ago. They failed because the required data could not be extracted from the equipment in use and, therefore, there was no data to drive good decision-making. Too many required systems were simply lacking. For example, when AGVs were added, one or two operators had to walk along with the AGV to tell it what to do. There was no benefit from the automation in this example. There was no successful path to automation at the time. Standards needed One of the major obstacles to automating assembly and test in OSAT facilities is a lack of standards for carriers, robotics, layout, and facilities. Many front-end standards exist. The SEMI-E82, SEMI-E84, and SEMI-E88 standards designed for semiconductor fab front ends might apply, but they need to be adapted to requirements for OSAT back-end facilities. In addition, OSATs have special needs that may demand new standards. This is a real opportunity for SEMI and its constituents. An architecture for full assembly and test automation involves four layers, as shown in Figure 2. Figure 2: Full automation for assembly and test involves four layers. Starting with the data layer at the top of Figure 2, a fully automated facility needs to have database systems in place that can supply all of the data needed for making smart scheduling and dispatch decisions. These databases then feed smart, automated scheduling and dispatch applications in the logic layer. The scheduling and dispatch applications then send control commands to the automated transport and materials controllers and the automated equipment handlers in the control layer. You need to start at the top of the diagram to put all of this automation in place. The automated equipment and equipment controllers need commands from the scheduling and dispatch applications, which in turn need data from the databases to make smart decisions. So it’s the data layer and the systems that feed data to this layer that constitute the starting point for the journey to full automation. A significant amount of simulation is needed to develop optimal facility workflows. These simulations are driven by data extracted from the databases. One of the frequently ignored facets of automation is the need for backup plans. For example, what is the backup plan when an AGV fails and cannot deliver material as scheduled? Simulation helps create contingency plans for such events. A case study Applied Materials has worked with assembly and test factories in deploying full automation. Towards this objective, the factories have worked on many modifications (physical and systems) to enable this automation. For example, a die-attach machine was retrofitted for automation by removing all of its equipment doors so that an AGV could load the machine and extract completed work. Additional modifications permitted the mounting of multiple magazines on the die-attach machine’s input and output to provide the buffering needed to smooth the flow of work through the machine. Finally, simple instrumentation and networking was added to the machine to aid in making WIP delivery and pickup decisions. These machine modifications addressed only the bottlenecks in this particular machine, but even these simple modifications helped to reduce the incidence of manual handling errors, such as the misalignment of magazines or trays. Modifications like these also reduce the need for human operators, which in turn reduces operating costs. Such types of incremental enhancements in automation capability have been implemented by leading-edge companies over the past few years. Conclusion Deploying full automation for assembly and test is not only feasible, it’s necessary for future profitability. OSATs must address the challenges of rising manufacturing volumes and thin margins by reducing manufacturing errors and increasing quality. (The quality requirement is increasingly driven by the automotive industry.) Trailblazing deployments have shown that it’s possible to automate these manufacturing lines successfully. While IDMs have a longer history for manufacturing automation, OSATs are now traveling along the same path due to their rising share of worldwide manufacturing volumes. On that path, they’ll need to develop experience and new standards tailored to their unique needs. Shekar Krishnaswamy is a senior manager at Applied Materials responsible for business development and pre-sales of factory automation products and solutions. He has over 27 years of experience in all aspects of semiconductor manufacturing including wafer fab manufacturing, bump, assembly and test. His specific areas of expertise are traditional industrial engineering methods as well as systems-related methodologies such as modeling, scheduling, dispatching and factory automation. Prior to Applied Materials, Shekar held senior technical and management positions at IBM, Motorola and AMD, including management of corporate operations research departments supporting factory and service groups. Shekar has a bachelor’s degree in mechanical engineering and a master’s degree in industrial engineering and operations research. Note: SEMI has a Smart Manufacturing Technology Community. For more information or to get involved, click here.

SEMI met with Jay Zhang, business development director at Corning Incorporated, to discuss recent innovations at Corning that allow fine granularity CTE engineering as well as high Young’s modulus. We also talked about the impact of this work on in-process warp control, as well as the associated production methodology that provides rapid prototyping and high-volume manufacturing. We spoke ahead of his presentation at the 3D Systems Summit, 28-30 January, 2019, in Dresden, Germany. To register for the event, please click here.SEMI: What is Corning’s mission and vision and your role within the company?Zhang: Corning is one of the world’s leading innovators in materials science with a track record of 165+ years of life-changing innovations. We excel in glass science, ceramics science, and optical physics and succeed through sustained investment in RD E. Our products include Corning® Gorilla® glass, a durable material used on more than six billion mobile devices worldwide, and industry-leading LCD glass for display applications. We have recently dedicated a unit of the company called Precision Glass Solutions to address the emerging need for glass in the semiconductor industry. Here we apply Corning’s long history of glass science expertise and deep customer relationships in consumer electronics to support cutting-edge applications like wafer-level optics for precise 3D sensing and carrier solutions for temporary bonding applications in semiconductor manufacturing. It’s our most recent work in the Carrier Solutions product line that I’m excited to present: a new carrier glass product optimized for fan-out, called Corning Advanced Packaging Carriers.SEMI: What projects are you currently working on that you think will make a difference in 2019?Zhang: My team is excited to introduce Corning Advanced Packaging Carriers this year. This is a new line of product within our portfolio of Carrier Solutions. These ultra-flat glass carriers are specially developed to reduce customers’ challenge of in-process warp by up to 40 percent, which in turn helps advanced packaging customers achieve better yield.Corning Advanced Packaging Carriers feature high-stiffness properties and are available in a wide range of coefficients of thermal expansion (CTE) in fine granularity. These attributes help customers select an ideal glass carrier that will minimize in-process warp for their package. Furthermore, we make sample quantities of these carriers available in just four to six weeks to help maximize efficiency during customers’ R D process.My team is excited about the potential of this new product, but also encouraged by our results. We have already supplied this product and have heard from one of the largest semiconductor companies in Taiwan that it has reduced in-process warp by as much as 150μm.SEMI: Your presentation at the 3D Systems Summit will focus on Agile Manufacturing of Glass Carriers for Advanced Packaging. What exactly will you be sharing?Zhang: There is a lot of interest right now in using glass as a carrier substrate in temporary bonding applications in advanced semiconductor packaging – especially in fan-out processes. We also know that in-process warp is a significant challenge to companies pursuing advanced packaging because different CTE materials are added during the process. My team has done a lot of work to understand the impact that an ideal CTE glass carrier substrate can have on minimizing in-process warp. We have studied the available levers – both theoretical and in real-life fab environments – that can help address this challenge. I will present our findings on how it is possible to select a glass carrier with the ideal CTE and Young’s modulus to reduce in-process warp by up to 40 percent, and how Corning has developed an agile manufacturing platform to support customers with these ideal carriers from their R D stage through mass production.SEMI: What do you think will be a hot topic in the next few years?Zhang: We expect high-end fanout technology to address more applications beyond just mobile APs. There is also an interesting dynamic playing out between wafer-level and panel-level fan-out technologies. Corning is active in both areas. In developing and offering high performance glass carriers, we hope to help enable our customers to expand the fan-out applications space.SEMI: What are your expectations regarding the summit in Dresden, and why do you recommend your members and other industry leaders to attend the 2019 3D Systems Summit?Zhang: Europe is where some of the most advanced packaging technologies are born. Fan-out also saw early commercialization there. I hope to meet many scientists and technologists at 3D Systems Summit and exchange technical and business ideas. We also hope to get early feedback from other attendees about the value of our new product offering. Serena Brischetto is a marketing and communications manager at SEMI Europe.

SEMI met with Erez Halahmi, vice president at 0eC SA, to discuss a new way to transfer information not only between chips but also between servers to reduce power consumption while boosting performance. The two spoke ahead of his presentation at the 3D Systems Summit, 28-30 January, 2019, in Dresden, Germany. To register for the event, please click here.SEMI: What is Zero energy connection’s (0eC) mission and vision and your role within the company?Halahmi: Prof. Naaman of the Weizmann institute of Science (Israel) and I founded OeC SA and invented the Zero energy connection (0eC) technology. OeC SA offers a completely new and innovative solution for interconnections, which dovetails with the current technological trend of “less is more.” In fact, we constantly search for a reduction in energy consumption in favor of capacity, all while simplifying manufacturing processes. We try to look at things differently. This is why our technology is so out of the box. It is a completely new way to transfer information, not only between chips but also between servers.SEMI: What projects are you currently working on that you think will make a difference in 2019?Halahmi: I am working on several diversified exciting projects including the development of a planar field emitter and a rechargeable battery with energy density higher than 1KWh/Kg. Planar field emission is a field emitter made with standard FAB processes that enable a pixelized matrix of emitters at the resolution of photolithography. The rechargeable battery is a novel battery type that delivers unprecedent energy density.SEMI: Your presentation at the 3D Systems Summit will focus on a new way to transfer data. Why is this a key topic?Halahmi: Metals have been used to transfer data since the realization of the first integrated circuit by Jack Kilby in 1958. What happened next? Photonics slowly entered the market supported by huge investments, and the global market grew over the years. However, even with such enormous growth, photonics is not easily integrated with CMOS processes and the market also faces the conversion energy issue on top of the rising costs of process change. Integrating photonics with CMOS requires converting an electrical signal to a photonic signal and back. This costs energy and adds circuitry complexity. What to do? We identified a need to create something out of the box – on one hand using the same CMOS processes without conversion, and on the other hand significantly increasing performance. More details will be released at my presentation at the 3D Systems Summit in Dresden. I am certain that you will find our invention very intriguing. SEMI: What do you think will be the main focus in the future?Halahmi: My belief regarding many aspects of our life is that history repeats itself. Look for example at the comparison Gallium Arsenide (GaAs) versus Silicon (Si). GaAs was never able to defeat the simplicity of Si. The same applies to data transfer. However, for a solution to overtake the metal interconnect, it is not enough to offer many advantages, but the same order of production simplicity should apply. Consequently, big companies will continue to focus on metal solutions for transferring data, though some smaller companies might adopt our technology due to its relative simplicity of production and great benefits.SEMI: What are your expectations for the summit in Dresden, and why do you recommend other industry leaders to attend the 2019 3D Systems Summit?Halahmi: The summit is a great opportunity to learn about new technologies and meet the people behind these innovations. It is a unique chance to meet and question the inventors themselves and learn more about your competitors. See you soon in Dresden!Serena Brischetto is a marketing and communications manager at SEMI Europe.

Constant coverage of an invigorating topic like machine intelligence in the media often urges us to consider its use in EDA technology. As is often the case, there are many myths and falsehoods that consume our time and effort when trying to apply machine intelligence to EDA. This article aims to uncover the myths and to provide helpful advice on applying machine intelligence to your EDA project or product.Value PropositionFirst, there needs to be a clear value proposition for adding machine intelligence to an EDA product. Using machine intelligence to create a me-too product adds no value. EDA customers are too busy to understand or care about an EDA tool’s underlying technology. They just want to use the tool and get results. If the tool delivers value, if it delivers tangible benefits, then they’ll use it. Otherwise, they won’t.Currently, EDA tool developers are already experimenting with AI and machine intelligence without considering this fundamental truth – without a higher-end objective. AI must deliver something better or new, whether a speed advantage, a performance advantage, new features, new insights, or perhaps even something pleasantly surprising. Before you write a single line of AI-enhanced code, you need to clearly understand how AI will enhance the product. What is the value proposition?Use ModelThere’s a major barrier to customer adoption of AI and machine intelligence technology for EDA tools: EDA users are averse to make decisions based on probabilistic results. Instead, half a century of EDA tool use has conditioned them to expect deterministic outcomes from their tools.Back in 2003, a prominent visionary and EDA investor was quoted in an interview, saying: “If I open my eyes five years from now, all static analysis in VLSI will be statistical.” Many EDA luminaries have been proven wrong over time for betting that EDA users will accept statistical results. As enthusiastic as I am about using machine intelligence to improve EDA tools, I must urge caution based on the history of EDA failures that employed a probabilistic use model. Decision-makers and EDA tool users want to see deterministic answers to questions about yield or slack, not probabilistic ones.Our experiences at Paripath in developing the PASER (Paripath Accelerated Simulation Environment) tool also bear this out. We discovered that delivering results 50x faster but with 92% accuracy was simply not good enough for end users. EDA users only started to use PASER when its answers became 98+% accurate. To be adopted in the production flow, the tool had to deliver 99% accuracy.Data EngineeringThere are specific ways to achieve these accuracy goals. The first is data engineering. Machine intelligence is a new approach to EDA tool development and it needs to be trained on a data set. If the data is poor or incomplete, training will create an inaccurate model. Fundamental software-development rules still apply. Garbage in, garbage out.Without good training data, there’s no way for you to build good neural-network models. If you train a model with garbage data, you’ll get a garbage model. You must cleanse the data before you use it for training. Otherwise, the model will draw inaccurate conclusions and customers will not use your tool. The model is not to blame here. The model’s not wrong. The problem lies in poor data engineering, poor data cleansing, and a lack of discipline to prepare input data.High DimensionalityNext, machine intelligence has a unique ability to quickly solve problems of high dimensionality. Pure EDA problems often have high dimensionality. Over the years, EDA developers have perfected the art of segmenting the problems into sequencing solutions with lower dimension. Machine intelligence technology can handle problems with thousands of dimensions, but you need to be careful when tackling problems that have high dimensionality. Too many dimensions can produce confused or inaccurate results with AI and deep-learning technology.It helps to visualize the problem and to analyze the data set before using the data to train an AI-enhanced EDA tool. Several visualization methods can help. For example, t-SNE (t-Distributed Stochastic Neighbor Embedding) lets you reduce a data set’s dimensionality from a very large number to a much lower number. Figure 1 shows a high-dimension dataset with a dimensionality of 2000, which has been reduced to a low dimensionality of 3. Figure 1: Visualizing the Data Set with Lower Dimensionality Reducing the dimensionality of a data set to 3 using t-SNE and visualization allows you to quickly see whether the data set defines an easy or a difficult problem. If the problem is difficult, you’ll likely need to lower the problem’s and the data set’s dimensionality before using the data to train a neural network.Technology SelectionOne factor that determines whether it will be easy or difficult to incorporate machine intelligence into your EDA tool is your choice of AI development tools. AI researchers have developed a long list of frameworks, libraries, and languages that they use to develop AI and machine-learning software. Frameworks and libraries such as TensorFlow, Caffe and MXNet are most popular for developing deep-learning models.However, these tools are not yet popular with the EDA development community. The languages of choice in the EDA community are traditionally C and C++ for development and Tcl for prototyping and creating user interfaces. The rest of the software world has moved on to newer development languages such as Python, Java, R, and such. Moreover, machine-learning development segments into two distinct processes: training (i.e. generating the model) and inference (i.e. using the model).Another question to consider is where to generate the model – at the vendor site or the customer site?Consequently, fitting AI and deep-learning development into EDA development environments can feel like fitting a square peg into a round hole. You may need to create corners in your hole.EDA is a very small player in the overall software market. Relatively few software developers are familiar with writing EDA tools. It’s best to select AI and deep-learning development tools that can provide some sort of interface that’s compatible with EDA’s development tools of choice. Some AI frameworks have lower-level C and C++ interface layers that provide a familiar entry point for experienced EDA developers.At Paripath, we chose TensorFlow for exactly this reason. TensorFlow has a lower-level C/C++ interface. Although the resulting development path becomes a longer one using this approach, it’s a more familiar path for EDA developers and therefore it’s a path that can ultimately lead your EDA development team to success. An elaborate study of comparing these frameworks has been published in the book Machine Intelligence in Design Automation.Integration into Legacy SystemsWhen you understand the value that you expect machine intelligence to add to your new EDA tool, when you’ve cleansed and then analyzed the data set, and when you have selected an appropriate set of development tools, you’re finally ready to add machine intelligence to your EDA development. There are two use models for AI-enhanced EDA tools. The first uses a trained model to guide the EDA tool’s decision-making. In this use case, the trained neural network doesn’t change. The software’s accuracy doesn’t improve with use unless the company that developed the EDA tool retrains the underlying neural network. This use case follows the familiar, existing use case associated with EDA tools developed using deterministic algorithms.For the second use case, the end user is able to retrain the underlying neural network, which allows the EDA tool to produce better, more accurate results over time. This use case produces a win/win situation because end users are able to hone their tools and improve them over time, without help from the EDA tool vendor’s application engineers. If the retrained models are also sent back to the EDA developer for incorporation into newer versions of the tool, all users benefit from other users’ training data.It’s not clear how you’d support this second use case in the current EDA business environment where most data sets are proprietary and are carefully guarded. Most large EDA tool customers want to keep their data in house under tight control. Even with this somewhat restrictive situation, however, EDA tools benefit from the incorporation of machine intelligence because each EDA tool customer can customize the tool and improve its results.Machine intelligence has much to add to EDA tools’ capabilities. Only time will tell if the customers want and will accept these new capabilities. Rohit Sharma, founder and CEO of Paripath Inc., is an engineer, author and entrepreneur. He has published many papers in international conferences and journals. He has contributed to electronic design automation domain for over 20 years learning, improvising and designing solutions. He is passionate about many technical topics including machine learning, analysis, characterization, and modeling. It led him to architect guna - an advanced characterization software for modern nodes. Sharma has written a book titled “Machine Intelligence for Design Automation.” You can download code examples and other information here.Note from SEMI-ESD Alliance: ESD Alliance’s Interoperability Committee brings together the industry to discuss interoperability. By focusing the efforts of the electronic system design community onto key compute operating systems, the Interoperability Committee seeks to define a stable, interoperable environment for tools and streamline the resources required to support these environments. The EDA Industry OS Roadmap presents guidelines to EDA vendors and customers for compute platforms to target for design starts. Learn more and view the OS Roadmap overview at our website.

New SEMI Taiwan Testing Committee to strengthen the last line of defense to ensure the reliability of advanced semiconductor applications.Mobile, high-performance computing (HPC), automotive, and IoT – the four future growth drivers of semiconductor industry, plus the additional boost from artificial intelligence (AI) and 5G – will spur exponential demand for multi-function and high-performance chips. Today, a 3D IC semiconductor structure is beginning to integrate multiple chips to extend functionality and performance, making heterogeneous integration an irreversible trend. As the number of chips integrated in a single package increases, the structural complexity also rises. Not only will this make identifying chip defects harder, but the compatibility and interconnection between components will also introduce uncertainties that can undermine the reliability of the final ICs. Add to these challenges the need for tight cost control and a faster time to market, and it’s clear that semiconductor testing requires disruptive, innovative change. Traditional final-product testing focusing on finished components is now giving way to wafer- and system-level testing.In addition, the traditional notion of design for testing, an approach that enhances testing controllability and observability, is now coupled with the imperative to test for design, which emphasizes drawing analytics insights from collected test data to help reduce design errors and shorten development cycles. Going forward, the relationship among design, manufacturing, packaging, and testing will no longer be un-directional. Instead, it will be a cycle of continuous improvement.This paradigm shift in semiconductor testing, however, will also create a need for new industry standards and regulations, elevate visibility and security levels for shared data, require the optimization of testing time and costs, and lead to a shortage of testing professionals. Solving all these issues will require a joint effort by the industry and academia. "With leading technologies and $4.7 billion in market value, Taiwan still holds the top spot in global semiconductor testing market," said Terry Tsao, President of SEMI Taiwan. "When testing extends beyond the manufacturing process, it can play a critical role in ensuring quality throughout the entire life cycle from design and manufacturing to system integration while maintaining effective controls on development costs and schedules. Taiwan's semiconductor industry is in dire need of a common testing platform to enable the cross-disciplinary collaboration necessary for technical breakthroughs."The SEMI Taiwan Testing Committee was formed to meet that need, gathering testing experts and academics from MediaTek, Intel, NXP Semiconductors, TSMC, UMC, ASE Technology, SPIL, KYEC, Teradyne, Advantest, FormFactor, MJC, Synopsys, Cadence, Mentor, and National Tsing Hua University to collaborate in building a complete testing ecosystem. The committee addresses common technical challenges faced by the industry and cultivates next-generation testing professionals to enable Taiwan to maintain its global leadership in semiconductor testing.The SEMI Taiwan Testing Platform spans communities, expositions, programs, events, networking, business matching, advocacy, and market and technology insights. For more information about the SEMI Taiwan Testing platform, please contact Elaine Lee ([email protected]) or Ana Li ([email protected]). Emmy Yi is a marketing specialist at SEMI Taiwan.