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Serena Brischetto

SEMI spoke with Balaji Nandhivaram Muthuraman, Package and Material Simulation engineer at Dialog Semiconductor, about the state of reliability testing for wafer-level chip scale packages ahead of his presentation at the Advanced Packaging Conference at SEMICON Europa 2018, 13-16, November 2018, in Munich, Germany. To register for the event, click here. SEMI: Since the beginning of package development reliability testing has played a key role in Wafer Level Chips Scale package (WLCSP) investigation. Lately, the role of simulation and predictive reliability significantly contributed in reducing package development time. To what extend can we predict potential failures for WLCSP packages in an early design phase by simulation?Muthuraman: Reliability testing is essential and crucial for the electronic packages. It is during the package development phase that several design iterations need to be considered and, in some cases, many feasibility studies for the package are executed. This means we require significant reliability test measurements, which could influence product-development time. For example, Temperature Cycling on Board (TCoB) reliability testing would take approximately 65-75 days for testing the package reliability subjected to 1500 temperature cycles. Each cycle involves exposing the device at hot and cold temperatures with a specified temperature profile. Executing such Board Level Reliability (BLR) tests for all feasible package designs is a tedious process that could lead to an increase in package development time. This is the stage where numerical simulation methodology helps us to foresee potential failures in Board Level Reliability. Predicting delamination or cracking of passivation/metal interface layers based on the WLCSP design layout and estimating the characteristic life of smart device subjected to temperature load are some classic examples of predicting WLCSP package behavior in an early design phase by simulation methodology.SEMI: We can definitely say that predictions occurring during the early stage are key to success. But how exactly can numerical simulation help estimating?Muthuraman: From a thermal reliability point of view, determination of the optimum material combination – bill of materials for device – is used to predict whether a heat sink is required for the device to meet thermal performance. This is not all. At an early design stage, the simulation methodology can be used to estimate device performance under varying thermomechanical loads. Numerical simulation at early package development phase helps the researchers by predicting the possible temperature contour field and stress contour field of the smart device under a given loading condition. The estimation accuracy of potential issues through numerical simulation depends on the material models implemented and consideration of realistic load condition under which the package operate in real life situation. For example, engineering judgements can be made using numerical simulation of Solder Joint Reliability (SJR) analysis to decide whether an Underfill material is required between the Package and the Printed Circuit Board (PCB).SEMI: Are all conditions tested during the reliability investigations specific to fit a certain type of applications or do these vary?Muthuraman: Reliability investigations are based on the end application of the electronic devices. For example, handheld device applications will be exposed to a reliability condition up to a maximum of +85oC, whereas smart devices designed for an automotive application would be tested with a typical temperature of +125 oC or up to +150 oC. In some cases, the testing conditions are customized based on specific customer requirements. Moreover, reliability conditions can also be customized to study some specific failure mechanism. SEMI: Can you describe for which one?Muthuraman: Thermal cycling profile is based on device application and/or specific requirement from our customer. For example, handheld devices use a typical temperature range of +85°C to -40°C with 20°C/min ramp time and 20 minutes of dwell time. There is possibility of adjusting the ramp and dwell time of the Temperature Cycling qualification test, provided such accelerated test does not lead to other failure modes.SEMI: What failure mechanism was the subject of the study in this specific case?Muthuraman: Electronic package reliability behavior without and with underfilled devices is explained in this study with the help of temperature cycling on board (TCoB) measurements and validated with numerical simulation. In the paper to be presented at SEMICON Europa, failure occurring at the interface of the solder and Under-Bump Metallization (UBM) structure is discussed. Behavior of such failure mechanism is illustrated with different WLCSP package sizes subjected to varying thermal load condition. One of the key aspects of the subject is the board-level reliability (BLR) measurement and simulation validation showing how the failure mode could be shifted from solder joint to the metal interface layers between UBM and interconnection to Silicon Chip, depending on the WLCSP design layout. The reasons for such shifts in Failure phenomenon are explained and necessary design optimization is suggested for improvement. Another key aspect of this study is determination of Fatigue Life Model for WLCSP family using the SACQ solder. SEMI: Are you currently working and experimenting on something particularly exciting?Muthuraman: Recently, we concluded our engineering analysis of thermomechanical reliability of Large Wafer Level Chip Scale packages. In September 2018, I presented this research work in an International Conference held in Dresden, Germany. Dialog Semiconductor GmbH was awarded the “Best Paper Presentation for the year 2018” for this work. This success is attributed to the entire team of Package and Material simulation experts at Dialog Semiconductor GmbH lead by Mr. Baltazar Canete and IC Package-Design Simulation group managed by Mr. Rajesh Aiyandra. We have started our investigation on the influence of Board Level Reliability of WLCSPs due to varying metal concentration of inter-metallic layer. We, at Dialog, are also working on possibility of thinner WLCSP. All these activities would include extensive Temperature Cycling on Board (TCoB) measurements, Statistical Analysis of measurement Data and would then be validated by Numerical Simulation. SEMI: What are your expectations for the future and why would you recommend attending SEMICON Europa Advance Packaging Conference?Muthuraman: SEMICON Europa is an important platform for Dialog Semiconductor GmbH to showcase the latest developments in the semiconductor industry. It is an opportunity to meet other industry experts, partners, and customers, and exchange various innovative ideas and to get new insights. Many semiconductor companies are based around the Munich area as well world-class universities. We are particularly interested in innovation, workforce and talent development themes. SEMICON Europa gives us a platform for greater interaction with the academicians and research scientists. This way, we bridge the gap between industry and University researches, thereby moving forward in innovative technologies. We, as Dialog Semiconductor GmbH, have also a development center near Munich (Germering). Our expectations for the future are very positive and vibrant. We are always ready to take up the industry challenges and demands and provide the best-in-class solutions to our product users. Dialog Semiconductor GmbH is certainly poised for higher growth in coming years. Balaji Nandhivaram Muthuraman BioBalaji Nandhivaram Muthuraman is a Packaging and Material Simulation engineer at Dialog Semiconductor GmbH, Germany. He has authored/co-authored conference publications including in the area of molecular dynamics simulation on assembly of carbon nanostructures; Analysis of thermoset material used in smart devices and reliability of wafer level packages. Recently, he has been awarded with the “Best Paper Presentation for year 2018” in the area of Board Level Reliability of Wafer Level Chip Scale Packages, in a recently held international semiconductor conference. His current areas of working interest include reliability investigation of electronic packages and developing fatigue models for reliability assessment of Dialogs products. He obtained his Bachelor’s degree in Aeronautical Engineering from Anna University, India and Master’s degree in Computational Mechanics of Materials and Structures from University of Stuttgart, Germany. Serena Brischetto is a marketing and communications manager at SEMI Europe.
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SEMI met with Gerald Beyer, program manager at imec, to discuss the co-existence of various 3D interconnect technologies and their need for new materials and integration solutions. The two talked in the runup to his presentation at the Advanced Packaging Conference at SEMICON Europa 2018, 13-16, November 2018, in Munich, Germany. To register for the event, click here. SEMI: Can you confirm this trend towards heterogeneous integration and do you think it will be a long-term development trend?Beyer: We consider heterogeneous integration as a scaling booster for functional partitioning and as a fashion method to create systems, which would not be possible or economical on such as a single chip. As you can apply it to numerous systems, we expect it to stay for the long term.SEMI: What are the new critical challenges for the combination of different technologies into one package?Beyer: When you create a complex system, there is usually more than just one challenge. On one side, you need to be able to design such a system. If you disintegrate a large chip, you need to decide how to reconstruct it, i.e. which function goes into which strata. You would like to do that not manually but with a set of tools supporting the designer. Only recently EDA (Electronic Design Automation) and design houses have started to support this idea.On the technology side, interconnections between some strata of such a reconstructed chip will require small pitch interconnects of the order of 1µm pitch and less. Today, wafer-to-wafer bonding technologies have sufficient overlay margins for 1µm pitch. Wafer-to-wafer bonding technologies, however, have a number of constraints such as equal die size and the necessity to realize chip stacking rather in a fab environment than in a traditional packaging house. Die-to-wafer assembly technologies still need to bridge the gap to deep sub 10µm pitch in terms of alignment and cleanliness.SEMI: What kind of new materials or integration solutions do you expect to be developed? Are you working on it already?Beyer: As explained above, die partitioning requires sub 1µm pitch interconnects. We are investigating fine pitch wafer-to-wafer and die-to-wafer (direct) bonding. For the latter, not only new alignment capabilities but also die cleaning and thin die handling technologies need to be developed. To build a complete system with data processing, memories etc., novel integration schemes such as Flip Chip – Fan Out Wafer Level Packaging with high density 2D and 3D interconnect capabilities are being investigated. These new systems differentiate from current ones by high density Through Package Vias (TPV), Si bridges and sub 2µm line/spacing RDL. The new integration approaches push the materials such Temporary Bond Materials (TBM), Wafer Level UnderFill’s (WLUF), photo patternable polymers for fine Line/Spacings to name a few, to the limits. Hence, development of new materials is a key aspect.SEMI: What trends and developments do you expect in the near future and why would you recommend attending the Advanced Packaging Conference?Beyer: The development and commercialization of products using heterogeneous integration is a big effort drawing on resources from EDA vendors, materials and packaging tool suppliers, OSATs, foundries, memory suppliers and IEDMs and academia alike. The agenda of the Advanced Packaging Conference at SEMICON Europa reflects this diversity and I am looking forward to interesting discussions with all participants. Gerald Beyer has been working in the field of 3D Technologies since 2012 as the technology program manager of the 3D System Integration Program of imec. Prior to this role, he was the interconnect program manager and group leader of BEOL integration. He received a PhD in materials science from Imperial College, London and a MSc from Thames Polytechnic, London.Serena Brischetto is a marketing and communications manager at SEMI Europe.
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Ahead of his presentation on the future of wearables at the European MEMS Sensors Summit 2018, 19-21 September in Grenoble, France, SEMI spoke with Dr. Peter Weigand, vice president, Business Strategy and Portfolio Management, Bosch Sensortec GmbH. Dr. Weigand gave a glimpse into insights he’ll share at the event.1. Wearables such as smartwatches, fitness trackers or hearables are becoming ubiquitous – but what are the must-haves for wearables for daily use by wearers?We see that users nowadays want to track their activities such as steps walked, calories burnt and floor levels “climbed” on a daily and holistic basis. “Quantifying yourself” is becoming an overall trend in our society with health, fitness and well-being continuously gaining in importance. This is only possible if information about activities is delivered comprehensively in an accurate manner. Therefore, at Bosch Sensortec we provide MEMS sensors that measure the user’s activity very precisely. For example, the smart sensor hubs BHI260 and BHA260 provide sophisticated in-sensor algorithms (e.g. activity recognition) with very low latency and guaranteed performance due to the real-time nature of the embedded software. From the system manufacturer’s perspective, “quantifying yourself” on a 24/7 basis means that the device has to be “always-on.”However, these always-on functions usually consume a lot of battery power, which poses challenges to the manufacturers and system designers, as the battery capacity is usually small due to the size of the wearable. This shows two other must-haves for the users nowadays. First, the compact size of the device. While smartphones have become larger, users of wearables benefit from the devices’ small size and their low weight, offering the possibility to wear them directly on the body. Therefore, we design the footprint and height of our MEMS sensors as small as possible to ensure the compact size and the ease of integration into new, stylish types of wearables. For example, the BMP388, measuring only 2 x 2 x 0.75 mm³, qualifies as the world’s smallest barometric pressure sensor. The second requirement in this regard is long battery life. Users do not want to charge their wearable device every other day, as this would also impede the always-on activity tracking aspect. At Bosch Sensortec, we hence provide MEMS sensors that run at ultra-low power to ensure always-on endurance and a long battery life. The BMA400 is an ultra-low power acceleration sensor that draws ten times less current than existing accelerometers.2. Are there any other user requirements for wearables?Yes, we see for example that just tracking the number of steps or the calories burnt is not enough anymore. Users require multi-functional devices that also provide information that can be used to monitor sleeping behaviour, navigate in cities, or prepare your smart home for your arrival. We are equipping our sensors with more features and developing new types of sensors that add new functionalities to wearable devices. For example, we have developed a smart watch Projection Module that can project information on the back of the user’s hand for an additional, enlarged display. While smart watches are rising in popularity, demand for basic wristbands is waning. Users are paying more attention to device design. Like clothing, the look and feel of the device should support the user’s individual style.At the same time, with more fashion brands are entering the wearables market we are providing sensors that are easy to integrate into new types of wearables such as hybrid watches. Our products feature a small form factor to ensure flexible, simple design-in. For example, the new BMA400 acceleration sensor easy to design into various applications. Finally, to conform to the user, the wearable must adapt to the user’s individual habits and motions such as learning different gestures, requiring the devices to be not only smart but increasingly intelligent with artificial intelligence (AI). We are providing sensors, such as the BHI260, with embedded, local intelligence with advanced algorithms that enable devices to learn. We are developing intelligent software solutions that use deep learning, enabling device to adapt to the user’s individual behaviour.3. What current techniques are design engineers using to reduce power consumption of wearables?Several techniques are being developed to reduce power consumption. The goal largely is to reduce the power draw of components that are always-on, such as the screen in a smartwatch. In activity trackers, the motion sensor is always on to sense, track, classify and store motion data. Reducing the power needed to operate these features will cut total system power consumption as well. A good example is our BMA400 accelerometer that has a current consumption of less than 1 µA in full operation.At the same time, it independently processes sensor data. For example, the device converts the three-axis motion sensor data stream into step counting events. This allows the main (host) microcontroller to remain in the stand-by mode required for activity tracking and to be activated by the accelerometer to deliver full power only, say, every 100 steps. The sensor, rather than the microcontroller, manages the overall duty cycling of the microcontroller to reduce system power and increase overall efficiency.4. What alternatives are engineers exploring to reduce power consumption? What is the role of intelligence directly within sensors for local processing capabilities in wearables?We have seen how the BMA400 can reduce power by integrating the motion classification functions. We can take this concept further by integrating a microcontroller that’s specifically tailored for low-power sensor data processing, such as the “fuser core” that Bosch Sensortec uses within its smart sensor hubs such as BHI260 or BHA260. The built-in sensor data fusion and machine learning hardware accelerators make it uniquely suited to reduce overall system power. The concept of edge computing has been around for many years, but only in this and the previous sensor generation with built-in local intelligence are we reducing the full power profile of the wearable device. Our sensor architecture design allows us to process the power locally in the MEMS sensor without waking up the main application processor.5. What technologies are you developing to lengthen battery life without compromising performance? We are continuously improving the MEMS and ASIC designs of our sensor portfolio to drive ever higher power efficiency. The BMA400 draws 10 times less current than existing accelerometers while delivering solid high performance (e.g. low-noise data). 6. Wearable device feature and performance requirements are continuously rising. Will batteries need to be larger to support these requirements? Since the beginning of the portable consumer electronics, improving batter life and reducing chip power consumption have been parallel efforts, a trend we expect to continue. However, we expect a greater focus on the overall system power reduction with sensors managing the power, turning on and off microcontrollers, radios (including GPS) and displays in wearable devices.7. What do you expect from European MEMS Sensors Summit 2018 and why do you recommend attending in Grenoble?The European MEMS Sensors Summit is a very important platform for us. It is an opportunity to meet partners, customers, industry leaders, to exchange ideas and to get new insights and thus to ultimately refine our solutions for our global customer base. Our ultimate goal is to improve people’s individual lifestyle and well-being.Serena Birschetto is a marketing communications manager in SEMI Europe.
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With less than one week before ISS Europe 2018, 4-6 March in Dublin, Ireland, industry growth is on the minds of the leading industry analysts, researchers, economists and technologists who will come together for critical insights into the forces shaping the electronics manufacturing supply chain.The three-day flagship business conference will feature a panel discussion on the role of Europe in the global electronics manufacturing supply chain and related business and technology trends. The Day 2 panel discussion will home in on critical strategies for growing Europe across the supply chain and elevating the region’s influence in Artificial Intelligence (AI) and other potential enablers of European competitiveness and technology leadership.SEMI Europe caught up with two industry leaders presenting at ISS Europe 2018 for their insights on technology and talent – two pillars of future industry expansion.Google: AI, Machine Learning and Ethical SolutionsDavid Sneddon, Director of Large Customer Sales for Central EuropeSEMI: As a Director of Large Customer Sales for Central Europe what is your primary focus? Sneddon: Right now my focus is mainly on advertising and marketing sales. For instance, I look after the advertising reviews for Google and YouTube for the DACH/CEE region. Our team offers both digital marketing advice as well as advice on logistics, translation of advertising and web assets, localisation of web/app assets and payment solutions.SEMI: What do you think are going to be the main challenges for the industry in the next two years?Sneddon: I think our industry will face two main challenges. For the technology industry as a whole, and in particular for the advertising sector, the first challenge will be to recognize the perception of the growing power of technology. Google, Facebook, and other big players should work closely with governments and regulatory officers in order to build trust. This is gaining importance within today’s users and leaders should commit to building trust. A second challenge is related to the growing importance of big data, AI and machine learning: industry players should be able to develop useful technologies but, most of all, ethical solutions.SEMI: Industry wide, what work/technology/trend has excited you this year? Sneddon: Innovations in machine learning and AI show how much machines can do to improve our daily life. Think about how Google Translate has developed. The first version was not so accurate but since the introduction of Google Neural Machine Translation system (GNMT), which takes advantage of deep neural networks, translations and sound are more accurate. If 2017 was huge for advancements in artificial intelligence and machine learning, 2018 may deliver even more. SEMI: What do you expect from ISS Europe strategic discussions and why would you recommend attending the event? Sneddon: I am attending SEMI ISS Europe for the first time and expect to hear peers’ high-level debates on the future of the industry, to be inspired and contribute myself. Top industry players should attend this event to stimulate the exchange of strategic discussions around innovation and technology. The key message that we, as leaders of this exciting industry, should deliver refers to the ethical aspects I have mentioned before. It is up to us to be prosperous and ethical at the same time and deliver positive messages for the year ahead. CEI-Europe AB: Smart Training for Smarter EngineersAnn-Charlotte Johannesson, CEOSEMI: As a CEO for CEI-Europe what is your primary focus?Johannesson: At the moment, my main focus is to refresh our approach in e-learning. CEI-Europe has organised classroom courses since 1980. We see now that there is a major need for e-learning courses and digital platform, so this is what I have been doing recently. Very soon a new website with a refreshed look and feel will be available.SEMI: What do you think are going to be the main challenges for the industry in the next decade?Johannesson: The industry must keep employees educated to keep them motivated and happy. As we all know, there is a lack of engineers in Europe. Fewer people are doing more work and, as a result, there is less time to stay on track with innovations, updates and trends. The investment in learning is happening but it is not enough. The industry’s main challenges will be: How do I train my team? How do I attract new people? Traveling to attend courses might be expensive and time-consuming, but a good alternative is to set targets for the training, learn what your company needs and offer individualized solutions. This is the way to prosper and stimulate people working in a fast-growing industry.SEMI: In what ways do you think the industry can change for the better?Johannesson: When it comes to education, it’s important for businesses to see it as an investment, not merely a cost. Think about the future, and invest in the future.SEMI: What do you expect from ISS Europe strategic discussions and why would you recommend attending the event?Johannesson: I’ve collaborated with SEMI a long time and am excited about presenting our perspectives for the future. I expect to meet and network with key leaders and discuss the main challenges for Europe and how to overcome those. How do we train smarter engineers? See you in Dublin!The combination of insightful presentations and unparalleled networking opportunities amongst senior industry leaders at ISS Europe promises to help stimulate ideas and strategies to take advantage of the opportunities that are rapidly developing in our industry.For full program details, please visit the ISS Europe 2018 agenda page online. To register, please visit: www.semi.org/eu/iss-europe-2018-registration
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