Save the Date: PDF Solutions announces an Executive Conference on the power of AI to transform semiconductor design and manufacturing
PDF Solutions, Inc. (Nasdaq: PDFS), a leading provider of comprehensive data solutions for the semiconductor and electronics ecosystems, today announced it will host an Executive Conference on the power of AI to transform semiconductor design and manufacturing. This event will take place on December 12, 2024, in downtown San Francisco, CA, following the 70th Annual IEEE International Electron Devices Meeting.
This one-day Executive Conference will feature presentations from PDF Solutions executives, industry thought leaders, solutions partners and customers on the state of art and best practices to design, deploy, scale, and manage trusted AI/ML solutions across the global semiconductor industry.
Additional information including agenda, logistics, and registration, will be available in the coming weeks.
About PDF Solutions
PDF Solutions (Nasdaq: PDFS) provides comprehensive data solutions designed to empower organizations across the semiconductor and electronics ecosystems to improve the yield and quality of their products and operational efficiency for increased profitability. The Company’s products and services are used by Fortune 500 companies across the semiconductor ecosystem to achieve smart manufacturing goals by connecting and controlling equipment, collecting data generated during manufacturing and test operations, and performing advanced analytics and machine learning to enable profitable, high-volume manufacturing.
The wide adoption of Artificial Intelligence is profoundly impacting many industries, perhaps none more so than the semiconductor industry. Beyond serving as a growth driver for chips across a diverse range of applications, AI and semiconductors are beginning a virtuous cycle where AI is helping to design more powerful chips that in turn enable more advanced AI. The semiconductor industry’s path to $1 trillion in annual revenue by the end of the decade is promising, thanks in large part to AI, but what will that journey actually look like?
This webinar will examine the industry’s AI-driven growth opportunities in depth, while looking at the technological innovation needed to fuel the market expansion. Dr. Handel Jones, CEO of IBS, and author of When AI Rules the World, will share his analysis of how AI will shape the outlook for semiconductor end-markets and segments – along with the race to achieve 1.0nm technology nodes and accelerate the virtuous AI-semiconductor development cycle. He will also cover the future of semiconductor market growth in the AI era as well as areas of opportunities.
SEMI Smart Data-AI Initiative and Future of Computing Update
10:10 am
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11:00 am
Dr. Handel Jones
CEO
IBS
Why AI Will Propel the Semiconductor Market to $1 Trillion and Achieve 1.0nm by 2030
11:00 am
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11:15 am
Q&A
Explore how Artificial Intelligence will impact the semiconductor market through the end of the decade with a deep-dive analysis of the fast-shifting industry landscape focusing in on growth across end markets and segments.
Analyzing AI-Driven Growth: $1T and Beyond
Webinar
November 20, 2024
10:00am - 11:15am PT
10:00 am - 11:15 am
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Add to Calendar2024-11-20 10:00:002024-11-20 11:15:00Analyzing AI-Driven Growth: $1T and BeyondExplore how Artificial Intelligence will impact the semiconductor market through the end of the decade with a deep-dive analysis of the fast-shifting industry landscape focusing in on growth across end markets and segments.United StatesSEMI.org[email protected]America/Los_Angelespublic
America/Los_Angeles
On-demand
In today’s fast-paced and interconnected world, the electronics industry faces unprecedented challenges from global disruptions, geopolitical uncertainties, and supply chain vulnerabilities. To remain competitive and resilient, organizations must adopt robust risk management frameworks that proactively identify and mitigate risks.
This webinar is brought to you by the Resiliency Working Group, part of the SEMI Supply Chain Management Initiative. We will explore the creation and implementation of an industry-standard risk management framework tailored to the unique complexities of the electronics supply chain. Attendees will learn how to assess potential risks, develop mitigation strategies, and leverage cutting-edge tools to improve visibility and responsiveness across their supply networks.
Key topics include:
• The critical risks impacting electronics supply chains and how to address them. • Best practices for building a resilient and adaptable risk management framework. • Strategies for real-time risk monitoring, supplier risk assessments, and scenario planning. • How to align your supply chain with industry standards for business continuity and operational stability.
Who should attend:
• Supply chain managers • Risk officers • Operations executives • Anyone involved in supply chain planning and resilience in the electronics sector
Join us to discover actionable insights and practical approaches to future-proof your electronics supply chain, ensuring it remains resilient, efficient, and prepared for any disruption.
Speaker bio:
Austin Evans is the Director of Supply Chain Risk Management at Intel. He is responsible for overseeing risk management for Intel’s supply chain as well as Intel’s Contingent Workforce Program Office. His organization is responsible for business continuity, governance, resilience, supply chain security and compliance.
Join us for a deep dive into the new industry-standard risk management framework tailored to the unique complexities of the electronics supply chain. Hosted by the SEMI Resiliency Working Group, this webinar will equip supply chain professionals with actionable insights on assessing critical risks, developing robust mitigation strategies, and leveraging advanced tools for real-time monitoring.
Building Resilient Supply Chains: Creating an Industry Standard for Risk Management
Webinar
Date: October 24, 2024
Off
Add to Calendar2024-10-24 00:00:002024-10-24 00:00:00Building Resilient Supply ChainsJoin us for a deep dive into the new industry-standard risk management framework tailored to the unique complexities of the electronics supply chain. Hosted by the SEMI Resiliency Working Group, this webinar will equip supply chain professionals with actionable insights on assessing critical risks, developing robust mitigation strategies, and leveraging advanced tools for real-time monitoring.United StatesSEMI.org[email protected]America/Los_Angelespublic
America/Los_Angeles
Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.
If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!
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9:00 am - 12:00 pm
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Add to Calendar2024-12-12 09:00:002024-12-12 12:00:00Silicon Wafer Japan TC Chapter MeetingSilicon Wafer Japan TC Chapter MeetingDate: Thursday, December 12, 2024Time: 9:00 am - 12:00 pm JSTVenue: Room 701, International Conference Tower 7F, Tokyo Big Sight, Tokyo, Japan in conjunction with SEMICON Japan + OVTCCM (Hybrid) PLEASE NOTE:- The venue this year is International Conference Tower, Tokyo Big Sight.- Please bring your SEMICON Japan visitor badge.AGENDA Standards Contact Information:Akiko YoshidaSenior Coordinator, SEMI JapanEmail: [email protected] Phone: 81.3.3222.6018 NOTE:Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!Questions? Contact your local staff coordinator: Click hereRoom 701, International Conference Tower 7F, Tokyo Big Sight 3-11-1 Ariake, Koto-ku Tokyo 1350063 JapanSEMI.org[email protected]Asia/Tokyopublic
Asia/Tokyo
Flexible Hybrid Electronics (FHE) Japan TC Chapter Meeting
Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.
If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!
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4:00 pm - 5:00 pm
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Add to Calendar2024-10-15 16:00:002024-10-15 17:00:00Flexible Hybrid Electronics (FHE) Japan TC Chapter MeetingFLEXIBLE HYBRID ELECTRONICS (FHE) JAPAN TC CHAPTER MEETINGDate: Tuesday, October 15, 2024Time: 16:00 - 17:00 JSTat TOYOBO + OVTCCM (Hybrid)AGENDA Standards Contact Information:Akiko YoshidaSenior Coordinator, SEMI JapanEmail: [email protected] Phone: 81.3.3222.5863 NOTE:Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!Questions? Contact your local staff coordinator: Click hereResearch Center, TOYOBO 1-1, Katata 2-chome Otsu-shi, Shiga 520-0292 JapanSEMI.org[email protected]Asia/Tokyopublic
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Heterogeneous Integration (HI) has come a long way in 50 years. The world of multi-chip modules (MCMs) has given way to a vast ecosystem of chiplets, 3D stacked die, and co-packaging of antenna, high-bandwidth memory (HBM), and optics. HI is at the center of “More than Moore” development activities, as innovative engineers look for creative ways to overcome the slower scaling of silicon technology. The promise of HI is new devices with superior power, performance, area, and cost (PPAC). All these promises come with new challenges. Managing different process nodes, physical characteristics, mechanical stresses, and other system-level challenges not found in monolithic system-on-chip (SoC) devices, creates a great opportunity for design and manufacturing companies to reshape our industry.
In this webinar, we’ll explore this enabling technology from both the device maker and material supplier perspectives. We will learn about demands placed on devices by new applications and what new tools are needed to meet these demands. We will also hear about the challenges placed on materials and equipment suppliers to develop processes capable of manufacturing the individual components and integrating them into final products. Join us as our panel of experts address the issues and opportunities involved with heterogeneous integration.
United States
Arsalan Alam, PhD
Member of Technical Staff (MTS), 3D Stacking Technology Group
AMD Packaging
2nd Generation 3D V-Cache™ Enablement
Andrea Chacko, PhD
Director of Packaging Solutions
Brewer Science
Dongshun Bai, PhD
Business Development Director and Senior Technologist of Packaging Solutions
Brewer Science
Enabling Heterogeneous Integration through Material Design
The realization of Heterogeneous Integration (HI) has been key in driving advancements in semiconductor technology. The complexities of integrating dissimilar materials continue to be a challenge for HI. All advanced packaging technologies rely on advanced materials to address the many challenges in achieving continued shrinking and improved performance of devices. Novel materials capable of managing mechanical stresses and increased thermal budgets with strict cleanliness requirements are required for processes such as wafer thinning, fan-out wafer-level packaging, and hybrid bonding. This presentation will highlight how advanced materials can address the growing challenges in the industry.
Dive into the dynamic world of semiconductor materials and discover the future landscape as the industry experts provide a glimpse into the future of the semiconductor ecosystem in the era of heterogenous integration.
Heterogenous Integration finds its place
Webinar
10:00 am - 11:00 am PT
Zoom
10:00 am - 11:00 am
Off
Add to Calendar2024-10-16 10:00:002024-10-16 11:00:00Heterogeneous Integration finds its placeDive into the dynamic world of semiconductor materials and discover the future landscape as the industry experts provide a glimpse into the future of the semiconductor ecosystem in the era of heterogenous integration.United StatesSEMI.org[email protected]America/Los_Angelespublic
America/Los_Angeles
REGISTER NOW
Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.
If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!
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2:30 pm - 4:30 pm
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Add to Calendar2024-12-11 14:30:002024-12-11 16:30:00Metrics Japan TC Chapter MeetingMetrics Japan TC Chapter Meeting Date: Wednesday, December 11, 2024Time: 14:30-16:30[JST]via SEMICON Japan @Tokyo Big Sight Conference Tower 7F Room 701 + OVTCCM (Hybrid) AGENDA Standards Contact Information:Hiroshi SatoSpecialist, Standards & EHS, SEMI JapanEmail: [email protected]: +81.3.3222.6018 NOTE:Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!Questions? Contact your local staff coordinator: Click hereSEMI Japan Tokyo Big Sight @ Room 701, 7F, Conference Tower 3-11-1 Ariake Koto-ku Tokyo 1350063 JapanSEMI.org[email protected]Asia/Tokyopublic
Asia/Tokyo
Toni Versluijs to chair CITC Supervisory Board from January 2025
Chip Integration Technology Center (CITC) today announced the appointment of Toni Versluijs as the new chairman of its Supervisory Board. Versluijs will serve as the incoming chairman from September through December. Effective January 1, 2025, he will take over the responsibilities from chairman Roel Fonville who is retiring.
Versluijs has an extensive background of more than 25 years in the semiconductor industry, of which more than 15 years in general and executive management roles. Prior to this appointment, he worked for NXP, where he led the In-Vehicle Networking product line and was NXP Nijmegen site director and statutory director of NXP Netherlands. Most recently, he led the Business Group MOS at Nexperia, served as statutory director for Nexperia in the UK and was part of the company’s global executive leadership team.
He explains his choice for CITC: “I look forward to using my many years of experience in the semiconductor industry to contribute to the success of CITC in Nijmegen. Nijmegen is a location with a long heritage in semiconductor packages that have changed the world. CITC is a unique venture and has a unique position between private parties, the academic world and knowledge institutes.”
CITC is a smaller and different kind of organization than his previous employers, but Versluijs sees the potential: “CITC has attracted quite some talent in recent years, built partnerships and initiated new developments. In short: it has laid the foundation for growth, and it will flourish in the coming years. I am convinced that it has the potential to change the world of semiconductor packaging again.”
The current chairman of the CITC Supervisory Board, Roel Fonville, adds: “The Supervisory Board is very pleased to welcome Toni Versluijs to our midst. His personality and broad experience in the industry and in the Nijmegen region will help the Board to fulfill its role in securing the continued development of the organization.”
About CITC
Chip Integration Technology Center (CITC) is a non-profit, joint innovation center specializing in heterogeneous integration and advanced chip packaging technology. CITC has created an effective ecosystem in which companies, research and educational institutes work on bridging the gap between academics and industry. CITC's contribution to the ecosystem is to provide access to innovation, infrastructure, and education. CITC was founded in 2019 with strategic partners TNO and Delft University of Technology and is supported by local and regional governments. www.citc.org
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1:30 pm - 3:00 pm
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Add to Calendar2025-02-19 13:30:002025-02-19 15:00:00Automation Technology Japan TC Chapter MeetingAutomation Technology Japan TC Chapter MeetingDate: Wednesday, February 19, 2025Time: 13:30-15:00 JSTvia OVTCCM/ SEMI Japan Office (Hybrid) AGENDA Standards Contact Information:Akiko Yoshida, Senior Coordinator, SEMI JapanEmail: [email protected] Phone: 81.3.3222.5863 NOTE:Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!Questions? Contact your local staff coordinator: Click hereSEMI Japan Office 26F, xLINK Marunouchi Eiraku Bldg. 1-4-1 Marunouchi, Chiyoda-ku Tokyo 1010005 JapanSEMI.org[email protected]Asia/Tokyopublic
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1:00 pm - 3:00 pm
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Add to Calendar2024-09-02 13:00:002024-09-02 15:00:00Physical Interface & Carrier (PI&C) Japan TC Chapter MeetingPhysical Interface & Carrier (PI&C) Japan TC Chapter Meeting Date: Monday, September 2, 2024Time: 1:00pm-3:00pm JSTvia OVTCCM/ SEMI Japan AGENDA Standards Contact Information:Hirofumi KannoSr. Manager, SEMI JapanEmail: [email protected]: 81.50.5805.3805 NOTE:Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!Questions? Contact your local staff coordinator: Click hereSEMI Japan SEMI Japan Office 26F, xLINK Marunouchi Eiraku Bldg. 1-4-1 Marunouchi, Chiyoda-ku Tokyo 1000005 JapanSEMI.org[email protected]Asia/Tokyopublic
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