Smart Manufacturing

With edge AI emerging as a clear driver of smart manufacturing, SEMI hosted a two-day workshop detailing the future of this technology. The workshop, Smarter Sensors, Smarter Fabs: AI at the Edge in Semiconductor Manufacturing, was held in-person from March 18-19 in Milpitas, California. It convened industry professionals to explore how AI-driven sensors and edge intelligence are fostering scalable and resilient solutions for the next generation of semiconductor manufacturing. The workshop took place across four sessions, with each highlighting a unique edge-AI implementation area – including process control, yield enhancement, tool coordination, and predictive maintenance – and featured keynotes from leaders at Lam Research and KUKA. Didn’t get a chance to attend in person? View this workshop on demand. Session 1 - Smart Sensors and Edge Intelligence for Advanced Process Control​The semiconductor industry has always been defined by precision. However, as device architectures shrink to angstrom-scale dimensions, and as wafers become thinner and more fragile, traditional process control tools are reaching their limits. Sampled, low-frequency, univariate monitoring systems were built for an era where deviations were visible, failures were catchable later, and a handful of sensors per tool were enough to keep yield in check. Session 1 explored the latest sensor technologies, discussing how data collection at the point of production, with AI embedded directly into the tool, is becoming paramount for success. Advanced in-situ sensors were brought up as an example of this in practice. Although these sensors are generating richer signals than in the past, reaching lower latency requires AI models deployed at the edge.In addition, AI is extending into the physical world through robots that can handle various tasks autonomously. These robots are enabled by digital twins that provide simulation environments for training and validation before they ever see the fab floor. The common thread across Session 1 was the growing need for data and knowledge integration in fabs. Smart sensors must be built into AI systems, and those systems must be scalable across tools without sacrificing speed or reliability. Finally, the insights they generate must flow back into maintenance optimization and equipment health monitoring to promote a continuous cycle of learning. Session 2 - Yield Enhancement Through Edge-Driven Defect Detection and Classification​ Session 2 focused on how edge AI models, process sensors, and image data can identify yield-impacting defects earlier in the manufacturing process. As semiconductor devices lean into 3D architectures, the complexity and volume of data have outpaced the capabilities of traditional monitoring tools. Today's fabs are required to evaluate terabytes of inspection images per hour, as well as tool sensor traces that require analysis across dozens of parameters simultaneously. Each speaker approached this challenge from a different angle, yet the solutions fit together into a coherent architecture. One introduced Gaussian Process Regression, a model for assessing both predictions and uncertainties, as a statistically rigorous, data-efficient method for learning "golden trajectory" baselines for tool sensor signals. This generates actionable scores and maintenance guidance beyond standard anomaly alerts. Another speaker demonstrated the ability of deep learning models to triage multi-gigabit-per-second image streams in milliseconds. AI-based defect classification was shown to compress root cause analysis timelines from days to hours, with demonstrated gains of a 0.3% die yield recovery and 0.5–1% yield exposure prevention. Predictive metrology for RF filter frequency also assessed device performance using upstream process data, with less than 0.02% error.Lastly, a software-defined automation framework built on open standards and vendor-neutral architecture demonstrated effective workload consolidation onto a single edge platform. It was shown to be scalable across fabs without replacing legacy infrastructure.These presentations stressed the importance of measurement and action in real-time at the tool level. Gathering information as early as possible, using AI to triage and classify, and feeding insights back into process control and maintenance workflows, allows for a continuous cycle of improvement.Session 3 - Autonomous Work in Process Movement: Robots, Sensors, and Edge AI Coordination​The "lights out" factory is shifting from an aspiration to a concrete, engineering roadmap. To fully realize this, each presentation in Session 3 highlighted the importance of supplementing human-dependent workflows with AI systems that can act in real-time. This shift will require a mix of deep reinforcement learning and AI-based perception approaches. Currently, deep reinforcement learning is training agents to discover new routing strategies that optimize yield, equipment effectiveness, cycle time, and queue-time compliance – including joint front and back-end-of-line coordination for advanced packaging. AI-based perception is also on its way to replacing manual, pre-shipment inspection checklists, demonstrating inspection time reduction by as much as 78%. To enable these improvements, presenters suggested private 5G as the foundational connectivity infrastructure. Currently, private 5G is helping eliminate dead zones and bandwidth issues that are preventing real-time machine data and connected robotics from reaching their full potential.Based on these presentations, the prevailing formula is to integrate intelligence at every level. This includes precise in-situ sensing to eliminate manual setup and measurement, edge AI models that act on data immediately, platforms that coordinate across tools without humans, and lastly, a reliable connectivity infrastructure.Session 4 - Predictive Maintenance at the Edge: From Vibration to VisionSemiconductor fabs have long operated in a state of crisis management. Fab managers spend between 40% and 70% of their time firefighting unexpected equipment failures, rather than executing planned maintenance strategies. Unplanned downtime in semiconductor manufacturing can cost up to $1 million per hour, yet the maintenance industry has been slow to move beyond reactive repairs. Fab managers need faster ways to determine issues and act on that knowledge before wafers are lost. Session 4 outlined a framework for how this transformation will happen. At the foundation, smarter sensors (vibration, acoustic, thermal, spectral, and vision) are generating the high-fidelity, multi-modal data streams that make predictive models possible. In addition, "ultra edge" AI accelerators are enabling machine learning inference to happen directly inside MEMS sensors and on-device hardware without cloud dependency. Fabs require low-latency, data-sovereign, real-time decisions that the cloud is unable to support, and the path forward requires an integrated chain of sensing, edge inference, health scoring, and maintenance scheduling. This session also made the case that irrelevant correlations and confounding variables make purely statistical AI unreliable for root cause analysis, and that causal AI models are required to give fabs actionable information. It concluded that cybersecurity concerns, soaring cloud infrastructure costs (datacenter GPU prices reaching $25,000–$50,000 each in 2025–2026), and latency requirements have made distributed, machine-local intelligence the only viable path to achieving autonomous fabs. SummaryThis workshop highlighted how edge AI, smart sensors, and advanced connectivity are transforming semiconductor manufacturing by enabling real-time process control, faster defect detection, and more autonomous operations. Across sessions, experts emphasized that integrating AI directly at the source of data is essential for improving yield, reducing downtime, and building scalable, resilient “smart fabs.”Learn more by registering for this workshop on demand, or view the recap videos on LinkedIn. Day 1 recap Day 2 recap The SEMI Manufacturing Coalitions include Smart Manufacturing, Fab Owners Alliance (FOA), MEMS and Sensors Industry Group (MSIG), Advanced Packaging Heterogeneous Integration (APHI) and Semiconductor Components, Instruments, and Subsystems (SCIS).Anshu Bahadur leads the Smart Manufacturing Initiative, Karim Somani leads the Fab Owners Alliance (FOA), and Paul Carey leads the MEMS and Sensors Industry Group (MSIG), all of which are part of the Technology Coalitions at SEMI.

The SEMI Smart Manufacturing Initiative is a global effort focused on leveraging the most advanced technology to enhance productivity of electronics manufacturing facilities. Among the key technology advances this group seeks to promote is the value of implementing Industry 4.0/5.0 technology to deliver increased return-on-investment (ROI). A recent white paper published by the initiative focused on the productivity improvements that can be achieved by the formation of digital twins in semiconductor plants [1]; however, sustainability was not the focus, providing an opportunity for future pre-competitive work.To address this, the SEMI Smart Manufacturing Initiative formed the Accelerating Sustainability with Smart Manufacturing task force in 2023 to benchmark industry best practices that enable manufacturing facilities to meet their sustainability goals faster. The roadmap would complement the SEMI Sustainability Initiative by following a bottom-up approach to identifying the industry’s best practices. The task force primarily focused on fab device production, which is widely seen as the largest driver of the microelectronics industry’s Scope 1–2 emissions, water use and hazardous waste consumption, versus other branches of the supply chain.This task force developed a comprehensive solutions-based Scope 1 (process-based, direct) and Scope 2 (energy-based, indirect) emissions roadmap, incorporating the Connecting, Sensing and Predicting pillars developed by the Smart Manufacturing Initiative [2], and applied them at cleanroom, subfab and facilities levels for brownfield device-making facilities. While these phases are meant to be cumulative for maximum impact on targeted sustainability metrics, the SEMI task force understands that not every fab that applies the roadmap as a tool for sustainability purposes will advance use cases all the way to the Predicting phase. Moreover, special use cases are defined for greenfield fabs in a separate section of the roadmap, covering new infrastructure and more disruptive changes to existing operations to guide streamlined deployment. These key features are the foundation used to develop the first half of the roadmap for addressing Scope 1 and 2 emissions, leveraging Industry 4.0/5.0 technology, and published as a collaborative SEMI white paper [2]. The second half of the roadmap presented at SEMICON West 2025 [3] is covered in this latest white paper [4] and follows the same methodology though focused on reducing water consumption and hazardous waste in device-making fabs. Altogether, both SEMI white papers comprise the first comprehensive semiconductor industry roadmap covering carbon emissions, water and hazardous waste, while emphasizing the benefits of smart technology. The roadmap numerically rates each innovative use case in terms of relative impact on reducing a fab baseline void of smart elements and based on technology readiness level (TRL) with respect to future production capability. This functional roadmap will be available soon to the industry as a customizable model, denoted as the SEMI Smart Sustainability Model (SSM), wherein users can estimate sustainability gains by applying some or all listed use cases based on the nature of the facility’s sustainability profile and goals (i.e. relative proportion of water consumption sources at all levels of their operation, by adjusting weighted impact factors in the model). A base case assessment of proportional resource consumption representing an industry average 300mm fab, based on published data and task force estimates, is provided for fabs without detailed tracking to constitute the SEMI Smart Sustainability Roadmap.Many sustainability organizations across the semiconductor industry are focused on problem-based assessments which often highlight water scarcity or total industry carbon footprint growth and this can lead to IDMs, foundries, OSATs and others in the supply chain tackling sustainability from an isolated, project-based perspective. Moreover, a top-down approach to sustainability in fabs does not scale as well as a bottom-up approach to counteract the issue of increasing device process complexity and the larger associated process flow, requiring a higher amount of carbon emissions, water and hazardous waste, which needs to be addressed. For instance, a purchase power agreement for renewable energy is determined based on a finite amount of expected fab energy usage. However, energy-efficiency aided by AI across all levels of the fab is much more scalable, as a fab expands or additional process steps are added per product. Therefore, a data-driven approach, tracking emissions, water, and waste and linking technologies to future targets, is most effective, making this roadmap unique in scope and approach. A unified fab-wide data platform leveraging digital twins can further improve outcomes by linking water and waste metrics with downstream KPIs like recycling rates.The roadmap’s best practices can apply to any device-making fab, as it relies on Industry 4.0/5.0 technologies rather than compromising process flows as in alternative fab sustainability models. ROI benefits identified include cost-savings on process materials, utilities, regulatory, and labor plus higher yield and shorter cycle time after implementation. In summary, the use cases within the customizable model are quantified based on normalized impact to the current baseline level so that device-makers can benchmark themselves and prioritize investment in the most effective technologies to meet their sustainability goals.For future updates on the SEMI Smart Manufacturing Initiative, including the upcoming SSM product release, please visit the Initiative's website. To learn more about the roadmap, download prior white papers: White Paper 1: Accelerating Sustainability with SEMI Smart Manufacturing White Paper 2: Accelerating Sustainability with SEMI Smart Manufacturing: AI Roadmap for Device Makers Part II References:[1] M. da Silva and K. Somani, "Digital Twins in Semiconductor Manufacturing," SEMI, Milpitas, CA, 2024.[2] B. Coppa, A. Srivastava and M. da Silva, "Accelerating Sustainability with Smart Manufacturing: Roadmap for Device Makers," SEMI white paper (Available here) - November 2024.[3] B. Coppa, A. Srivastava, “SEMI Smart Sustainability Roadmap Part II: AI Blueprint for Device Makers,” at SEMICON West, October 2025.[4] B. Coppa A. Srivastava, “Accelerating Sustainability with Smart Manufacturing: AI Roadmap for Device Makers Part II” SEMI white paper (Available here) – May 2026 Brian J. Coppa, Ph.D., is Product Engineering Lead at ULVAC. Amit Srivastava is Staff Program Manager – Smart Manufacturing AI at Micron. Mark da Silva, Ph.D., is Senior Director, Manufacturing Coalitions at SEMI. Anshu Bahadur is Senior Program Manager, Technology Coalitions at SEMI.

The semiconductor industry is hitting a structural inflection point: explosive AI‑driven demand, rapidly rising manufacturing complexity, and stringent sustainability expectations are converging at once. In this context, edge AI deployed directly on tools, sensors, and local controllers, is shifting from experimental to essential, particularly in fabs where milliseconds matter. SEMI’s timely workshop, Smarter Sensors, Smarter Fabs: AI at the Edge in Semiconductor Manufacturing, taking place March 18–19, 2026 in Milpitas, CA, will address this important topic.From sparse sensing to dense instrumentationTwo decades ago, most process tools relied on dozens of sensors per chamber. Today, leading etch, deposition, CMP, and lithography systems routinely integrate hundreds of sensing channels spanning pressure, flow, RF power, optical endpoint, vibration, and chemistry. At 3 nm and 2 nm, process windows are so tight that yield hinges on multivariate understanding of chamber conditions and tool state rather than a few independent alarms. Sensor proliferation has turned fabs into rich data environments—but also exposed the limits of traditional, centrally managed control.Why edge AI is displacing cloud‑only controlConventional architectures push heavy analytics to centralized servers or the cloud, with supervisory systems periodically updating recipes, setpoints, or dispatch rules. Across manufacturing, measured cloud round‑trip times commonly range from 800 to 2,400 ms, whereas edge systems co-located with equipment can respond in 15–45 ms, roughly 50–160× faster. For safety‑ and yield‑critical loops in semiconductor manufacturing, that latency gap is often unacceptable.At the same time, new generations of low‑power neural processing units (NPUs) and edge accelerators deliver tens of trillions of operations per second (TOPS) at single‑digit watt budgets, making always‑on inference viable inside tools, cameras, and controllers. The result is a decisive move toward edge‑native architectures: models execute where data is produced, while cloud resources are reserved for retraining and fleet‑wide learning.Edge AI on the line: control, inspection, and maintenanceIn process control, edge AI is enabling a shift from univariate threshold checks to multivariate models that understand the joint dynamics of sensor streams. Platforms today embed deep‑learning and statistical models directly at or near the tool, performing real‑time endpoint prediction and anomaly detection from high‑dimensional time series. Similar approaches are emerging in lithography and CMP, where local inference helps keep focus, overlay, and removal rate within spec before wafers drift out of control.Inspection and logistics are undergoing a similar transformation. Vision systems with embedded NPUs classify defects at line speed, often above 100 parts per minute, eliminating the need to ship large image volumes to a central cluster. Robots and autonomous mobile robots (AMRs) use local intelligence for short‑horizon planning and collision avoidance, while higher‑level systems focus on global scheduling and optimization.Predictive maintenance is one of the most mature applications: vibration, acoustic, temperature, and pressure data are analyzed locally to detect anomaly signatures hours or days before conventional thresholds trip. Reported benefits include reductions in unplanned downtime, longer component life, and lower maintenance costs when these models are integrated into manufacturing execution systems (MES) and maintenance workflows.Digital twins and agentic AI on top of edge dataDigital twins build on this sensing and edge‑analytics foundation. By maintaining virtual, live‑updated models of tools, lines, and entire fabs, they enable scenario testing, debottlenecking, and root‑cause analysis without putting WIP at risk. Vendors and early adopters report that such twins can shorten process‑node ramps and facility bring‑up by enabling thousands of “what‑if” experiments before physical changes are made.​Agentic AI is now emerging as the orchestration layer above these twins. In semiconductor case studies, agents connected to MES, advanced process control (APC), and planning systems have delivered double‑digit improvements in throughput, cycle time, and tool utilization by autonomously adjusting routing, batch sizes, and scheduling in response to live fab conditions. Other agents mine unstructured engineering notes and fault reports to accelerate root‑cause analysis, turning hard‑won lessons into repeatable, codified behavior.Sustainability as a first‑class requirementSustainability pressures are reinforcing this stack. Semiconductor manufacturing is energy‑ and resource‑intensive, and regulators and customers alike are demanding more transparency and improvement. Edge‑connected monitoring of energy, utilities, and emissions has already helped some fabs cut energy‑related costs by around 20 percent through tighter control of HVAC, process gases, and idle modes. Research initiatives such as imec’s Sustainable Semiconductor Technologies and Systems (SSTS) program are using virtual fab methods and detailed life‑cycle assessment to guide process and equipment choices for lower environmental impact.Strategic takeaways and where to learn moreThe trajectory is clear: fabs that combine dense sensing, edge AI, digital twins, and agentic AI are building toward continuously learning, self‑optimizing operations. Architectures will need to be edge‑first rather than cloud‑only. Simply adding sensors without local intelligence will not deliver competitive advantage, and environmental KPIs are likely to be optimized with the same rigor as yield and cycle time.For practitioners who want to translate these trends into roadmaps, the Smarter Sensors, Smarter Fabs: AI at the Edge in Semiconductor Manufacturing” workshop (March 18–19, 2026, Milpitas, CA) spearheaded by the SEMI Manufacturing Coalitions* will bring together experts in sensing, edge architectures, digital twins, and agentic AI to share concrete deployments and architectures tailored to semiconductor fabs.*The SEMI Manufacturing Coalitions include Smart Manufacturing, Fab Owners Alliance (FOA) MEMS and Sensors Industry Group (MSIG), Advanced Packaging Heterogenous Integration (APHI) and Semiconductor Components, Instruments, and Subsystems (SCIS). Anshu Bahadur is Senior Program Manager, Technology Communities at SEMI. Mark da Silva is Senior Director, Manufacturing Coalitions at SEMI.

At SEMICON Europa 2025, the Executive Forum programs brought together experts from across the semiconductor value chain to address two critical challenges shaping the industry’s future in Europe: the transformation of the automotive sector and the pursuit of smarter, more competitive manufacturing.Smart Mobility in a Changing MarketKnut Krümmel, Senior Partner Automotive at Porsche Consulting, set the tone with a stark question, “Are we facing a Detroit scenario in Europe, especially in Germany?” – a reference to the decline since the 1990s of the famous “Motor City.” He pointed out that all three of Germany’s giant OEMs, Volkswagen, Mercedes-Benz and BMW, are rapidly losing market share in China in the face of a destructive price war, and have suffered large declines in reported earnings. Krümmel outlined four strategic imperatives for Europe’s auto industry: reduce complexity and increase standardization, become software-defined, design regulation that supports innovation, and build stronger partnerships across the ecosystem. He emphasized, “A new mindset is needed—people need to be hungry to win and prepared to suffer in pursuit of victory.”Knut Krümmel, Senior Partner Automotive, Porsche Consulting GmbHAndreas Aal, Head of Semiconductor Strategy at Volkswagen AG and Chair of Europe at SEMI Smart Mobility Global Automotive Advisory Council (GAAC), introduced a proactive approach to redefine the market. He shared Volkswagen’s vision for mobility-as-a-service, exemplified by its roboshuttle pilot in Hamburg. “It is very difficult for a traditional OEM to go into the full digital services world. But this is what we want to do,” said Aal.Andreas Aal, Semiconductor Strategy Volkswagen AG and Chair of Europe GAAC, VolkswagenJan-Philipp Gerhmann, Vice President of Marketing and Strategy for Automotive at NXP Semiconductors, added that the traditional value chain is being upended. The industry is shifting from a hierarchical supply chain to vertical integration, with companies like Tesla designing their own chips. Gehrmann introduced NXP’s CoreRide platform, a modular “skateboard” architecture enabling plug-and-play Advanced Driver Assistance Systems (ADAS) and infotainment features for future vehicles.Jan-Philipp Gehrmann, Vice President of Marketing Strategy, NXPA perspective on the future of semiconductors in autonomous vehicles was provided by Dieter Hoffend, Business Director for Automotive at imec: “For autonomous vehicles, you need a higher-end compute capability, which needs a transition to smaller nodes – and that is very costly. In fact, semiconductor companies will not want to commit volume to automotive customers for their most expensive leading-edge ICs. This means that a chiplet architecture will be the most cost-effective approach for vehicles, and will provide the greatest supply chain resilience. To support this, imec’s vision is of an open chiplet marketplace of heterogeneous chiplets which are interoperable.”Dieter Hoffend, Business Director Automotive Sector, imecAchieving End-to-end Manufacturing ExcellenceThe Executive Forum then shifted to a discussion of smart semiconductor manufacturing. Giovanni Notarnicola, Partner at Porsche Consulting, highlighted the untapped potential of AI in fabs. “AI requires massive amounts of data—but fabs often don’t own or control their data. And second, AI talent doesn’t typically reside in semiconductor companies,” said Notarnicola. His recommendation: “AI is not an IT issue—it’s a cross-functional technology. Isolating AI in the IT department is an old-fashioned view which will deter AI talent from joining the industry.”And Notarnicola encouraged the industry to leverage the new white paper produced by SEMI End-to-End Smart Manufacturing Group, which provides an in-depth report on the application of AI in semiconductor fabrication. Giovanni Notarnicola, Partner, Porsche ConsultingOliver Aubel, Corporate Lead for Automotive Solutions at GlobalFoundries, echoed the opportunity. “We have 1 billion sensors in a fab, but 30% of the signals are statistical noise. AI could help us make better sense of the data.”Oliver Aubel, Corporate Lead for Automotive Solutions at GlobalFoundriesA session on smart manufacturing brought to light other proven methods for improving the performance of fabs. Dr. Holland Smith, Director of Data Science at INFICON, described fab control technology that INFICON had helped STMicroelectronics to deploy. As Thomas Gimmig, Director for Industry 4.0 at STMicroelectronics, said, “Our model was a highway control room – a place where a single person controls 220km of road monitored by 400 cameras, and handles one alert every three minutes on average. This is only possible with a huge amount of automation.”Left: Thomas Gimmig, Director for Industry 4.0 at STMicroelectronics; Right: Dr. Holland Smith, Director of Data Science at INFICONAt STMicroelectronics, the new fab control room mimics this model, automating anomaly detection and problem solving. Smith described how the system will not be limited to detecting and handling anomalies which have already occurred. “There is a plan to look ahead at problems which could emerge in future, and to configure it to make proactive suggestions which will prevent anomalies from occurring in the first place,” said Smith. Jamie Potter, co-founder and CEO of Flexciton, showcased how intelligent scheduling tools based on real-time fab capacity are transforming operations. “In the modern fab decisions must be made more frequently, with more intelligence and with fewer people. And that is why fabs need to be made more autonomous,” said Potter.Jamie Potter, CEO Cofounder, Flexciton Ltd“Our tool is based on a dynamic capacity model of the fab, so WIP optimization is based on knowledge of what the fab can actually do now, rather than – as is normally the case in fabs today – on an abstract algorithm which is derived from operational results observed in the past.” Potter said. Robert Wallace, Solutions Architect at Seagate, which has deployed the Flexciton technology, confirmed the impact: “We increased throughput without increasing cycle times, and saw a 30% drop in deviations from forecast completion times.” Robert Wallace, Solutions Architect at SeagateAntoine Amade, President (EMEA) of Entegris, emphasized the importance of benchmarking to guide performance improvements: “We have a robust library of fab case studies. These benchmarks can become the foundation for best practices.” Antoine Amade, President (EMEA) of EntegrisRegulatory Burdens and Regional Challenges In a panel session, the discussion turned to the issues that European semiconductor manufacturing faces in particular. Herbert Blaschitz, Executive Vice President of Advanced Technology Facilities at Exyte, put a strong emphasis on the drag that European regulation imposes on the construction of new fabrication plants: “There is three times more paperwork to complete in Europe than in Asia.” Blaschitz made the contrast with Taiwan, “where they have standard codes of regulation specifically for a wafer fab. In Europe, we have regulations for skyscrapers, we have regulations for building family homes. But we have nothing for wafer fabs.”It could be worse for companies building all new fabs. According to Stephen Rothrock, President and CEO of ATREG, “We are affected by permits and politics most of all when trying to push through the repurposing of fabs.”From Left to Right: Mark Puttock, Sr. Director - Technology and Innovation, Entegris; Giovanni Notarnicola, Partner, Porsche Consulting; Stephen Rothrock, President/CEO, ATREG; Jean-René Lèquepeys, Deputy Director and Chief Technology Officer, CEA-Leti; Herbert Blaschitz, Executive VP of Advanced Technology Facilities, Exyte; Oliver Aubel, Corporate Lead Automotive Solutions, GlobalFoundriesSustainable Manufacturing Practices: A Source of Competitive Advantage?The forum ended with a debate on the value of and problems with Europe’s commitment to sustainability. As Mark Puttock, Senior Director for Technology and Innovation at Entegris, acknowledged concerns that sustainability practices could raise costs and reduce process efficiency. But Jean-René Lèquepeys, Deputy Director and Chief Technology Officer at CEA-Leti, countered: “sustainability can be a competitive advantage. For instance, the industry is under pressure to eliminate PFAS from its processes. CEA-Leti is working on this problem, and the whole world is looking for a solution.”The event concluded with a moment of celebration: Ilya Zabelinsky, Co-founder of the International Subfab Research Labs (ISRL), won a diamond prize sponsored by Nanores Lab,Left: Jakub GawczyńskiJakub Gawczyński, Head of Nanores Lab; Right: Ilya Zabelinsky, Co-founder of the International Subfab Research Labs (ISRL)On behalf of SEMI, we extend our sincere gratitude to the speakers, sponsors, and participants who contributed their expertise and vision to the programs at SEMICON Europa 2025.SEMI ContactAna Bernardo, Senior Manager of Technology Programs SalesEmail: [email protected]

The CxO Summit at SEMICON Europa 2025 spotlighted Europe’s ongoing efforts to build a resilient and globally competitive semiconductor industry, while calling for greater ambition, speed, and unity in execution. Following global disruptions with the automotive supply chain crisis, the European Union launched a continent-wide strategy through the EU Chips Act. While the Act has already spurred significant developments, including construction of the new ESMC fab in Dresden, Europe remains far from its goal of achieving a 20% share of global semiconductor production by 2030. The CxO Summit, part of the SEMICON Europa event in Munich, provided an opportunity for industry leaders to share ideas about how to catalyze the next phase of the European industry’s growth.Ajit Manocha, President and CEO of SEMI opened the summit by describing today’s industry landscape with one word: “unprecedented.” Manocha said, “The global growth of the industry is unprecedented, with 107 new fabs set to come online by 2028, but the uncertainties are unprecedented, from geopolitics to the talent shortage to environmental concerns. So we need unprecedented solutions.” Ajit Manocha, President and CEO, SEMILaith Altimime, President of SEMI Europe echoed the mood of uncertainty, describing Europe as caught “in a perfect storm.” Altimime said, “As we face a combination of internal challenges and intensifying external competition, collaboration is not optional — it is mission critical.” Laith Altimime, President, SEMI EuropePierre Chastenet, Head of the Unit for Microelectronics and Photonics, European Commission, highlighted the tangible progress made under the EU Chips Act. “We now have a proper toolbox to handle a future crisis in the supply chain. The Chips for Europe initiative has led to the creation of five pilot lines for advanced technologies such as FD-SOI and wide bandgap semiconductors.” Chastenet added, “Europe must now capitalize on its strengths, from materials and equipment to design tools and cutting-edge research emerging from our RTOs.”Pierre Chastanet, Head of the Unit for Microelectronics and Photonics, European CommissionEchoing the call for action, Oliver Schenk, Member of the European Parliament, urged stronger regional unity. “Europe must act together, act faster, and act with much bigger ambition,” Schenk said, reinforcing the need for cross-border commitment to strengthen the continent’s semiconductor position.Oliver Schenk, Member of the European Parliament, European ParliamentHighlighting Europe’s most critical technology gap, Luc Van den hove, President and CEO of imec, unveiled plans for a new advanced fab backed by €2.5 billion in investment from the EU, the Flemish government, and ASML. Van den hove urged Europe to commit wholeheartedly to advanced technologies: “We must be more ambitious, and focus on disruptive breakthroughs rather than incremental change if we want to ensure a prosperous future.”Luc Van den hove, President CEO, imecAt the CxO Summit, CEA-Leti and ASML signed a memorandum of understanding (MoU) to deepen their collaboration and accelerate innovation in mainstream semiconductor technologies. Building on promising results in hybrid bonding, the partnership will now target 'More-than-Moore' innovations, including heterogeneous integration and novel substrates like SiC and GaN. “We aim to combine ASML’s world-class lithography expertise with CEA-Leti’s system-level innovation,” said Sébastien Dauvé, CEO of CEA-Leti. The collaboration is set to strengthen Europe’s ecosystem by shortening the path from early research to industrial impact.Left: Anne Hidma, Senior Vice President EUR US, ASML; Right: Sébastien Dauvé, CEO, CEA-LetiTurning to Europe’s industrial base, Christian Senger, CEO of Volkswagen Autonomous Mobility, emphasized the need to shift from risk-aversion to opportunity. While the region’s automotive sector faces intense global competition, particularly from China, Senger highlighted that Europe has the potential to lead in new mobility markets. “The market for autonomous roboshuttles for people transport in large cities is forecast to be worth €400 billion in the US and Europe alone,” he said. With American firms like Waymo and Uber leading the robotaxi space, Senger stressed that Europe must “act swiftly to create an environment that supports an autonomous mobility industry here.”Christian Senger, Member of the Board for Fully Autonomous Mobility and Transport CEO of ADMT GmbH, VolkswagenEurope’s Potential to Create Advanced TechnologyOne of these RTOs, CEA-Leti, is responsible for the FAMES pilot line for FD-SOI technology. Sébastien Dauvé, CEO of CEA-Leti, agreed with Pierre Chastenet that the pilot lines show great promise. He said, “FD-SOI is a big trend in semiconductors, because it enables very low power consumption in embedded devices. We think that adoption of the technology will grow in the coming years, and that is good, because most of the technology is produced in Europe.”Sébastien Dauvé, CEO, CEA-LetiEurope is also widely recognized to be the leading global voice on sustainability – a huge issue of concern to the semiconductor industry. Henri Berthe, President of the Semiconductor and Battery Segment at Scheider Electric, told the summit that 500 million tonnes of CO2 emissions per year are attributable to the semiconductor industry – “more than the whole of Mexico emits!” he said. “We need to make fabs more efficient, and that is why Schneider Electric has launched a new playbook with Applied Materials for sustainable energy abundance for the industry.”Henri Berthe, President of the Semiconductor Segment, Schneider ElectricAnother aspect of Europe’s playbook is support for new fabs. The flagship is ESMC, the joint venture between TSMC, NXP Semiconductors, Bosch, and Infineon. Christian Koitzsch, president and managing director of ESMC, reported to the summit that the project to build in Dresden a 12nm FinFET foundry and a 28nm CMOS line, requiring a total investment of €10bn, is on schedule. “We are now developing local supply chains, hosting a series of ESMC Supplier Days which are open not only to German but generally to European suppliers,” said Koitzsch.Christian Koitzsch, President and Managing Director, European Semiconductor Manufacturing Company (ESMC)As Manfred Horstmann, General Manager and Senior Vice President of Global Foundries, pointed out, the building of the ESMC fab means that Dresden is established as the center of a cluster of semiconductor industry companies. “Global Foundries has its Fab 1 and a mask center in Dresden. In fact, one-third of the chips produced throughout the whole of Europe now comes from Dresden.”Manfred Horstmann, General Manager and Senior Vice President, GlobalFoundriesAn example of ambition was given by Terence Gan, Executive Director of the Institute of Microelectronics of Singapore. Gan told the summit how Singapore has used pilot lines to stimulate research and development in new technologies. He said: “We started research into advanced packaging as long ago as 2011. Most people thought we were mad! But today, there is strong demand for our advanced packaging capabilities because of the rise of AI and its need for high-performance computing.”Terence Gan, Executive Director, Institute of MicroelectronicsBreaking Barriers to ProgressDespite momentum, bureaucratic inefficiencies continue to hamper progress. Narjiss Haddaoui, Managing Director of European Economics called for faster decision-making: “In global competition, speed is a decisive factor. To act fast enough, the EU must change its ‘software’ - the processes by which it considers and makes decisions.” Narjiss Haddaoui, Managing Director, European economicsThe stifling character of European bureaucracy is reflected in the region’s approach to building fabs. Herbert Blaschitz, Executive Vice President of Advanced Technology Facilities at Exyte, compared fab construction timelines: 20 months in Taiwan, 34 in Europe, and 38 in the U.S., attributing delays in Europe to paperwork bottlenecks.Herbert Blaschitz, Executive VP of Advanced Technology Facilities, ExyteFabio Gualandris, President for Quality, Manufacturing and Technology at STMicroelectronics raised another concern — 100% of raw materials used in European fabs come from outside the region. Christophe Frey, Vice-President for EU Engagements at Arm France, added that geopolitical tensions are clouding the path forward: “We are a bit lost in the smoke from the big fire in the world’s semiconductor industry.” Fabio Gualandris, President Quality, Manufacturing Technology, STMicroelectronics Christophe Frey, Vice-President of EU Engagements, Arm FrancePlaybooks For Future SuccessSo amid the uncertainty and global tension, what lessons can the industry learn from successful regional examples? Tuomas Korpela, Business Development Senior Manager at Nokia, credited Finland’s strategic procurement and policy tools with enabling a vibrant semiconductor ecosystem: “Finland creates demand for advanced chips using industrial policy tools, alongside strategic procurement in sectors such as defense and aerospace, and connectivity.” Tuomas Korpela, Business Development Senior Manager - Corporate Development Organization, NokiaAt a regional level, Joerg Schulze, Director of the Bavarian Chips Alliance, said that his organization was supported by the Bavarian State Ministry of Economic Affairs, as well as by companies and universities. “We help semiconductor companies to establish themselves and grow here through help with site searches, networking and contacts, funding and support, and talent acquisition,” said Schulze.Joerg Schulze, Spokesperson for the Bavarian Chips Alliance, Director of the Fraunhofer IISB, Bayern Innovativ GmbHCompanies in the European semiconductor supply chain also provided the summit with their insights into the roots of global success. André Grede, Chief Technology Officer of Comet, described how his company’s strategy is not to wait for customers to tell it what they need, but to be “ahead of the curve.” Grede said: “Is staying in sync with the customer enough? Not for us - we are deeply embedded with our customers, and constantly looking to broaden our relevance to them.”André Grede, CTO, CometChristophe Maleville, Chief Technology Officer of Soitec, provided a real-world example of how this is done. He said: “Our engineered substrates using RF-SOI technology reduce the drain on a mobile phone’s battery power, and cut our customers’ board footprint thanks to RF front end integration. As a result, our products are now in 100% of 5G smartphones.”Christophe Maleville, CTO, SoitecAnne Hidma, Senior Vice-President for Europe and the US at ASML, shared the company’s success formula: “The reasons for ASML’s success include customer focus – decide which markets you are going to be in, and which you are not. We are also all-in on innovation. We nurture an ecosystem, which for us includes imec and CEA-Leti, as well as partnerships with academia. And lastly, we have a strong supply base, which is a core strength of Europe.” In a time marked by both uncertainty and opportunity, the example of ASML shows how the European semiconductor supply chain can survive and thrive.Anne Hidma, Senior Vice President EUR US, ASMLEurope’s Path ForwardThe CxO Summit made one thing clear: Europe has world-class innovation, policy momentum, and industrial commitment. What’s needed now is faster execution, deeper collaboration, and the courage to invest in the technologies of tomorrow. As the industry heads toward the $1 trillion milestone, the decisions made today will shape Europe’s place in the semiconductor world for decades to come.On behalf of SEMI, the SEMI Europe team would like to express appreciation to the industry leaders for sharing their visions and readiness to collaborate during the CxO Summit.SEMI ContactLaith Altimime, President SEMI [email protected]

Digital Twins are no longer a futuristic concept in semiconductor manufacturing—they’re fast becoming the backbone of next-generation fabs. But here’s the challenge: without a robust, scalable data platform to unify, secure, and interpret the torrent of information flowing across design, manufacturing, packaging, and test, digital twins cannot deliver their transformative potential. At SEMICON West in Phoenix, Arizona on October 6, 2025 from 1–5 p.m., join us for a high-impact technical workshop that explores how advanced data platforms are fueling the next wave of innovation—enabling smarter, faster, and more precise decisions across the semiconductor lifecycle.What You’ll Learn – Gain insights on proven reference architectures for scalable data platforms, integration patterns that support digital twin ecosystems, real-world use cases from fabs and OSATs applying AI/ML at scale, best practices in managing governance and security across complex data pipelines.Modern Data Platform Architectures – Designed for speed, scale, and semiconductor precisionBreaking Down Silos – Leveraging shared ontologies and data fabrics for seamless interoperabilityAI-Enhanced Digital Twins – Real-world deployments across fabs and OSATsFederated Learning in Action – Secure, multi-party collaboration without compromising IPData Security Governance – Proven practices for high-stakes manufacturing environments Distinguished Speakers – Hear directly from leaders advancing digital twin and federated learning initiatives at the SmartUSA Institute and across the semiconductor ecosystem. Anshu Bahadur, Senior Program Manager, Technology Communities at SEMI, will open the workshop and introduce speakers who will share how they’re building these next-generation platforms and deploying them across fabs, OSATs, and the full manufacturing flow. Following individual presentations, the session will close with a panel discussion featuring these executives. Ross Kunz, Director of Technology, SmartUSA Institute (Keynote Speaker)Dr. Adam Schafer, CEO, Athinia TechnologiesDhara Vaishnaw, Head of Solution Architecture, AWSDr. Gautham Unni, Head of Solutions and Business Development, Semiconductor, AWSJonathan Holt, Senior Director, Product Management, PDF SolutionsDr. Surya Kalidindi, CEO, Multiscale TechnologiesWho Should Attend? This workshop is designed for: Data Platform Architects building the next-gen semiconductor backboneSmart Manufacturing Engineers integrating fab and test dataAI/ML Practitioners scaling models into production workflowsInnovators shaping digital twin systems for complex, high-precision manufacturing Why Attend? Because the future isn’t waiting. Digital Twins, powered by scalable data platforms, are redefining how the semiconductor industry innovates, collaborates, and competes. Don’t just keep up with the future—build it. Anshu Bahadur is Senior Program Manager, Technology Communities at SEMI

As the global semiconductor industry charges toward a projected $1 trillion market by 2030, regional innovation hubs are stepping into the spotlight. The inaugural SEMIEXPO Heartland—held April 1–2, 2025, at the Indiana Convention Center in Indianapolis—brought together key players from across the ecosystem to explore how advanced packaging, smart manufacturing, smart mobility, AI, and workforce development are fueling the semiconductor revolution.With a special focus on building self-reliance in the U.S. chip supply chain, the event highlighted efforts that are revitalizing the Midwest’s role as a key region driving innovation in the global semiconductor ecosystem. SEMIEXPO Heartland showcased leading-edge strategies and technologies from global giants and regional champions alike—underscoring the deep connections between government, academic, research, and industry leaders.Keynote HighlightsSK hynix: Accelerating the Future with Chiplets and Advanced PackagingDr. Woong Sun Lee, Senior Vice President at SK hynix, kicked off the event with a powerful vision for the future of semiconductor manufacturing. In response to skyrocketing demand fueled by AI, autonomous vehicles, and next-gen mobile applications, SK hynix is pursuing aggressive innovation through heterogeneous integration and chiplet-based design.Using 12-inch wafers, SK hynix’s chiplet strategy compresses product development timelines from 10-20 years to as little as 2-5 years. This leap in design efficiency enables faster time-to-market and greater performance optimization—crucial in an industry where speed and scale are paramount.A major component of this vision is the company’s investment in a state-of-the-art advanced packaging facility in Indiana. Targeting mass production by 2028, the new hub will not only expand SK hynix’s U.S. manufacturing footprint but also support national goals around workforce development and ecosystem growth. It’s a bold move that aligns the company’s R D leadership with America’s strategic reshoring efforts.Robert Bosch Semiconductor: Driving the Future with Silicon Carbide (SiC)Thorsten Scheer, Regional President Mobility Electronics and Plant Manager at Bosch Roseville, presented a deep dive into how Bosch is preparing for the electrified mobility era. Central to Bosch’s strategy is the adoption of silicon carbide (SiC) semiconductors, which are increasingly critical to electric vehicle powertrains.As vehicles become more connected and automated, Bosch projects more than 40 semiconductor chips per car by 2035. To meet this demand, Bosch is developing dual-channel trench MOSFET technology using SiC—a move that enhances power conversion efficiency and reduces heat, two of the biggest challenges in EV design.Bosch’s global expansion includes a new SiC wafer fab in Roseville, California, which is set to begin production in 2026. This facility is not only a technological investment but also a commitment to supply chain resilience, ensuring that the U.S. plays a central role in future automotive innovation.Polar Semiconductor: Reshoring Advanced Foundry CapabilitiesSurya Iyer, President and COO of Polar Semiconductor, shared the company’s mission to reinvigorate America’s semiconductor manufacturing capabilities. Headquartered in the Midwest, Polar is a rare U.S.-owned foundry playing a strategic role in reshoring production and building domestic capacity.Specializing in power semiconductors—including MOSFETs, IGBTs, and wide-bandgap (GaN) devices—Polar focuses on serving critical sectors such as automotive, aerospace and defense, and industrial applications. With advanced automation and a commitment to cost-efficient scale, the company is helping to bring more semiconductor innovation back to U.S. soil.Polar’s flexible business models and emphasis on workforce training position it as a linchpin in the nation’s efforts to build a more secure and agile semiconductor supply chain.Smart Manufacturing and Mobility SessionsUnlocking the Future with AI, Edge, and Digital TwinsThe opening session on April 1 showcased how AI and advanced simulation are transforming the semiconductor manufacturing process. NHanced Semiconductor introduced "Foundry 2.0," a platform delivering chiplet-based solutions tailored for low-volume, high-mix applications—highlighting flexibility and speed.Kulicke Soffa emphasized the use of AI, digital twins, and agentic automation in backend operations, helping to cut costs and boost efficiency. Humatics demonstrated its Milo microlocation system, addressing factory automation and labor challenges with precision positioning technologies.Meanwhile, Purdue University’s research in chip-package co-design and semiconductor education reflected the essential role of academia in building future-ready capabilities.AI, Edge, and Digital Twins in Backend ManufacturingThis session continued to explore the shift toward intelligent, connected manufacturing ecosystems. Allan Lewis of Nordson Electronics Solutions showcased AI-powered inspection systems that reduce downtime and improve yield.Jim Redman from ErgoTech Systems emphasized the importance of scalable, decentralized data platforms using low-code tools. Luis Rivera of Koh Young Technology introduced KSMART Server and CFX standards, enabling real-time optimization and machine-to-machine communication.Josh Mangahas from INFICON detailed how digital twins and AI/ML models are enhancing production scheduling and delivery timelines, while Mahesh Deshpande of Dassault Systèmes illustrated how virtual twins and XR-based tools are supporting agile packaging environments.The Convergence of AI, Robotics, and Digital TwinsSession 3 on April 2 featured cross-disciplinary insights from leaders at Arizona State University (ASU), Fraunhofer IZM, Teradyne, and Purdue. A common theme: AI, robotics, and digital twins are converging to redefine factory dynamics.Dr. Binil Starly (ASU) explained how reinforcement learning and MQTT protocols are enabling adaptive robotic inspections. Erik Jung (Fraunhofer IZM) highlighted how packaging and AI systems evolve in tandem to achieve tighter integration and higher performance.Teradyne’s Mat Najibnia focused on the ROI of robotic material handling systems, while Purdue’s Dr. Martin Jun shared a vision for democratized smart manufacturing—especially for small and medium-sized manufacturers (SMMs).Building Future-Ready Semiconductor EcosystemsThe final session underscored the importance of collaboration, resilience, and cybersecurity. Athinia discussed its work harmonizing raw material and fab data to improve manufacturing insights. IBM presented use cases combining digital twins and generative AI for yield improvement and predictive maintenance.Siemens focused on sustainability and decarbonization through digital twin platforms. The Florida Semiconductor Engine (FSE) illustrated how regional ecosystems can support leadership in packaging innovation and talent development.PEER Group spotlighted the Semiconductor Manufacturing Cybersecurity Consortium (SMCC), advocating for a standardized, collaborative approach to securing manufacturing infrastructure.Workforce Development and Regional ImpactA strong undercurrent throughout SEMIEXPO Heartland was the need for strategic workforce development. The event featured a Workforce Pavilion offering job seekers access to career coaching, resume guidance, and mentorship.Local universities and community colleges were well represented, as were federal and state workforce programs. These partnerships are crucial to ensuring a robust talent pipeline and equipping workers with the skills needed for a rapidly evolving industry.The presence of SK hynix, Polar, and other major players making sizable investments in the Midwest signaled not just a resurgence of regional manufacturing, but a renewed commitment to community growth, equitable opportunity, and long-term sustainability.A Midwest Moment with Global ImplicationsSEMIEXPO Heartland 2025 captured a pivotal moment in the evolution of the semiconductor industry. From chiplets and SiC to AI-driven smart factories and cyber-resilient ecosystems, the event highlighted how innovation, collaboration, and policy alignment are driving progress.As America looks to fortify its semiconductor future, the Midwest is emerging as a powerhouse of talent, technology, and tenacity. With support from industry, government, and academia, the region is well-positioned to lead the charge into a smarter, more secure, and more resilient semiconductor era.For questions about SEMI’s Smart Manufacturing initiative, contact Anshu Bahadur at [email protected]. Read more about SEMIEXPO Heartland in this press release: Inaugural SEMIEXPO Heartland Event Underscores Midwestern U.S. as a Global Hub for Smart Manufacturing and Smart Mobility.Anshu Bahadur is Sr. Program Manager, Technology Communities at SEMIRafael Tudela is Sr. Technical Marketing Manager at SEMI

The semiconductor industry is at a pivotal moment, with smart manufacturing, smart mobility and workforce development as key drivers in the industry’s path to reach $1 trillion in revenue by 2030. Bringing together key stakeholders from the semiconductor ecosystem, SEMIEXPO Heartland will take place on April 1-2, 2025, in Indianapolis and explore the latest advancements and opportunities to foster growth, accelerate innovation and reinforce the Midwest as a thriving hub for semiconductor manufacturing.SEMI sat down with Purdue University President Mung Chiang who shared his insights on growing semiconductor industry in the Midwest, how Purdue is making an impact, and a sneak peek into his upcoming keynote presentation at SEMIEXPO Heartland.SEMI: How important is semiconductor industry expansion in the Midwest?Chiang: Purdue’s partnerships with industry leaders, state and federal government are essential to advancing the U.S. semiconductor industry and establishing the Midwest region as the Silicon Heartland. The Department of Defense-funded Silicon Crossroads Microelectronics Commons innovation hub is a partnership between Indiana, Illinois, and Michigan, while the Midwest Microelectronics Network is in collaboration with Ohio, Illinois, and Michigan.An event like the SEMIEXPO Heartland in Indianapolis gathers industry representatives from across the nation to see the potential and value that Indiana and the Midwest bring and provides a great forum to explore strategies for collaboration and innovation.SEMI: How important is collaboration between industry and academia to advance semiconductor innovation and address workforce challenges?Chiang: Enabled by semiconductors, artificial intelligence (AI) continues to advance rapidly. Purdue is a national academic leader in microelectronics and semiconductors in part because of industry partnerships – both nationally and internationally – that help us align our research and workforce development to the needs of our industry partners.Collaborations among industry, academia and government will be critical to strengthening America’s position in the global semiconductor landscape and securing our technological future. Two recent examples are our partnership with SK hynix to fill a critical gap in the U.S. semiconductor supply chain and our partnership with SEMI, the leading global microelectronics industry association, to create online courses aimed at bolstering the semiconductor workforce.SEMI: How are Purdue’s innovations contributing to those fronts?Chiang: World-leading research, transformational investments in infrastructure and pioneering education are all part of Purdue’s contributions to advance the semiconductor industry.Strategic initiatives like the first comprehensive, large-scale Semiconductor Degrees Program, advised by a board of industry leaders, lead the way to high-quality workforce development at scale. Experiential education, such as programs like “Summer Training, Awareness, and Readiness for Semiconductors” (STARS) for undergrads, energizes first-year students and provides a strong foundation to prepare the next generation high-tech workforce, a critical step in cultivating the talent needed to drive the industry forward.Birck Nanotechnology Center, one of the nation’s state-of-the-art academic research centers, is another prime example of Purdue driving innovation. This facility will soon become the first and only digital-twin-enabled semiconductor research lab in the world.SEMI: What are the highlights of your keynote address for the SEMIEXPO Heartland?Chiang: I’ll point out that these are exciting times in Indiana – two new semiconductor clusters are emerging, one in West Lafayette at Purdue focused on the commercial sector and one at Westgate, near the Naval Surface Warfare Center Crane, focused on the defense sector.The initiative at Purdue is led by SK hynix, the world’s leader in high-bandwidth memory for AI; MediaTek, the world’s fifth-largest fabless design company and a leader in chips for smartphones, tablets, TVs, and Internet of Things products; and by imec, the world's leading independent semiconductor research and innovation hub.Our goal is to leverage Purdue’s excellence at scale to work with our partners and create a new, thriving, vibrant, and growing semiconductor hub in the heartland and to connect this growing commercial sector to the emerging defense sector at Westgate.We look forward to working with our partners in the Midwest to make the Heartland one of the few critical regions of semiconductor manufacturing, design, innovation, and talent development in the United States.SEMI: Part of SEMIEXPO Heartland’s focus is on smart manufacturing. What strategic collaborations in smart manufacturing are driving innovation forward?Chiang: Smart manufacturing is being driven, in part, by the continuing advancement of AI and digital twins. The semiconductor industry already is partnering with computational modeling and fabrication leaders like Purdue University to develop the digital twins and play a major role in training the workforce and accelerating the pace of innovation.The NIST-funded SMART USA Manufacturing Institute for Digital Twins is a $1 billion plus program that brings industry and academia together. Purdue looks forward to playing a leading role in this important initiative.Maintaining a strong connection between academia and industry can help accelerate design and innovation of new U.S. chip development and manufacturing concepts through cost reduction, product optimization and real-time process adjustments.ResourcesHear more from academic leaders, industry executives and government officials about the semiconductor expansion and opportunities for growth in the U.S. Midwest during SEMIEXPO Heartland event, April 1-2, 2025, in Indianapolis. Visit the SEMIEXPO Heartland website to view the full agenda: https://semiexpo.semi.org/.Mung ChiangMung Chiang is the President of Purdue University, and the Roscoe H. George Distinguished Professor of Electrical and Computer Engineering. Prior to being selected university president in 2022, he was the John A. Edwardson Dean of the College of Engineering and executive vice president for strategic initiatives at Purdue University.Chiang received BS (1999), MS (2000) and PhD (2003) from Stanford University and an honorary doctorate (2024) from Dartmouth College. Before 2017, Chiang was the Arthur LeGrand Doty Professor of Electrical Engineering and an affiliated faculty in Computer Science and in Applied Mathematics at Princeton University.SEMI ContactSherrie Gutierrez, Marketing Communications ManagerEmail: [email protected]

The semiconductor industry continues to push the envelope to meet demands of key applications such as advanced computing, consumer electronics, and defense, as well as environmental sustainability. There remain several critical challenges that our industry is working diligently to address, but how can these issues be tackled more effectively and at a pace that can keep up with this ever-evolving landscape?SEMI sat down with Supika Mashiro, Advisor at Tokyo Electron, where she shares her perspective on the importance of strengthening industry collaboration and what SEMI is doing through its first-ever SEMI Global Standards Summit – “Innovating Tomorrow: Standards for Future Factories” – of which she chairs the Planning Committee responsible for organizing this Summit.Trio: What is the SEMI Global Standards Summit and why is this event timely?Mashiro-san: Topics such as advanced packaging, cybersecurity, as well as supply chain and materials innovation (and their impact to the environment) are considered strategic areas requiring more industry collaboration. Many of these areas also greatly benefit from standards, and the next generation specifications and guidelines will need to be engineered to meet the technical challenges we face today and in the future. The magnitude of these standardization efforts will require engagement from all stakeholders in the design-to-manufacturing value chain as well as multiple Standards Developing Organizations (SDOs) coordinating and collaborating with each other.This is the driving force behind the Summit, and the need to bring together industry stakeholders to identify standards-critical areas and align on developing an industry standardization strategy for the next 3- and 7-year time horizons. We are excited to host this inaugural event on December 12, 2024, in conjunction with SEMICON Japan 2024. Trio: What is the focus of the Summit?Mashiro-san: The Global Standards Summit will cover three main themes: Smart Manufacturing for Future Factories, Packaging Architectures Materials, Environmental Sustainability.Factories are increasing their use of digital twins, predictive maintenance, and AI/ML to improve productivity and yield across the entire manufacturing environment. To take full advantage of these approaches, factories must reduce cybersecurity risks and secure the transfer of “smart” data across the entire supply chain while protecting IP. There is a need for standards to address these risk areas, as well as help diverse advanced analytics systems interoperate to assist personnel in increasing factory productivity. In the Smart Manufacturing for Future Factories session, we will be focusing on autonomous fabs, cybersecurity, and flow-oriented manufacturing.Similarly, packaging technologies have been progressing since the early stages of semiconductor device development more than 70 years ago. More recently, where packaging occurs in the semiconductor process has evolved, and some of the packaging processes are now done as an extension of front-end manufacturing. Moving forward, packaging architecture and materials are becoming increasingly important, driven by the adoption of heterogenous integration to address demands for more complex functionality and reduced power consumption as well as enabling chiplet integration. In the Packaging Architecture Materials session, we will discuss what kind of standardization our industry requires for copper-copper (Cu-Cu) direct interconnection, hybrid bonding, and panel-level packaging. We will also explore glass substrates as well as standards needed to enable semiconductor assembly and test automation.Our third session recognizes that the semiconductor industry is heading into an era of NetZero, in which quantification of environmental performance can have meaningful financial impact. The methods of measuring and accounting the environmental impact such as carbon emissions and the presence of substances of concern in manufacturing and products are not uniformly consistent across the industry. In order for the semiconductor industry to better navigate and make a positive impact in this arena, a consistent set of standards will be crucial. In the Environmental Sustainability session, thought leaders will present on communicating substance of concern (SOC), reporting of process emissions from factories, as well as lifecycle assessment of materials and substances used in semiconductor manufacturing, including equipment.Last but not the least, we will feature a panel session where we will explore all of these topics in a discussion with our panelists.Trio: Who should attend the Summit and why?Mashiro-san: The Summit is intended for leaders who are interested in these standardization topics to come and engage. Attendees will hear and learn about the issues critical to the future advancements of semiconductor manufacturing, what’s happening to address them, as well as new standards development. Attendee engagement is critical as we want our participants to influence and be able to contribute to the direction of standards development by providing valuable insights to help optimize future factories. To facilitate industry collaboration, we have organized networking events with other stakeholders from suppliers and solutions providers to end customers. The Summit is just one of many compelling reasons for industry stakeholders and thought leaders to come to SEMICON Japan. There are several sessions on many related topics that we are covering in the Global Standards Summit. Ultimately, at the conclusion of the Summit, we expect to have identified lists of critical standards areas, and we would like for those leaders to be able to assign and dedicate resources to these standardization efforts.For more information about the inaugural SEMI Global Standards Summit, please visit the SEMICON Japan 2024 site and register today!Supika Mashiro works as an Advisor for Strategic Planning of Industry Initiative Group at Tokyo Electron Limited.She has been involved in Factory Integration (FI) IFT of IRDS since its inauguration in 2016 and a co-chair since 2017. Her area of interest and involvement encompasses “smart” technology applications in manufacturing equipment, its co-optimization with Fab operation as well as ESH/S (Environment, Safety, and Health/ Sustainability) road-mapping and related industry standard development. For the latter, she has taken a couple of leadership roles in SEMI Standards Program as well as IEC TC/44.Paul Trio is Director of the SEMI Standards program.

Use of machine learning and artificial intelligence (ML/AI) is on an exponential rise across fields1 including all aspects of the semiconductor industry. In the last decade, the use of ML/AI exploded in the areas of speech recognition, facial recognition, smart phone features, search engines and now large language models like ChatGPT, Bard AI, and CoPilot. The ML/AI growth has been enabled by massive data storage capacity and increased compute performance, leading to projections for the semiconductor industry to reach over $1 trillion in annual revenue by 2030, with about 50% of the industry’s growth related to GenAI2. Figure 1: McKinsey Company on GenAI driving semiconductor industry growthAs semiconductor manufacturing drives toward Industry 4.0, SEMI member companies have a vision of Industry 5.0, truly adaptive manufacturing, integrating human creativity with robotic precision enabled by AI. Along that path, automation and data exchange in every step of manufacturing is essential, with data acquisition, data integrity and relevance, and operational Digital Twins3 as defined steppingstones to the factory of the future.Based on growing member interest in ML/AI, in 2019, SEMI assembled technology communities that quickly engaged in AI discussions and proofs of concept, discovering gaps in the path to Industry 4.0. Successful demonstrations of the value of AI in chip manufacturing process development and factory efficiency, not to mention GenAI uses in society, hastened the pace to produce faster, more powerful chips to accommodate the computation and communication requirements. Recognizing the industry opportunity and the mounting role AI plays in the semiconductor supply chain, SEMI initiated several thought leadership efforts, namely the Smart Manufacturing Initiative, Smart Data-AI Initiative, and the Future of Computing think tank.Smart Manufacturing According to the SEMI World Fab Forecast, over 100 new and expanded wafer fabs will begin volume production by 2027. This massive capacity expansion will need to achieve the highest possible operational efficiency and performance. To this end, the Smart Manufacturing Initiative is a technology community with over 120 member companies collaborating pre-competitively to transform manufacturing. The SEMI Smart Manufacturing Global Executive Committee (GEC), outlined a roadmap vision for the cognitive factory of the future based-on technology, sustainability and future talent. The GEC has been working with members to realize that vision. Figure 2 describes this vision in terms of the technology progression needed and the approximate timeline for implementation by most manufacturers. The proliferation of this vision through Smart Manufacturing Forums at SEMICON events around the globe, newsletters and blogs has garnered enormous interest and participation in the initiative and is central to the mission of connecting and raising awareness within the ecosystem. Figure 2: AI-Driven Smart Factory (Point Systems to Autonomous Solutions) To move the needle on this vision, industry experts in the initiative successfully created and launched the Industry 4.0 Readiness Assessment Model (IRAM) to help assess technology deployment progress. IRAM adoption is steadily growing. Modern front-end and back-end lines produce an extraordinary amount of multi-modal data from a variety of sources, and this is key to success in unlocking the potential of AI in manufacturing environments. The initiative’s global working groups on Data Architectures and Smart Control Room among others are working towards a holistic Cognitive Factory framework uniting the vertical and horizontal flow of information. Integral to the Cognitive Factory are smart manufacturing standards, that will accelerate the vision outlined above, and without which local solutions are unlikely to scale.In 2023, the Smart Manufacturing Initiative brought together industry leaders in a unique Digital Twin workshop to align on the state of semiconductor development and usage. The key takeaways from this workshop are captured in a white paper that highlighted the need to accelerate efforts in multiple areas including standards. Along with SEMI International Standards, Smart Manufacturing supports other standards development organizations (SDOs) and NIST standards development, for example, to identify and drive critical standards for Cognitive Factory implementation. The initiative is planning future workshops on Cognitive Factory Framework requirements, Digital Twins, and Smart Data AI in the coming months. that highlighted the need to accelerate efforts in multiple areas including standards. Along with SEMI International Standards, Smart Manufacturing supports other standards development organizations (SDOs) and NIST standards development, for example, to identify and drive critical standards for Cognitive Factory implementation. The initiative is planning future workshops on Cognitive Factory Framework requirements, Digital Twins, and Smart Data AI in the coming months.The GEC has identified critical interrelationships in addition to the technology focus. At the intersection with sustainability, the initiative has formed a collaborative task force with the SEMI Semiconductor Climate Consortium (SCC) to develop a bottom-up technology roadmap that can be used as a blueprint for device makers to meet their proclaimed sustainability goals faster. The task force organized a technical session at SEMICON West 2024 and will be releasing a white paper in the near future. Similarly, the initiative is working with the SEMI Foundation to identify necessary future skills and to make training available through SEMI University. Smart Data AI – Applying AI to Semiconductor OperationsSEMI’s Smart Data-AI Initiative started by assembling a group of interested companies to explore the pivotal role AI could play in the industry and to address the criticality of data. All stakeholders agreed that a formidable challenge was (and still is) the integrity of that data and the security of sharing that data, which is considered IP to most. The optimal implementation of ML/AI techniques can only be gained by access to the comprehensive data set which is owned by numerous supply chain partners. Consequently, semiconductor R D, process and design have not yet realized the full benefit of Data-AI advances. In response, the initiative developed a framework to create value for members and support industry progress. Four pillars underpinning the strategy are:Educating stakeholdersBuilding communitiesExecuting proof-of-concept projectsDeveloping industry standardsTo explore the data challenges the subject matter experts highlighted, a collaborative proof-of-concept (POC) project was proposed in 2019 and accepted by the initiative's partners at Army Research Laboratories4 along with academic and industry partners. The project has completed two phases and is starting on its third phase under the expert guidance of an Industry Advisory Council (IAC) comprised of leaders in the Smart Data-AI community.The POC project, being conducted by principal investigators at Cornell University, demonstrated significant accomplishments from the first two phases, including:An AI model to predict device geometry by optimizing photolithography and plasma etching processesInitial demonstration of secure data-sharing techniques with software-hardware co-optimizationInnovative metrology ideas to train AI algorithms rapidlyStudents trained in cross-disciplinary skills to address the industry’s critical talent shortageFurthermore, the visionary objectives laid out at the initial stages of the POC proved to be synergistic with the strategic goals of the CHIPS Act5, which articulates the need for “collecting, aggregating, and sharing data sets that enable benchmarking and operational improvements, tools development, the creation of digital twins, and training AI models,” and that “the NSTC could develop a methodology for the voluntary sharing of data that protects the proprietary component and national security while enabling access to appropriate performance data.” Phase 3, to be completed by August 2025, will advance the state-of-the-art toward the following specific objectives:A framework to create and integrate Digital Twins of semiconductor R D and manufacturing process toolsAbility to explore processes and generate virtual devices swiftlyDefined interfaces to combine models for each process module or toolAccurate AI-based models for executing virtual process flows to build virtual devicesAdvanced solutions for secure data-sharing across the ecosystem – for example, federated learning where raw data is protected for each entity by building models locally, and only the outputs of the local models are used to build flow-level AI modelsFoundation for future industry standards for secure data-sharing and for interfaces in the virtual innovation environmentSEMI continues to build the collaborative community for Data-AI and strives to synergize with broader efforts such as the Digital Twin Manufacturing Institute, NSTC, and NAPMP in the U.S., and international standards development. Smart Data AI – System-level Innovation for AI – Future of ComputingThe cross-collaborative and synergistic objectives of Smart Manufacturing, the Smart Data-AI proof-of-concept work, and SEMI Standards merge to advance the state-of-the-art. The objective is to help members realize the full value of technology and innovation. In addition to improving semiconductor operations using AI, the efforts also strive to enable SEMI members to participate in, and ultimately profit from, market growth opportunities. Continued progress in AI is crucial both for the industry’s march towards $1 trillion in annual revenue, and for continuing to realize AI’s benefits to society.There are some hurdles to overcome in such a dynamic market. AI models, and the data they process, are outpacing hardware advances, posing a major roadblock for continued progress. As GenAI becomes more pervasive, the performance and power challenges continue to multiply, and require significant innovation in both hardware and software. While individual companies will develop competitive products in this domain, the entire ecosystem needs to evolve in a synergistic manner. As a global industry association, SEMI can play an important role in ensuring this. SEMI started a series of workshops and technology sessions to develop the community and identify opportunities and challenges. The first in this series was a joint workshop with McKinsey Co., held in October 2023, with a focus on innovations in “Domain-Specific Architectures.” Strategically, it brought together thought leaders from three diverse communities - start-ups, investors, and SEMI member companies across the supply chain. This was followed by an overcapacity audience at the Future of Computing session at SEMICON West 2024, where we explored AI-specific hardware with leaders in academia and industry. The Initiative’s next planned event in October 2024 is a focused workshop that is designed to be highly interactive and bring together visionaries and thought leaders from across the value chain – materials, devices, architectures, algorithms, and critical enabling technologies such as photonics, chiplets, advanced packaging, and 3D and heterogeneous integration. The overarching goal is to identify pre-competitive collaborative actions that would help the entire industry. The “Future of Computing” is the broad path to the industry’s future success. While AI systems are the current major wave on this path, future waves may be about heterogeneous integration of photonics and other components, and ultimately, quantum technologies joining the mainstream. SEMI continues to monitor these future trends, strengthen the ecosystem and enable innovation through pre-competitive collaboration, and accelerate implementation through standards.SEMI is fostering today’s collaborations while helping the industry navigate the future of electronics.Melissa Grupen-Shemansky is CTO at SEMI, Pushkar Apte is a Strategic Technology Advisor and Leader of the SEMI Smart Data-AI Initiative, and Mark da Silva is Senior Director of the SEMI Smart Manufacturing Initiative.Definitions and References:1https://arxiv.org/abs/2405.15828 Eamon Duede, William Dolan, Andre Bauer, Ian Foster, Karim Lakhani2McKinsey Company3Digital Twins for semiconductor manufacturing operations are dynamic, predictive, data-driven virtual models of a physical asset, process, or an entire factory, constantly synchronized with its real-world counterpart through real-time data streams and analytics4Research was sponsored by the Army Research Laboratory and was accomplished under Cooperative Agreement Number W911NF-19-2-0345. The views and conclusions contained in this document are those of the authors and should not be interpreted as representing the official policies, either expressed or implied, of the Army Research Laboratory or the U.S. Government. The U.S. Government is authorized to reproduce and distribute reprints for Government purposes notwithstanding any copyright notation herein.5“A Vision and Strategy for The National Semiconductor Technology Center (NSTC)” published by the CHIPS R D Office.