Technology and Trends

As monolithic scaling slows down, the semiconductor industry is increasingly relying on advanced packaging technologies to extend Moore’s law through heterogeneous integration. Higher on-package bandwidth, improved yield resiliency and the need to integrate diverse IP from multiple foundries are driving demand for advanced packaging technologies that address these issues but introduce challenges of their own such as efficient power delivery to all the different domains in a heterogeneous system. SEMI spoke with Kaladhar Radhakrishnan, Intel Fellow at Intel, about heterogeneous system integration trends and new developments in the semiconductor industry. Radhakrishnan shared his views ahead of his keynote at the SEMI Connecting Heterogeneous Systems Summit, 1-3 September 2021, an online event. Join the summit to meet experts from Intel and other key industry influencers. Registration is open. SEMI: What is driving the adoption of electronics and semiconductor devices nowadays and why is the development of new and innovative technologies important? Radhakrishnan: We are living in an increasingly data-driven world where devices have become an integral part of our lives. A recent study estimated that in the United States alone, 13.6 connected devices per capita consume an average of 300 gigabytes worth of data every month. In the workplace, COVID-19 has driven fundamental business changes that has sped up the adoption of digital technologies such as virtual conferencing, remote work, and e-commerce. Organizations are realizing that a high-quality video conference can be an adequate substitute for many in-person meetings. As a result, businesses are accelerating the digital transformation in order to adapt and thrive in this new environment. Five decades of sustained exponential growth in semiconductor performance has conditioned the average digital consumer to expect more from their devices. However, there are some headwinds ahead as traditional scaling slows down and power density rises. Because consumers and businesses are now generating data at a faster rate than they can consume it, technologists need to scale compute, storage, and bandwidth even faster to keep pace. Without investments in research and development of new and innovative technologies to address these challenges, the full potential of this data will go unrealized. SEMI: What forces are heightening the importance of heterogeneous system integration? What are the implications for increased on-package bandwidth, improved yield resiliency and the need to integrate diverse IP from multiple foundries? Radhakrishnan: The semiconductor industry increased transistor density and scaled performance through classical Dennard scaling until the turn of the century. By then, the gate oxide thickness had scaled down to atomic dimensions and the exponential increase in sub-threshold leakage signaled the end of scaling through traditional methods. Since that time, the chip industry has been relying on innovations in transistor materials and structures such as high-k metal gate, strained silicon, and FinFETs to keep pace with Moore’s law. However, this alone will not be sufficient to continue scaling and the industry needs to explore other vectors to augment improvements in transistor technology. Heterogeneous integration through advanced packaging is one key technology that can help drive these gains. Technologies like Foveros can enable device density scaling by creating a 3D stack of multiple die using high-density interconnects. Heterogeneous integration enables chipmakers to move from a monolithic system designed on a single large chip to a heterogeneous system comprised of a number of smaller chiplets. The main benefit of using smaller chiplets is that they improve yield and enable application based customization of the foundry processes. However, if the disaggregation to smaller chiplets is not accompanied by an increase in on-package bandwidth, the power and performance penalties associated with chiplet-to-chiplet communication will hobble system performance. This is why advanced packaging technologies that improve die-to-die communication are key enablers for heterogeneous integration. SEMI: What are some of the key technology challenges in developing heterogeneous systems? Radhakrishnan: The obvious challenge that most people focus on is the need for improved on-package bandwidth. However, as we rely on 3D stacking to continue device scaling at the package level, it is important to comprehend power delivery and thermal challenges as well. Power to the top die has to be delivered through TSVs on the bottom die, which not only adds resistance but also reduces the useful area available on the bottom die. This problem is further exacerbated when we stack more than two die. Excessive noise on the power delivery network can cause timing issues that limit the maximum operating frequency of the transistor. Similarly, when we stack multiple die, we must take into account associated thermal challenges. For example, each interface of the multi-die stack adds thermal resistance, which makes it harder to cool the chips at the bottom. SEMI: What are some of the key global market trends that driving demand for heterogeneous and system-level integration? Radhakrishnan: The number of artificial intelligence (AI) and machine learning applications have grown dramatically due to their ability to solve highly complex problems across a wide range of segments. AI and machine learning models require more memory bandwidth and compute capabilities that are difficult to achieve without some form of heterogeneous integration. Another market trend driving demand for heterogeneous integration is the increasing reliance on custom hardware accelerators. To combat the slowdown in frequency scaling and single-core performance, we have moved to multi-core architectures by tackling the inherent parallelism in our workloads. However, Amdahl’s law tells us that such an approach will hit a bottleneck when we reach the limits of the serial portion of the workload. As these constraints slow the performance of general-purpose processors, the reliance on custom hardware accelerators to boost performance for specific workloads is growing. Heterogeneous integration at the system level with a combination of CPUs, GPUs, FPGAs and other accelerators can optimize system power and performance. SEMI: What solutions is Intel developing to address these market needs? Radhakrishnan: Intel is actively involved in the development of the industry ecosystem for heterogeneous integration. We have developed a number of innovative advanced packaging solutions such as the EMIB and Foveros that are used in products today. Intel is also developing the next generation of advanced packaging technologies, Foveros Omni and Foveros Direct, which will dramatically scale the IO density by using direct Cu-Cu bonding technology. Foveros Omni is a crucial building block technology to enable high-voltage power conversion on the package for efficient power delivery. Intel is uniquely positioned to predict the design needs for future systems and deploy its resources to develop the technology building blocks needed to continue performance scaling. Our IDM 2.0 strategy enables us to leverage our leadership in packaging technologies to design the best products and use the best IP to deliver leading products across a broad range of categories. SEMI: What do you expect from your participation at SEMI Connecting Heterogeneous Systems Summit? Radhakrishnan: I’m hoping to shed some light on some of the new technologies we have been developing at Intel to enable heterogeneous system integration. I also want to bring awareness to the power-related challenges we are facing with heterogeneous systems. I also look forward to listening to what other industry leaders have to say on the topic. Kaladhar Radhakrishnan is an Intel Fellow and a Power Delivery Architect with the Technology Development group at Intel. He plays a significant role in shaping and driving power delivery technologies for Intel microprocessors. His areas of expertise include integrated voltage regulators, advanced packaging and passives technologies. Kaladhar is a two-time recipient of the Intel Achievement Award, the highest Intel honor an individual or small team can receive. He has authored four book chapters, over 40 technical papers in peer-reviewed journals, and has been awarded 35 U.S. patents. He has also served as an adjunct professor at Arizona State University. Kaladhar joined Intel in 2000 soon after receiving his Ph.D. in Electrical Engineering from the University of Illinois at Urbana-Champaign. Serena Brischetto is senior manager of marketing and communications at SEMI Europe.

Spend any time with Ansys’ John Lee, Rich Goldman or Marc Swinnen and you’ll hear plenty of optimism about the semiconductor industry even though they tick off a long list of looming design challenges. The need for reliable and effective electronic systems, they emphasize, is great and runs through high tech, aerospace and defense, automotive, IoT and 5G with communications being a common denominator. The three are especially bullish these days on changing market dynamics brought on by systems companies building company-specific bespoke, or custom, silicon. These systems companies are building chips with a different perspective and a fresh look at silicon design, a move away from the more traditional segment-specific silicon due to much more complexity. Ansys, a member of the ESD Alliance, a SEMI Technology Community, is a 4,100-employee company with a comprehensive portfolio of multiphysics engineering simulation software for product design, testing and operation products and services. John, Rich, Marc and I focused on Ansys’ semiconductor and electronics segment for our conversation. Smith: When did you notice the move by systems companies to build their own chips? What drives this trend? Lee: The inflection point was about three years ago when hyperscale data center and system companies recognized they needed an enterprise system design platform. They are designing bespoke silicon, driven to do this for cost efficiencies and to avoid relying on outside suppliers. They also want differentiation based on their specific platform needs so they can optimize compute power to their specific needs. Smith: What is driving the trend for multiphysics experience to ensure effective and reliable electronic systems? Lee: The increasing need for multiphysics analysis is acute. The physics of 3D IC, for example, brings in mechanical engineering with the convergence of mechanical and electrical as 3D emerges at the intersection of IC and System. As a result, physics becomes a necessity to analyze the stability of the chip in the package. Goldman: As well, the move to stacked chips, 3D IC and wafer-on-wafer requires thermal, electromagnetic and mechanical analysis in addition to the traditional analysis for function, performance and power. They all need to be analyzed together, not serially. It becomes multiphysics, not multiple physics. Smith: Two distinctly different disciplines – multiple physics and multiphysics – are needed for semiconductor design. How are they different? Why the need now? Swinnen: Multiple physics refers to the sheer breadth of physics that is now needed to analyze from the IC up to the largest system whereas multiphysics refers to the capability to analyze several physical effects concurrently, accounting for their impact on the design and interactions between various physics. Multiphysics are necessary to analyze the full context of the system environment – from nanometers to kilometers – for multi-chip packaging, chip-to-package-to-silicon and systems with multi-domain guidance. Goldman: A self-driving car, as an illustration, includes AI systems-on-chip, solid-state sensors, infotainment systems and radar/lidar detectors that must all work in the rain, the heat and the bitter cold. Smith: Why are design groups being reorganized to include expertise in mechanical and electromagnetic issues? Swinnen: Complexity has exploded, driven by a long list of technical requirements and, perhaps, mischaracterization. Goldman: Just consider the system on chip, mischaracterized by the semiconductor industry. The chip is never a system by itself. Rather, it is a complex component in a larger system and must be analyzed in that context. 3D IC is where this comes together and forces a recognition of physics outside the traditional scope of SoC design. 3D IC chips are much closer together on the board and it takes multiphysics embedded into the workflow of semiconductor design, packaging, system design and 3D IC to ensure they work reliably and efficiently. Smith: What is the solution? Goldman: It’s clear a specialized digital thread is necessary to move disparate groups with expertise in systems, physics and silicon together. Today, these groups or disciplines might not exist in the same company, whether it be a foundry, fabless or outsourced semiconductor assembly and test (OSAT) company. Lee: In order to unify the entire system design environment, a cloud-based, open and extensible heterogenous enterprise compute platform is required. It is similar to the SaaS-based business model and known as Simulation-as-a-Service (also SaaS). While vertical integration of design groups is already taking place at leading system design houses, there have also been advances in electronic design tools. These are starting to offer more comprehensive multiphysics capabilities including thermal, fluid dynamics (CFD), mechanical stress and reliability analysis in a single analysis cockpit. Today’s system designers face two platform challenges: First, they need an environment that is open enough to accept analysis results from multiple sources so that they can be overlapped and cross-analyzed. Second, the design platform must have the capacity to handle the enormous amounts of data generated by the latest 3-nanometer chips and 3D IC systems, and this implies an intimate coupling to elastic cloud computing. The days of an engineer writing Perl scripts and handing it off to someone else are gone. We believe that the industry is responding to this challenge with a new generation of design platforms that a cloud-native, open and extensible to allow heterogenous enterprise design. We are definitely at an inflection point in electronic design today, but the electronic industry has faced these before an we are confident it will master these challenges as well. About Rich Goldman Rich Goldman is director of marketing for the Electronics and Semiconductor Business Unit of Ansys. He holds a Bachelor of Science degree from Syracuse University and an MBA and Master of Science degree in Engineering Management. Moscow Institute of Electronic Technology (MIET)’s first honorary professor, he is also the recipient of honorary PhD degrees from Russian-Armenian (Slavnoic) University and State Engineering University of Armenia for contributions to the advancement of Armenia’s high-tech education and economic ecosystem. Rich served on EDAC’s board of directors. About John Lee John Lee is general manager and vice president of the Ansys Electronics and Semiconductor Business Unit. Lee co-founded and served as CEO of Gear Design Solutions (now Ansys), developer of the first purpose-built big data platform for integrated circuit design. He cofounded two other startups (Mojave Design and Performance Signal Integrity), which successfully exited into companies now part of Synopsys. He holds undergraduate and graduate degrees from Carnegie Mellon University. About Marc Swinnen Marc Swinnen is director of product marketing for the Electronics and Semiconductor Division of Ansys. He holds Master degrees in Electronic Engineering and Industrial Management from KU Leuven, Belgium, as well as an MBA from San Jose State University. About Bob Smith Robert (Bob) Smith is executive director of the ESD Alliance, a SEMI Technology Community. He is responsible for the management and operations of the ESD Alliance, an international association of companies providing goods and services throughout the semiconductor design ecosystem.

COVID-19 has likely had a greater impact on healthcare than on any other industry sector, said Glenn Snyder, Principal and Lead Analyst for MedTech at Deloitte, and a featured speaker at a recent SEMI webinar that offered a glimpse into the Future of MedTech in the run-up up to the SEMI Global Smart MedTech Symposium, kicking off tomorrow and running through August 5th. Snyder said medtech growth may appear muted in its early years but is poised to begin a steep climb as innovation continues, harkening back to the super-charged growth of circuitry on a wafer (aka Moore’s Law), which also saw a seemingly slow, flat start. Medtech enjoy its own exponential growth powered by 5G implementations, consumer demand, and the development of a robust ecosystem of bio-sensors, data standards, and regulatory improvements. Consumer-Driven Future and COVID-19 Impact Snyder noted that the future of medtech will be consumer-driven – enabled by open, highly interoperable data and secure platforms geared toward end users. A case in point: Detecting disease early through sensor systems will rely on not only on-body and environmental sensors, marking a fundamental shift from the today’s today’s hospital-centric system to improve health outcomes. Telemedicine growth during the pandemic is a notable example. In one case study of a health system, Snyder noted that telehealth usage skyrocketed from 1% to 60% of all patient visits over the early months of the pandemic but has since dropped to 10% due to the lack of charting, billing and other support systems needed to sustain the high rate of telehealth visits. Even so, hospitals expect to see a steady rise in consumers’ use of telehealth in the coming years. One driver are pilot programs for healthcare-at-home services for post-surgical patients. The programs have delivered better health outcomes and are more personalized and family-friendly than medical clinic or hospital visits. They also cost less. Digital monitoring using remote biometrics sensors are one key to driving the long-term success of these programs. Health Systems Changing Their Business Model In the medtech sector, changes in health system business models lag consumer adoption. What’s more, policy changes aren’t keeping pace with new models for medtech products. For medtech products to thrive, a solid foundation of data gathering, transmission and management capabilities that tie into traditional healthcare systems must be formed. Companies considering a vertically integrated approach to the medtech market can steer clear of healthcare providers – but only at the risk of having less access to patients and their historical healthcare data. Snyder said companies that control vertically integrated healthcare products and patient data can make support systems more efficient and robust but may struggle to deepen their market penetration. Companies such as Intuitive Surgical have found success with this model by offering highly differentiated products. Supply Chain Alarmingly Thin for Medtech Devices In a recent Deloitte survey of medtech companies, 60% reported that at least half of their products are powered by semiconductors, yet 70% noted pointed to high supply chain risks with most of their products because they have only a single source. Risk management and creating a resilient supply chain will remain key for medtech providers to adapt on a global scale. Partnerships and Collaborations During the event roundtable, Snyder mentioned that bio and pharma companies have partnered successfully to grow their businesses. Doug Kiehl of Eli Lilly, the moderator of the discussion, added that traditional healthcare providers should look outside of their usual business circles for medtech innovation. COVID-19 highlighted how new multi-disciplinary healthcare partnerships risk assessment processes have opened several paths to innovation previously unexplored. Both Snyder and Kiehl expect to see more collaboration between health systems and medtech innovators as they uncover synergistic business models. SEMI Global Smart MedTech Symposium Kicks Off Today Explore the gaps in the supply chain at the Global Smart MedTech Symposium and join the conversation with medtech device companies and health systems providers. Sessions include: Realtime Continuous Diagnostics and Monitoring Decentralized DNA Sequencing and Molecular Diagnostics Data Science and Infrastructure – AI/Data Fusion Applications in Rural and Decentralized Healthcare in the Digital Age The four-day symposium features three sessions at different times each day to cater to participants in Taiwan/Asia, Europe and North America. Register today! Heidi Hoffman is senior director of Technology Communities marketing at SEMI.

The state of Penang, nestled along the northwest coast of Peninsular Malaysia, needs no introduction in the global electronics manufacturing sector. Despite its diminutive stature with just over 1,000 square kilometers of land area and a 1.8 million-strong population, Penang commanded an estimated 5% of global semiconductor exports in 2019, according to data compiled from the Department of Statistics Malaysia (DOSM) and UN Comtrade. The State’s transformation, from a traditional seaport economy into the Silicon Valley of the East, began in the 1970s, when the establishment of Malaysia’s first free trade zone in the State drew key investments from eight Multinational Corporations (MNCs). These pioneering investors – Intel Corporation, Hewlett Packard (now Keysight Technologies and Agilent Technologies), Robert Bosch, AMD, Litronix (now Osram Opto Semiconductors), Hitachi (now Renesas), Clarion and National Semiconductor[1] – sparked the development of a robust ecosystem of ancillary industries, which formed a foundation for the State’s rise as a prominent, offsite manufacturing hub. Today, Penang houses more than 350 MNCs that are supported by over 3,000 manufacturing-related SMEs. As Penang flourished as a vibrant, regional E E manufacturing hub, the local talent pool steadily accumulated a wealth of business intelligence and technical experience, enabling the robust supply chain to evolve in tandem with technology megatrends. This, in turn, enabled the State to focus on pursuing investments that have propelled the industry up the value chain, away from its beginnings as a low-cost manufacturing hub. Consequently, Penang has seen a proliferation of upstream technology-related investments in high value-added functions in recent years, ranging from research and development (R D), design and knowledge-based solutions, and downstream advanced manufacturing and testing to global business service (GBS) and Centre of Excellence (CoE) activities. Penang’s growing significance in the global E E value chain is demonstrated by its steady and resilient export performance in recent years. From 2014 to 2019, the State’s E E exports grew at a compounded annual rate (CAGR) of 12% to reach RM210 billion (US$51 billion). It has emerged as a hub for professional, scientific and controlling instruments (including medical technology), with exports of these products growing at a 5-year CAGR of 15% to reach RM23 billion (US$6 billion) in 2019. E E products, alongside professional, scientific and controlling instruments, collectively contributed between 77% and 82% of Penang’s total annual exports since 2014, and accounted for 50% of Malaysia’s exports in these two segments during the period. More impressively, despite the disruptions from the COVID-19 pandemic, Penang’s total exports continued to rise in 2020, growing 7% year-on-year to RM310 billion (US$75 billion), and a further 14% year-on-year in January and February 2021, driven by strong global demand for semiconductors. Shaping up as the destination of choice for advanced manufacturing investments As part of efforts to move Penang’s industry up the value chain, the State government has placed emphasis on attracting companies with strong commitments in implementing Industry 4.0 and sustainable investing. These efforts have yielded positive results, with the state having gained traction as a hub for advanced manufacturing investments. This is evidenced by the rising trend in investments per new job creation, which saw a six-fold jump from 2012 to 2020, as well as the number of global heavyweights announcing new investments as well as expansions of existing facilities in the State in 2019 and 2020. Penang attracted RM31 billion (US$7.5 billion) in approved direct manufacturing investment inflows in 2019 and 2020, 88% of which involved investments into the E E, equipment and medical technology industries. Prominent new investments included those from Lam Research, Bosch Group, Ultra Clean Holdings, Dexcom as well as Smith+Nephew. Together with planned expansions by a number of existing MNCs in Penang, these new investments, which are on track to commence operations between 2021 and 2023, are poised to bring Penang’s industry to greater heights and further integrate the State into the global value chain. Recent Notable Direct Manufacturing Investments in Penang Source: InvestPenang and respective companies Penang’s conducive business environment nurtures successful homegrown technology companies Penang’s conducive business environment has not only proven successful in attracting foreign direct investments (FDIs), but also successfully nurtured local E E success stories of locally employed engineers turned technopreneurs, who have founded and built companies that have successfully grown to become internationally renowned in their own right. These homegrown E E companies play crucial roles in the ecosystem, particularly in the areas of automated test equipment (ATE), automation, outsourced semiconductor assembly and testing (OSAT) services, electronics manufacturing services (EMS), precision engineering and tooling. The past five years have also seen the emergence of young, fast-growing Penang-based companies such as Experior, Oppstar Technology and Skyechip, which provide IC design and IC test design services to MNC clients globally. Public-private partnerships cultivate Penang’s talent development roadmap The state is cognisant that the development of a robust and skilled talent pool is imperative to support the growth of strategic industries in Penang. Strong public-private partnerships with concerted efforts in supporting talent development are key to Penang’s continued success. Toward this end, the State government has backed Penang Skills Development Centre’s (PSDC) industry-led training and education efforts, which have helped train over 200,000 of workers to support the industry’s needs since 1989. The State has also coordinated collaboration for industries to provide input to local institutions of higher learning on the relevance of the institutions’ courses, and rallied the industry to support State-run scholarships (Penang Future Foundation) and STEM initiatives. Holistic initiatives to make Penang a world-class investment destination for global frontier companies The dynamics of the global value chain, especially for the technology sector, have evolved rapidly since 2018, particularly amid the complex confluence of trade protectionism, COVID-19 pandemic-driven issues and disruptive technologies. The State government believes that strong, geographically localised industry clusters could help companies mitigate the risks of supply chain disruptions, in addition to improving companies’ time-to-market at a lower cost. To further increase Penang’s attractiveness for high quality investments, the State is focusing on three key strategies: Extending its competitive edge in advanced manufacturing, further strengthening Penang’s industry clusters, which include expediting SMEs’ Industry 4.0 transformation journey, and nurturing more homegrown companies to penetrate the global supply chain Embarking on a continuous drive to develop and recruit talent to the State, as well as cultivate the younger generation’s interest in STEM Enhancing Penang’s liveability with a strong focus on making Penang a smart and green city The State government is committed to continue developing Penang in a holistic manner, with the aim of creating a vibrant business and investment destination with a robust and sustainable economy and high standard of living, creating a conducive environment to “work, live, learn, play and invest.” About InvestPenang InvestPenang is the Penang State Government’s principal agency for promotion of investment. Its objectives are to develop and sustain Penang’s economy by enhancing and continuously supporting business activities in the State through foreign and local investments, including spawning viable new growth centres. To realize its objectives, InvestPenang also runs initiatives like the SMART Penang Centre (providing assistance to SMEs), Penang CAT Centre (for talent attraction and retention) and i4.0 seed fund (a catalyst for the start-up ecosystem). For more information, contact [email protected]. InvestPenang also works closely with various industry associations, including SEMI, to promote Penang’s supply chain and E E ecosystem. InvestPenang is delighted to have collaborated with SEMI on numerous occasions since 2015 and endeavours to sustain the partnership in the years to come, including for the SEMICON SEA 2022 exposition to be held in Penang. [1] No longer present in Penang following a corporate M A exercise.

Understanding the significance of a B Corp™ comes down to measuring the success of a company in more than profits and ROI. Can global impact, sustainability, and social justice deliver value to stakeholders too? At Brewer Science, we boldly answered, “yes!” and launched our journey to becoming a Certified B Corporation™. A B Corp is a for-profit, corporate entity that seeks to positively impact society, the community, and the environment, in addition to generating profit. The concept is catching on. Today, there’s a worldwide network of almost 4,000 Certified B Corporations across 150 different industries and 74 countries. In May 2021, Brewer Science announced that we are the first company in the semiconductor industry to become a Certified B Corporation. As a chip industry trailblazer for this certification, Brewer Science wanted to share a little about its journey and answer questions often posed by its suppliers, customers, and competitors: Why would a company go through the exhaustive auditing process, how does it work, who does it involve, and what comes next? Why did Brewer Science seek to become a Certified B Corporation? Certified B Corporations are the forefront of a growing global movement of people using business as a force for good™. Certification demonstrates a spirited commitment to high standards of social and environmental performance, transparency, and accountability. “Certified B Corporation standards align with our mission of being a company of the people, by the technology, for the customer, to achieve fulfillment,” said Dr. Terry Brewer, Founder and CEO of Brewer Science. “Becoming a Certified B Corporation exemplifies our commitment to our mission to continuously evolve our global footprint to the benefit of our employees, community, and customers, adding unexpected value throughout the world.” Certified B Corporations are held accountable for environmentally friendly business practices, being inclusive, and promoting local businesses. Besides providing a social benefit to our suppliers, customers, and employees, the certification also gives Brewer Science extensive opportunities to grow the business in collaboration with other mission-driven companies and people. For example, as Certified B Corporations, companies can attend the B Climate Collective and work synergistically with other B Corp companies to advocate for social change. How did we become a B Corp? Brewer Science completed a meticulous assessment process conducted by B Lab™, which examined over 170 factors in reviewing Brewer Science’s customers and vendors, record of inclusion, community involvement, corporate governance, and environmental impact. B Lab also analyzed average employee tenure, charitable giving, energy savings plan, recycling policies, employee volunteer service, and employee upward mobility. The process of becoming a B Corp begins with a self-assessment that the company’s Board of Directors must certify and ends with a 90-minute review call during which B Lab reviews the company’s responses and the company presents supporting evidence. The entire process is rigorous, with the company winning and losing points based on various criteria. These points are factored into weighing its strength as a candidate, and also in identifying opportunities where the company can improve. B Corp status is granted when the company earns at least 80 out of 200 points. But, this is just the starting point of an ongoing process of growth and improvement to uphold the values of the B Corp into the future. The assessment is more than a scorecard. It’s a thorough inspection of every facet of the company and helps guide it in making changes, since every question in the B Impact Assessment must be supported by an explanation and real-life example. A key part of the certification requires choosing a Business Impact Area, which requires the company to prevent evidence of processes it has implemented to influence that area. This component counts for 29 of the 80 points required to achieve Certified B Corporation status. Brewer Science pursued the impact area of environmentally innovative manufacturing, requiring us to provide detailed evidence of how we manage waste in manufacturing and minimize our carbon footprint. We earned an Overall B Impact Score of 88.7. Brewer Science also addressed other areas in the B Impact Assessment such as our human resource initiatives, community involvement, commitment to helping underserved communities, and seeking minority-owned businesses–just to name a few. The assessment incudes the five B Impact areas where Brewer Science scored the highest. Who was involved in the B Corp process? Brewer Science assembled an internal B Corp task force team of directors from departments across the company to provide a cohesive and complete view of the company – a step that was necessary for us to meet the requirements of B Lab’s extensive auditing of the company. B Lab encourages the use of an outside consultant that serves as a liaison between the company and B Lab. Brewer Science’s internal B Corp task force team held bi-monthly meetings with its consultant for nearly a year to answer the hundreds of questions in the questionnaire and gather evidence to corroborate each claim. “It’s a very extensive, but very rewarding process,” said Karen Brown, Project Manager at Brewer Science, also known as the B Keeper by B Lab since she led the certification process within the company. "B Lab is very thorough with the process. It is detailed with what it means and what the questions stand for. It is firm with its requests to ensure that the certification is taken seriously.” What’s next on Brewer Science’s B Corp Journey? Brewer Science’s B Corp certification is valid for three years, at which we point we will apply for renewal – a process that will require us to score even higher than on the previous certification. B Lab stresses continuous improvement, and B Corps must create an improvement plan that spells out areas they will enhance in the coming years. Brewer Science has already identified improvement areas for the recertification. Several of our new human resources initiatives – such as flexible and expanded work options – have not yet been committed to policy. Additionally, we have expanded our use of a cloud-based learning platform to increase training options for employees and hold performance conversations quarterly instead of annually. As part of the assessment, Brewer Science won points for community involvement and charitable giving. However, we are expanding our community engagement by providing employees with a monthly charity or cause to support. Brewer Science became a Certified Employee-Owned company last year. Since 2020 marked the launch of our employee stock ownership plan (ESOP) and shares had not yet been dispersed, B Lab didn’t fully recognize the program. These are just a few examples of how we plan to earn more points during the recertification. At Brewer Science, we hope we can inspire other industry leaders to apply for certification. For more information about Certified B Corporations, and to get started on your company's application, visit the Certified B Corporation website. Jessica Albright is a content marketer at Brewer Science, Inc.

The state of manufacturing is changing rapidly. Regardless of sector or location, manufacturing decision-makers across the world are signaling a desire for better supply chain resiliency, manufacturing flexibility, increased speed of innovation and stronger environmental sustainability. Singapore’s manufacturing sector, a significant contributor to its gross domestic product, is always evolving and today is shifting away from its traditional focus on producing highly customized products using flexible manufacturing processes, but at significantly lower efficiencies. Today, with Industry 4.0, we can design manufacturing systems that optimize both efficiency and flexibility. And this is possible because of the convergence of technologies such as artificial intelligence (AI), data analytics, robotics and the Industrial Internet of Things (IIoT). This blend of technologies helps reduce the cost of technological solution ownership – a derivative of Right’s Law – as a function of cumulative production. In HP Singapore, driving innovation in our product and processes is part of our DNA, and over time our products have grown in complexity and breadth. We have embraced Fourth Industrial Revolution (4IR) technologies in our advanced manufacturing lines. We started our Industry 4.0 journey in 2016 with Vision and Mission 2020 to modernize our production facilities to smart factories that strengthen our competitive edge. Our focus was on upskilling our employees with future skill sets, build new technological capabilities and partner with higher education institutes. To drive these transformations, we have formulated five pillars: Additive Manufacturing Data Analytics Cyber-Physical Integration Digitalization Workforce Transformation These five pillars have enabled us to move from labor-intensive and reactive processes to processes that are highly digitized, automated, and AI-driven, enabling us not only to increase quality and productivity but also to reskill our people in anticipation of jobs they will need in the future. Technicians have been upskilled and promoted to techno-operators which has, in turn, freed up technical specialists to explore other roles. Engineers have retrained as data scientists, or have moved to new product development, for instance. In 2017, HP’s Ink Supplies Operations (ISO) set up Smart Manufacturing Applications and Research Centre (SMARC) to adopt 4IR technologies and implement these innovations in production lines. Today, SMARC is the home ground for HP engineers to experience, trial and prototype solutions, bringing innovative and sometimes unexpected solutions to manufacturing. It is also a showcase for industry partners, government agencies and schools. Here is how each pillar of the SMARC contributed to transformation to augment the manufacturing workforce: Cyber-Physical Integration – Move Role of robotics/automation – By standardizing automation standards for robotics, we have deployed collaborative robots (Cobots) and autonomous intelligent vehicles (AIVs) to perform manual and routine tasks to drive productivity, while reducing errors from operator fatigue and protecting our operators’ physical well-being. Digitalization – Sense Role of IIoT – Devices are a treasure trove of data that can provide clarity on how the entire manufacturing line is performing in real time. Building a platform that connects devices and collects data while allowing factory floor managers to dynamically visualize on an Integrated Command Centre (ICC) and manage factory performance is central to HP’s digital transformation journey. And IIoT is not restricted to just devices that are already wired for data sharing. HP has also connected off-the-shelf analogue devices using a standardized data transportation protocol, allowing HP to collect essential data across all types of devices and eliminating manual data entry. Additive Manufacturing – Build By embracing additive manufacturing (use of HP MultiJet Fusion 3D printers), HP introduced more flexibility in operations through on-site rapid prototyping, light production, and replacement of parts needed on our manufacturing floors, shortening production timelines. We 3D printed pallets, which are cheaper and faster to produce, and replaced original pallets for transportation on conveyor belts, improving the efficiency and productivity of our operators. Director Jamie Neo with HP’s MultiJet Additive Manufacturing Printer. (Photo Credit: HP) The HP Multi Jet Fusion 3D printing technology has helped HP to replace traditional manufacturing methods and streamline processes in our supply chain. For example, HP is 3D printing the Drill Extraction Shoe, a tool that is essential to the removal of waste products from laser-drilling in HP’s printhead manufacturing line. Through 3D printing, HP has consolidated the production of the tool from nine parts to one 3D printed model, thereby optimizing the design of the tool and reducing its production time from three to five days to 24 hours. Data Analytics – Think By deploying advanced analytics and machine learning models, HP has enabled real-time detection, diagnostics, and prediction of product quality across our manufacturing lines. Predictive models are replacing traditional “destructive testing,” reducing waste and allowing HP to meet unique product specifications more accurately. Machine learning is diagnosing and recommending the right set up for tools and manufacturing lines, when necessary, to reduce downtime and increase precision. Workforce Transformation – Grow The pivot to becoming an advanced manufacturing leader not only requires HP to invest in 4IR technologies but also skill sets to operate 4IR technologies. We embarked on a Workforce Transformation program to help our employees stay competitive in a fast-changing world. Today 35% of HP technical workforce have had the opportunity to take on new roles even as needs evolve, thanks to internal and external training and reskilling. Beyond technology and training, the glue that binds these together and makes it successful is our culture at HP. We are ambition-led, which means that we do not see the world as it is, but what we can be. And we do so by collaboration. Plans for the Future After accomplishing our Mission 2020, in late 2020 we launched Mission 2025 to extend our end-to-end smart factory capabilities through advanced connectivity, intelligence and automation to optimize and drive sustainable manufacturing flexibility and efficiency. Pyramid of HP’s smart manufacturing focus Advanced technologies such as additive manufacturing, IIoT, automation and robotics, data analytics, machine learning and AI are central to the connectivity and the end-to-end intelligence of our smart factories, enhancing production efficiency and flexibility while improving the quality of our products. For example, the deployment of IIoT sensors in our wafer plant has helped to reduce downtime in replacing CO2 gas cylinders. What’s more, AI enables us to more accurately monitor the dispensing of structural adhesive to eliminate lost yield. We believe that by enhancing manufacturing efficiency and flexibility, we were able to shorten resolution time, reduce our carbon footprint, and improve the resiliency of our manufacturing and supply chain systems. HP smart factory model In April 2021, two lines in HP Singapore joined the World Economic Forum’s Global Lighthouse Network after being recognized for pivoting from a labor-intensive factory into a digitized, automated one with the help of AI. In doing so, we managed to improve manufacturing costs by 20% and productivity by 70%. Under Mission 2020, we saw the following successes: Improved manufacturing costs by 20% Improved productivity by 70% Brought most HP employees onboard to our smart manufacturing journey Equipped HP employees with skill sets in areas such as additive manufacturing, data analytics, AI, robotics and Internet of Things Established a Model Factory playbook With Mission 2025, we will: Continue to train employees in future skillsets by partnering with institutes of higher learning Scale our Model Factory playbook across more manufacturing lines to reduce costs and improve productivity Enhance our knowledge in additive manufacturing by building an ecosystem as a service platform to help manufacturing companies Enable a sustainable manufacturing system to reduce our carbon footprint and help enable a circular economy We believe in innovating with purpose by focusing on solving real-world problems and creating technology in the service of humanity. That is why we built the SMARC to create the solutions for our lines and showcase these solutions to encourage industry participation. We are driven by values and ambition, which means that it is not just what we do, but also how we execute it. We make sure our values inform everything we do – for instance, helping us make a greater impact to environmental sustainability, people, and our community. We believe this is a crucial step in coalescing industry support, which is necessary to move the needle on advanced manufacturing. Robert Ronald is Master Program Manager, Cost Structure, Model Smart Factory and Sustainability, at HP.

U.S. consumers are flush with cash, the American economy is hurtling back from the depths of the COVID-19 pandemic, and the semiconductor industry is flying high on skyrocketing chip demand, with chip equities soaring since the initial outbreak in early 2020 as virus outbreaks worldwide supercharged demand for the digitization of everything from factories to home offices. “Wow, what a difference a year makes,” said Jennie Raubacher, Global Head of Semiconductor Electronics Investment Banking at Wells Fargo, speaking at a recent SEMI webinar. The two rounds of government stimulus payments in 2020 and 2021 gave many U.S. households the safety net to withstand the heaviest blows dealt by the COVID-19 pandemic and stoked consumer spending that has helped lift a hobbled economy. Durable goods spending in the U.S. has also seen a sharp rebound, surging more than 60% from its April 2020 trough, Raubacher said. The twin forces have driven a blistering U.S. economic recovery after GDP shrunk about 10% by the second quarter of 2020 only to bounce back in the first quarter of this year to roughly $19 trillion, regaining the lost ground to match the GDP charted at the end of 2019. With the U.S. economy continuing to gain steam, inflation has, as expected, edged higher, with price increases particularly acute in used vehicle and lumber markets. Despite surging prices, Wells Fargo sees inflation moderating as durable goods demand slows, easing pressure on interest rates, Raubacher said. Equity Valuations at Record Highs Heady semiconductor stock prices are not new. Over the past 15 years, equity prices of chip companies in the S P 500 have grown more than 460%, outpacing the 230% jump in value of the S P 500 index overall, Raubacher said. And chip stocks continue to shine. Since early 2020, when the spread of COVID-19 hit its rapid clip, the recognition of the growing importance of chips to economies around the world has exploded. That dynamic joined secular technology trends including autonomous driving development, industrial and factory automation, 5G infrastructure buildouts, data center expansions, and smart city and smart home innovation fueled by the Internet of Things (IoT) as key drivers of semiconductor stock valuations. With its price/earnings (PE) ratio now at more than 21x, the S P 500 is well above its historical average of 15x PE. “The S P 500 valuation is at record high any way you look at it, and valuation multiples across the board, currently at 3x Next Twelve Months revenue, have increased dramatically from historical averages,” Raubacher said. Semiconductor stock valuations are on similar trajectory, with the SOXX index now at 15x Next Twelve Months EBITDA (earnings before interest, taxes, depreciation and amortization). “While semiconductor stocks may seem highly valued compared to historical levels, the chip industry has grown faster and expanded profitability by a wider margin than S P 500 companies,” Raubacher said. With that differential, “semiconductor equities are not as expensive as they may seem at first glance.” Earnings expansion and valuation multiple increases for the chip industry over the past 15 years have translated into a more than 500% jump in market capitalization, compared to a 300% increase for the S P 500 excluding chip companies, she said. Chip company revenue growth in the first quarter of 2021 was predictably low due to seasonality, dipping 2.4%, though dropped less than the historical average, Raubacher said. Second-quarter revenue growth for the industry is expected to hew to the historical average of 6%. Semiconductor growth forecasts by market analysts for 2021 range widely from 6% to 17% year-over-year, she added. Chip Companies Raise Capital at Record Pace In 2020 and 2021, semiconductor companies have raised an unprecedented $82 billion in capital to finance maturing debt and acquisitions, a wave that will “likely catalyze further consolidation in the sector,” Raubacher said. None of the financing has stemmed from liquidity crunches. Since Raubacher joined Wells Fargo 10 years ago to lead its semiconductor practice, the group has executed more than 175 transactions including $40 billion in mergers and acquisitions and $360 billion of financing for its semiconductor industry clients. “With a strong macroeconomic backdrop and demand environment, relatively low interest rates, semiconductor companies showing strong business fundamentals and robust valuations, we expect a pickup in M A activity,” she said. Growth Forecast Across Most Semiconductor Applications The next four years will see the chip industry grow across most applications including wireless communications, consumer electronics, transportation and medical. Automotive and industrial/aerospace will lead the way, expanding at an expected compounded annual growth rate of 14% and 10%, respectively, from 2020 to 2025 to “drive a significant portion of the TAM expansion during that period,” Raubacher said. Across all applications, the semiconductor industry is expected to grow at a 6.8% CAGR from 2020 through 2025, adding $183 billion in revenue by the end of the forecast period, she said. ESG Rises in Importance For their part, investors now focus on more than pure business performance when valuing individual companies. The ability of businesses to reduce their carbon footprint, promote workplace diversity and take other steps to serve the greater good as part of Environmental, Social and Governance (ESG) programs are carrying more weight in valuation models. “Investors are paying more and more attention to ESG initiatives and targets,” Raubacher said. “On the debt side, we’re seeing things like green bonds and interest rate reductions tied to ESG targets. Only a few semiconductor companies have incorporated ESG measures into their financing, so it’s still early days. It really comes down to the metrics you can track in your companies and the goals and targets you can commit to. It will be a very company-specific approach rather than an industry standard.” In the chip industry, Raubacher noted that ESG targets are geared not only to manufacturing equipment and processes in fabs and other semiconductor facilities throughout the supply chain, but increasingly also to chips themselves. As technology innovation continues to spur the development of chips to power more electronics for consumers and businesses, their proliferation comes at a cost: greater energy consumption. The upshot is that semiconductor makers are becoming more focused than ever on power-efficient designs to bolster their ESG initiatives, Raubacher said. Many semiconductor players across the supply chain are reducing their carbon footprint by switching to energy-saving equipment and reducing water waste, Raubacher said. At the same time, more semiconductor executives are recognizing the rising importance of highlighting corporate achievements across all aspects of ESG. More Governments See Vital Importance of Semiconductors As shelter-in-place orders took hold in countries worldwide after the initial COVID-19 outbreak, work-from-home offices, online shopping, virtual classes and remote doctor’s visits became the norm. The electronics at the heart of this connectivity – born of both necessity and convenience – and the chips that power them took on outsized importance around the world. Geopolitical skirmishes intensified and supply chains across the semiconductor industry were reimagined and redrawn. Governments jockeyed for advantage in the race to build new semiconductor manufacturing facilities and upped their chip investments. An acute chip shortage that started in the automotive industry and quickly spread to other sectors magnified just how pervasive and vital semiconductors had become in making the world go round. “There’s no question that the semiconductor industry is vitally important to global and national economies as governments around the world now recognize its strategic importance,” Raubacher said. That puts the industry in an even stronger position to help lay the regulatory groundwork for its own future. “There’s a unique opportunity for semiconductor industry executives to shape the public policies that could impact the direction of the industry for the next 30 years,” she said. More than 750 people attended the June 2nd webinar, Surging Chip Demand, Digital Transformation, and the Pandemic – What’s Next?, sponsored by SEMI members Brooks Automation, Hitachi, JECT, KLA and TEL. Sven Smit of McKinsey Company also delivered his talk Leading in COVID-19 Exit at the event.

Our home state of California has wilderness areas of extreme climates, from desert to high-altitude snow-capped mountains. Every year, people need rescue because they’ve ventured into the wilderness without proper training, or even essential gear, such as water or a warm parka. Many MEMS product development teams get a similar start. They undertake a challenging multi-year journey without enough of the most precious resource needed for success – enough money to finish. As a MEMS product development firm that's completed more than 400 projects, 25% of these with startup companies, we’ve been having many of the same conversations about the road to commercialization with MEMS entrepreneurs. Through that experience, we’ve seen a share of these entrepreneurs – many of whom come right from graduate programs or from outside the semiconductor industry – experience disappointing outcomes. And it’s not because of their technology. Rather, their lack of familiarity with electronic product integration and wafer-based manufacturing often influences a too-optimistic development plan that doesn’t factor in enough time and budget. As technologists, it was tough for us to see companies with promising young technologies struggle due to lack of planning or funding. We would like to see more entrepreneurs succeed, and that was the impetus for our new book, MEMS Product Development: From Concept to Commercialization, some highlights of which follow. Time and money What can MEMS startups do to pave the way for a successful commercial launch, particularly when a long period of scaling up manufacturing is often needed during the go-to-market process? Since money is usually a limited resource, it’s important to prepare a realistic development timeline supported by sufficient funds allocation from the start. As this is easier said than done, we’ve seen both startups and established companies make common financial blunders during MEMS product development. These include: Reserving inadequate funding for developing the entire MEMS product, including packaging, electronics and software Creating an unrealistic timeline for development, resulting in a cash-flow problem Only securing enough funding for the first run at a foundry when, in fact, numerous runs are far more typical Unplanned gaps of months or more between funding tranches, which slows momentum Based on our varied client experience, the engineering costs of developing a MEMS product of medium complexity to the point of validated foundry production (i.e., ready for mass production and product sales) requires on average four years and US$4 million. And that’s just for engineering. Business administration, sales, marketing and other company costs are additional. While it’s common to spend much more for more complex devices or product systems, it’s rare to spend less, unless you’re working with existing IP, such as a foundry process platform, which also could accelerate development time. Typical engineering-only budget required to develop a MEMS product through four stages of development, to the point of volume-production readiness. Reprinted with permission from MEMS Product Development: From Concept to Commercialization (Springer, 2021). Don’t go thirsty in the desert No one wants to get stranded in the desert without enough water, which is why it’s so important to carefully articulate your timeline and secure adequate funding before starting MEMS development. In MEMS development, just as in wilderness adventuring, things rarely go exactly as planned: Wafers break, engineers take a long time to debug, customers change their minds, and random events like storms (or a pandemic) disrupt supply chains. That’s why adding some buffer to your development timeline and your budget will sustain your company through the inevitable delays and setbacks. Plus, there’s generally a ripple effect to a delayed new-product introduction. A slower-than-predicted launch places a burden on a company’s finances because the fixed overhead costs of the entire organization will continue to consume cash while waiting for product launch. Not a lump-sum game Although you might wish to receive one big funding check when you get started, the reality is that investors and executives won’t provide the entire development funding in one sum. They give money in tranches, generally demanding you meet some pre-determined criteria or demonstrate set benchmarks before they’ll release more funds. To best manage tranche funding, a company must carefully plan and set their investors’ expectations for realistic outcomes in advance. A common crisis for startup companies occurs when investors only provide enough budget to execute the very first run at a foundry and then demand to see functional chips before providing the next tranche. However, the aim of the foundry’s first wafer run isn’t to produce working chips. It’s to begin the year-long process of setting up for high-volume manufacturing. The first wafers are unlikely to yield well, or at all, putting the startup at great risk with its frustrated investors. Setting investors’ and executives’ expectations correctly from the start, realistic budgeting and having regular communication about progress and upcoming needs all help to keep the money flowing. Any gaps in funding will waste valuable momentum, which ultimately leads to more expense and delay in the overall product development. It can become especially damaging when the wait for money forces the foundry to stop work, because processes go stale after a few months, and also during busy times, when your product could be sent to the back of the foundry’s queue. As experienced outdoors people know, to enjoy wilderness adventures, you need to plan where you’re going, anticipate common risks, and then prepare accordingly. It’s the same in MEMS product development. Having a good grasp of your timeline and realistic expectations about the funding required to reach commercialization are essential steps in a successful journey. Want to learn more about MEMS Product Development: From Concept to Commercialization (Springer, 2021)? Order the book based on A.M. Fitzgerald Associates’ extensive experience helping entrepreneurs and other innovators commercialize their MEMS devices. Alissa M. Fitzgerald, Ph.D., founded A.M. Fitzgerald Associates, LLC, a MEMS product development firm based in the Bay Area, California, in 2003. She has over 25 years of engineering experience in MEMS design and fabrication and now advises clients on the entire cycle of MEMS product development, from business and IP strategy to supply chain and manufacturing operations. Carolyn D. White, Ph.D., has a background in mechanics of materials and specializes in the design and fabrication of MEMS devices for a wide range of applications. She has additional experience in foundry transfers and technology strategic analysis, including of the evaluation of patent portfolios, feasibility studies, and cost/performance analysis. A.M. Fitzgerald Associates (“AMFitzgerald”) is longtime member of MEMS Sensors Industry Group®(MSIG), a SEMI technology community that connects the MEMS and sensors supply network in established and emerging markets to enable members to grow and prosper. Visit us today.

In the span of a few short months earlier this year, Mentor Graphics became Siemens EDA and introduced a suite of integrated hardware-assisted verification tools, the first product launch under the new Siemens EDA brand. Jean-Marie Brunet, senior director of marketing, product management and product engineering at Siemens EDA, orchestrated the launch and connected with me for a discussion about the chip design verification space. As he pointed out, verification and validation of systems is a fast-growing and important market segment to the electronic system design ecosystem. Smith: What trends do you see in chip design? What is driving these trends? Brunet: Chip verification costs continue to grow faster than design costs because of factors such as increasing design complexity, rising computing power, surging I/O traffic activity, increasing energy consumption and the widespread use of peripherals. These dynamics are being driven by new data center networking, communications/5G, autonomous driving, artificial intelligence (AI) and machine learning (ML), and storage applications. These trends also indicate the need for more powerful verification tools and expanded verification objectives that include power and performance analysis. Hardware-assisted verification tools are perfect for meeting these demands. Smith: Chip design verification consumes the most time in a project cycle. Why is this so? Brunet: The verification of designs reaching multi-billion gates and supported by voluminous software stacks is fraught with challenges. To exhaustively check every possible state in a billion-gate design with simulation alone would require up to trillions of verification cycles. That’s why hardware-assisted verification is one of the fastest-growing technologies in EDA. Given the complexity of today’s SoC design, it’s no surprise that verification is the largest undertaking in the entire project design cycle, consuming more than 50% of it. It also has the greatest impact on quality, cost and schedule because it prevents designs from failing at first silicon. While a respin of a large design taped out at a node below 10 nanometers could cost more than $10 million, delaying delivery of a new product for a few months in a highly competitive market may cost hundreds of millions of dollars. Smith: What other challenges do engineers face trying to verify a chip design will work as intended? Brunet: Verifying an SoC design is a massive undertaking and, in parallel, verification teams are trying to streamline and optimize verification cycles. SoC design groups are tasked with completing full system-level verification prior to creating production masks by thoroughly vetting all hardware blocks, interactions between those blocks, and the software developed for the end application before the chip is built. To alleviate this enormous pressure, they are starting to adopt a shift-left methodology for early functional verification as soon as individual blocks of a SoC design become available. It helps jump-start embedded software validation before full system validation is completed to save time and allow engineers to work in parallel, not serially. While it is an effective approach, it creates the need for a complete and integrated suite of hardware-assisted verification tools to verify and validate a design’s hardware and software components. Smith: How do you define hardware-assisted verification and how does it help solve these challenges? Brunet: A typical definition of hardware-assisted verification is special purpose hardware to accelerate verification. In other words, hardware emulation and FPGA prototyping. Hardware-assisted verification is a mandatory investment as single-die or multi-die chips get larger with more complexity and more interfaces, making hardware and software code integration critical early in the design cycle. Because software performance defines a chip’s success, the need to perform software workload-based analysis is acute, not just analysis of chip functionality, but also accurate performance and power consumption in the context of real-world applications. Hardware-assisted verification is the only option when hardware and software meet. By combining emulation, desktop FPGA prototyping boards and enterprise FPGA prototyping platforms to work on the same SoC design, a verification group can assemble a complete hardware-assisted verification system for thorough and exhaustive verification and validation. Smith: Where are the big opportunities for hardware-assisted verification? Brunet: New end-user applications are coming from computing and storage, AI/ML, 5G, networking and automotive. Recently released market data from the ESD Alliance shows that in 2020, hardware-assisted verification revenues exceeded $700 million. It is reasonable to assume that revenues of $1 billion will be within reach in the next few years given the amount of chip design activity at advanced nodes below 10nm. Smith: With the design/verification and manufacturing phases of the semiconductor supply chain more closely aligning, what role does hardware-assisted verification play? Brunet: Semiconductor manufacturing and the supply chain that supports it benefits greatly from the continued innovation in verification and validation tools and methodologies. With this innovation, designs are delivered to the manufacturing flow with a much greater chance of passing first silicon with success. This reduces friction in the semiconductor supply chain since IP and chips are available when anticipated. Hardware-assisted verification is a quick-moving, highly leveraged resource that helps a design and verification team to ensure chips are manufacturable and meet the functionality, power and performance requirements for the end-product application. Jean-Marie Brunet is the senior director of product management and engineering for the Scalable Verification Solutions Division at Siemens EDA. He has served for over 20 years in application engineering, marketing, and management roles in the EDA industry, and has held IC design and design management positions at STMicroelectronics, Cadence, and Micron, among other companies. Jean-Marie holds a Master's degree in Electrical Engineering from I.S.E.N Electronic Engineering School in Lille, France. Jean-Marie Brunet can be reached at [email protected]. About Bob Smith Robert (Bob) Smith is executive director of the ESD Alliance, a SEMI Technology Community. He is responsible for the management and operations of the ESD Alliance, an international association of companies providing goods and services throughout the semiconductor design ecosystem.

Air pollution is a serious public health issue worldwide with airborne hazardous substances such as volatile organic compounds (VOCs), particle matter (PM), and nitrogen dioxide linked to a wide range of adverse health conditions. According to the World Health Organization (WHO), “the combined effects of ambient (outdoor) and household air pollution cause about seven million premature deaths every year, largely as a result of increased mortality from stroke, heart disease, chronic obstructive pulmonary disease, lung cancer and acute respiratory infections.” There’s also an economic impact of air pollution. Related illnesses and loss of life cost billions of dollars in healthcare services globally. And while we might think that air pollutants are only present outdoors, we’re more exposed to them – and they’re more potentially dangerous – indoors, where higher concentrations of volatile organic compounds (VOCs) produced by paint and furniture are a major concern. The COVID-19 pandemic has only heightened our awareness of the air we breathe. With recent medical research showing that viruses may be transmitted by attaching themselves to airborne particles, indoor air quality (IAQ) monitoring is becoming even more important. As we turn to VOC sensors for IAQ monitoring, it’s important to note that not all VOC sensors are equal. The current crop of low-cost VOC sensors are primarily total VOC sensors. Generally based on electrochemical or metal-oxide transducers, total VOC sensors provide a “grayscale” image of IAQ, which doesn’t differentiate among different gases. This limits people’s ability to make informed decisions regarding the level of threat to their health, since not all VOCs are equally hazardous and don’t require detection at the same concentrations. In addition, total VOC sensor technologies don’t support PM detection. This forces end-device designers to either add a module of optical sensors or switch to a completely different system. While optical sensors provide excellent performance, particularly for PM detection, they’re much more expensive, as well as more complex, bulky and power-hungry. This makes them ill-suited to resource-constrained portable devices where cost, size and power are at a premium. FBAR-based IAQ sensors emerge The shortcomings of available technologies for IAQ sensors has boosted the development of alternative solutions that provide better performance – in terms of both sensitivity and selectivity – as well as greater versatility, lower cost and smaller size. Acoustic sensor technologies featuring the latest advancements in film bulk acoustic resonator (FBAR) sensors are emerging as a leading candidate. Sensitivity is important in VOC detection because certain hazardous compounds, such as formaldehyde, are dangerous at very low concentrations. As highly sensitive devices, FBARs are a MEMS equivalent of a weight scale, but instead of detecting kilograms or grams, they can sense femtograms, which are just one-quadrillionth of a gram each. FBARS work by putting a thin film piezoelectric material into a mechanical resonance through application of an AC electric signal (GHz range) to a pair of electrodes on either side of the film. This resonant frequency is sensitive to the mass attached to the electrode surface. Whenever the mass attaches to the active area of the sensor, it produces a frequency shift, and this shift is proportional to the mass attached on the surface. Another major benefit of this approach is selectivity, which allows a device to distinguish between different target molecules or species. By placing a layer of material on the sensor –which is the functionalization layer – FBAR sensors display high selectivity on targeted materials. This allows the consumer to distinguish among different VOCs instead of just measuring a mixture of VOCs that vary in toxicity. Unlike older IAQ sensing technologies, FBAR sensors support functionalization layers comprised of different materials, from metal oxides and polymers to more exotic options such as carbon nanotubes and graphene. This increased versality makes it easier to use FBARs for a variety of applications, ranging from gas sensors to medical sensors. Sorex Sensors’ FBAR sensor in a 3mm x 3mm ceramic package FBAR technology is a perfect match for IAQ. In addition to high sensitivity and selectivity, it enables the manufacture of very small arrays, and it’s low-power, all of which make it a good choice for small portable devices. Plus FBAR technology is CMOS-compatible, so FBAR sensors can be made using standard MEMS processes and combined with integrated circuits fabricated using standard CMOS processes, making them cost-effective. With its origins at the University of Cambridge in the UK, Sorex Sensors is leading the commercialization of FBAR devices for sensing applications. After releasing our first product in 2019 – a standalone FBAR sensor and a development kit that can be used for particle monitoring – we’re preparing to release an FBAR sensor array that detects five different gases later this year. By offering specific functionalization layers for different targets, our new FBAR technology will provide a level of selectivity that other silicon-based sensors can’t achieve – particularly in light of FBAR’s low power consumption and very small size (less than 5mm x 5mm). In addition, the sensor’s targeted gases will include one of the main headaches in the IAQ space, formaldehyde, which is especially carcinogenic and is widely found in the varnishes used in furniture. We’re planning for this new iteration of our FBAR technology to help our customers sense in color rather than in grayscale – providing a level of granularity that’s unmatched in IAQ sensing. Check out the latest news about Sorex Sensors on our website and on LinkedIn. About the Author Mario de Miguel Ramos, Ph.D., is the co-founder and CEO of Sorex Sensors Ltd, a spin-out of the University of Cambridge, the University of Warwick, and the Universidad Politecnica de Madrid (UPM). Founded in 2017, the company focuses on the development of highly sensitive mass sensors based on film bulk acoustic resonators (FBARs). Dr de Miguel Ramos has been working in the field of FBARs for a decade. Prior to founding Sorex Sensors, he worked as a postdoctoral research associate at the Electronic Devices and Materials (EDM) Group at the University of Cambridge. He holds a master’s in Telecommunications Engineering and a Ph.D. in Electronic Engineering Systems, both from UPM. Sorex Sensors is a member of MEMS Sensors Industry Group®(MSIG), a SEMI technology community that connects the MEMS and sensors supply network in established and emerging markets to enable members to grow and prosper. Visit us today.