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Primarius Technologies will unveil its flexible and scalable design environment for custom memory and analog/mixed-signal IC design and new circuit simulation and design enablement solutions during the Design Automation Conference (DAC) July 11-13 at Moscone Center in San Francisco.

Demonstrations will feature Primarius’ NanoDesigner™, a full custom design platform; SDEP™, an innovative spec-driven modeling automation platform; PCellLab™, a PDK parameterized cell library development platform; NanoCell™, a standard cell library characterization solution; and 9812AC, the first commercial AC dynamic noise measurement system.

Other demonstrations will highlight products such as an all-in-one semiconductor parameter analyzer FS-Pro™, and a portfolio of solutions for SPICE model, process design kit (PDK) and standard cell library verification including ME-Pro™, PQLab™ and LibWiz™.

New Additions to Primarius Product Portfolio
Primarius is committed to delivering innovative data-driven design technology co-optimization (DTCO) EDA solutions powered by leading-edge SPICE/FastSPICE simulation technologies, shortening time to market and improving yield, power, performance and area of circuit designs at advanced process nodes.

Its DTCO solutions such as SDEP, PCellLab, NanoCell and FS-Pro reduce the iteration cycle from process technology development to IC design for models, PDKs and standard cell development products available from Primarius.

NanoDesigner provides an extendable and flexible design environment with schematic entry, layout editing and in-design physical verification that supports full-custom memory and analog/mixed-signal designs. It integrates with NanoSpice, Primarius’ circuit simulator series that offer the full spectrum of circuit simulation capabilities including high-performance parallel SPICE to an adaptive dual-simulation engine FastSPICE. Both offer more accurate and faster results than traditional SPICE and FastSPICE. NanoDesigner’s expanded capabilities cover mixed-signal verification, aging, EM/IR, random telegraph noise (RTN) and high Sigma yield analysis.
PCellLab, a user-friendly automated standard Pcell library development tool, pairs with PQLab, a PDK-quality verification platform, to form a complete solution for PCell generation and verification.

Primarius’ new NanoCell, a solution used for standard cell library characterization, and LibWiz, a user-friendly GUI to qualify libraries, combine for a standard cell library characterization and qualification solution.

And finally, 9812AC is the first commercial low-frequency dynamic noise measurement system. It has superior capabilities and versatility for measuring low-frequency noise characteristics of semiconductor devices over a wide range of bias voltage and excitation frequencies.

More Products in the Primarius Portfolio
SDEP, an innovative model development platform designed to tackle advanced SPICE modeling challenges, provides a system to retain and receive device modeling expertise and build automated flows for different process platforms and applications with intelligent target-oriented algorithms. It has a built-in parallel SPICE simulation engine for fast performance and includes rich data analysis and validation utilities, powerful parameter control and optimization functions and flow automation features.

FS-Pro is an all-in-one parametric analyzer used with semiconductor device DC/AC, reliability and statistical measurement solutions.

At 2022 Design Automation Conference
Primarius Technologies will exhibit at DAC Booth #1419 (First floor) Monday, July 11, through Wednesday, July 13, from 10 a.m. until 6 p.m. at the Moscone Center in San Francisco.

To arrange a meeting or demonstration of the Primarius Technologies product portfolio, send email to: [email protected].

About Primarius
Primarius Technologies (688206.SH) is a global electronic design automation (EDA) company. It delivers the semiconductor industry’s leading design enablement technologies for advanced SPICE modeling, PDK generation and standard cell library characterizations, and a complete design technology co-optimization (DTCO)-enabled custom design flow for complex memory, analog and mixed-signal designs. Powered by leading-edge SPICE/FastSPICE simulation technologies, Primarius is committed to delivering innovative DTCO solutions. Its mission is to shorten time to market and improve yield, power, performance and area of circuit designs at advanced process nodes. Primarius’ unique data-driven EDA solutions are supported by a full range of semiconductor parametric testing systems and the industry’s golden low-frequency noise testing systems. Visit Primarius Technologies for more information.

Japan standards
Highlighted content

SEMI Japan Office
九段南4-7-15
千代田区
Tokyo
1020074
Japan

Standards

Automation Technology Japan TC Chapter Meeting

Date: December 23, 2022

Time: 13:30-17:30 [JST]

via SEMI Japan Office + OVTCCM (Hybrid)

 

AGENDA

 

Standards Contact Information:

Keigo Nakajima

SEMI Japan

Email: [email protected] 

Phone: 81.3.3222.5863

 

NOTE:

Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.

If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!

Questions? Contact your local staff coordinator: Click here

1:30 pm - 5:30 pm Off Add to Calendar 2022-12-23 13:30:00 2022-12-23 17:30:00 Automation Technology Japan TC Chapter Meeting Automation Technology Japan TC Chapter Meeting Date: December 23, 2022 Time: 13:30-17:30 [JST] via SEMI Japan Office + OVTCCM (Hybrid)   AGENDA   Standards Contact Information: Keigo Nakajima SEMI Japan Email: [email protected]  Phone: 81.3.3222.5863   NOTE: Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend. If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today! Questions? Contact your local staff coordinator: Click here SEMI Japan Office 九段南4-7-15 千代田区 Tokyo 1020074 Japan SEMI.org [email protected] Asia/Tokyo public Asia/Tokyo

Deventer, June 21, 2022 – RoodMicrotec N.V., a leading independent company for semiconductors supply and quality services, and EnSilica plc, a leading chip maker of mixed signal ASICs (Application Specific Integrated Circuits), today announce that they have successfully brought a mixed signal automotive ASIC to commercial production following the official launch of a new flagship vehicle by a premium automotive company. The ASIC provides key differentiating features in the chassis control of the vehicle.

As announced in 2018, RoodMicrotec was selected by EnSilica to support it in the qualification and testing of this mixed signal automotive ASIC. RoodMicrotec will undertake final testing and shipment of the ASICs for EnSilica.

EnSilica is pleased to confirm that the main production run has now commenced with the official launch of the vehicle. The production schedule for more than 2.5 million ASICs over the next 12 months has been received. The ASIC has an anticipated seven-year production life and depending on the model, there are up to 24 ASICs per vehicle.

“It has been exciting to support EnSilica in bringing this project to production over the last few years. We are now looking forward to supporting production of this device in our Nördlingen facility”, says Martin Sallenhag, CEO of RoodMicrotec. “It again shows the demand for our unique combined capabilities, in depth experience and excellent track record in bringing automotive products to the market for our valued customers.”

“We are delighted to be entering the full production volume of this exciting project, having successfully collaborated with RoodMicrotec over a number of years. Our joint effort across this highly technical automotive project has now resulted in successful launch of the vehicle”, says Ian Lankshear, CEO of EnSilica.

About EnSilica
EnSilica is a leading fabless design house focused on custom ASIC design and supply for OEMs and system houses, as well as IC design services for companies with their own design teams. The company has world-class expertise in supplying custom RF, mmWave, mixed signal and digital ICs to its international customers in the automotive, industrial, healthcare and communications markets. The company also offers a broad portfolio of core IP covering cryptography, radar and communications systems. EnSilica has a track record in delivering high quality solutions to demanding industry standards. The company is headquartered near Oxford, UK and has a design centres across the UK and in Bangalore, India and Porto Alegre, Brazil.
Further information on EnSilica at www.ensilica.com

About RoodMicrotec
RoodMicrotec is a leading independent company for semiconductor supply and quality services. With more than 50 years of experience in the semiconductor and electronics industry, RoodMicrotec is well-established as a highly valued partner for many companies worldwide. The Company provides full-turnkey ASIC services for complex microchips that are customized to handle specific applications for individual customers. In cooperation with strong partners, RoodMicrotec manages the entire development and production flow of ASICs in the target volume, ranging from low quantities up to multiple millions per year. The turnkey solution includes project management, wafer test, assembly, final test, qualification, failure analysis and logistics. All services comply with the industrial and quality requirements of the high reliability, aerospace, automotive, healthcare and industrial sectors. RoodMicrotec’s headquarter is located in Deventer, Netherlands, with operational units in Nördlingen and Stuttgart, Germany.
Further information on RoodMicrotec at www.roodmicrotec.com

Further information
Martin Sallenhag - CEO, Arvid Ladega - CFO
Telephone: +31 570 745623 Email: [email protected] Web: www.roodmicrotec.com

This press release is published in English and German. In case of conflict between these versions the English version shall prevail.

Breker Verification Systems, the leading provider of advanced test content synthesis solutions for SoC, UVM and Post-Silicon verification environments, named NeXtream of Yokohama, Japan, as its exclusive distributor in Japan.

NeXtream, supplier of software, hardware and intellectual property (IP) created outside of Japan, now sells and supports Breker's TrekSoC™ and TrekUVM™ tools that automatically generate self-verifying test cases for multi-threaded, multiprocessor SoC devices and UVM block-based verification. Breker selected NeXtream for its marketing and sales professionalism and understanding of verification and validation, electronic design automation (EDA) and intellectual property (IP) markets.

“The verification engineering community here and elsewhere needs a solution to automatically generate thousands of tests for every semiconductor design project,” comments Tsunemori Kawahara, president and CEO of NeXtream. “Breker’s TrekSoC is such a solution and is embraced throughout the global chip design verification community.”

“NeXtream has deep ties into the chip design and verification community in Japan and a reputation for exceptional support,” remarks Dave Kelf, Breker’s CEO. “We look forward to a developing a close working relationship.”

About Breker Verification Systems
Breker Verification Systems is a leading provider of verification synthesis solutions that leverage SystemUVM, C++ and Portable Stimulus, a standard means to specify reusable verification intent. It is the first company to introduce graph-based verification and the synthesis of high-coverage test sets based on AI planning algorithms. Breker’s Test Suite Synthesis and TrekApp library allows the automated generation of high-coverage, powerful test cases for deployment into a variety of UVM, SoC and Post-Silicon verification environments. Case studies that feature Altera (now Intel), Analog Devices, Broadcom, IBM, Huawei and other companies leveraging Breker’s solutions are available on the Breker website. Breker is privately held and works with leading semiconductor companies worldwide.

Engage with Breker at:
Website: www.brekersystems.com
Twitter: @BrekerSystems
LinkedIn: https://www.linkedin.com/company/breker-verification-systems/
Facebook: https://www.facebook.com/BrekerSystems/

TrekSoC, TrekSoC-Si, TrekBox and SoC Scenario Modeling are registered trademark of Breker Verification Systems. Breker Verification Systems acknowledges trademarks or registered trademarks of other organizations for their respective products.

Zurich, Switzerland / Heidelberg, Germany – Heidelberg Instruments Nano AG in Zurich, a subsidiary office of Heidelberg Instruments Mikrotechnik GmbH celebrated the 10-year anniversary of the commercialization of the NanoFrazor system series. The NanoFrazor is based on the Thermal Scanning Probe (t-SPL) technology and can be used for nanopatterning of quantum devices on 1D/2D materials, grayscale photonics devices, nanofluidic structures or biomimetic substrates for cell growth.

Originally the Thermal Scanning Probe technology was developed at IBM, where a group of researchers showed that the sharp tips of atomic force microscopes can be heated and used as a tool to “drill” nanoscale holes and later to write arbitrary nanostructures by using special, evaporating materials.

After exploring the technology at IBM, Felix Holzner and Philip Paul incorporated SwissLitho AG as a spin-off from ETH Zurich (Heidelberg Instruments Nano AG since 2021) as CEO and CTO with the idea of selling nanolithography equipment for t-SPL. The technical term “Thermal Scanning Probe Lithography” was then replaced by the product name “NanoFrazor”.

After starting operations of then SwissLitho in early 2013, the first commercial NanoFrazor machine named “Titlis”, a NanoFrazor Explore, was installed in 2014 at McGill University in Canada. “Titlis” is still running and just recently received an upgrade with the integration of the laser writer module jointly developed in Heidelberg and Zurich. Today, more than 50 NanoFrazor systems have been installed at renowned facilities all over the world, with new customers lined up for future systems.

“The NanoFrazor team in Zurich works on various promising developments on the instrument as well as on the materials to continuously expand the applications range of the technology. There are still manifold open opportunities for the NanoFrazor, as it can still be considered novel, even 10 years after the start of its commercialization. Everyone at Heidelberg Instruments is excited to see how the NanoFrazor will have developed in another 10 years from now”, Konrad Roessler, CEO of Heidelberg Instruments Mikrotechnik says.

The anniversary was celebrated in the newly opened office of Heidelberg Instruments Nano in Zurich together with family, friends, and numerous partners, who supported the successful journey of the NanoFrazor.

About Heidelberg Instruments Mikrotechnik GmbH
With over 35 years of experience and more than 1,200 installed systems, Heidelberg Instruments is one of the leading international players in developing and producing high-precision photolithography systems and nanofabrication tools. Heidelberg Instruments systems are installed in industrial and scientific facilities around the world. They are used for efficient direct writing and photomask fabrication for various industries, including semiconductors, quantum computing, photonics, 2D materials, IoT, and many related fields.

Primarius Technologies today announced its SDEP™ intelligent spec-driven model extraction platform has been adopted by Samsung Foundry.

SDEP helps Samsung Foundry and its customers significantly shorten turnaround time for SPICE model development, accelerating development competitiveness at legacy nodes, and enabling fast Design Technology Co-Optimization (DTCO) iterations at advanced process nodes. By continuously embedding know-how in the customized flow, engineers can run automated flows with more than 50% efficiency improvement for curve fitting. That solves resource shortage problems for multiple projects and ensures high-delivery quality of SPICE models independent of engineer’s experience level.

“Samsung and Primarius achieved another success with SDEP’s adoption after intensive testing and qualification of the technology on our advanced process platforms,” remarks Jongwook Kye, Executive Vice President of Foundry Design Enablement Team at Samsung Electronics. “Our mutual customers will benefit from having faster time to market with reduced model development and delivery time. With a SDEP setup, we can provide high-quality SPICE model and meet increasing customer demands with our available engineering resources.”

“Samsung has been a long-time Primarius customer and a strategic partner,” comments Dr. Zhihong Liu, Primarius’ Chairman and CEO. “SDEP is a revolutionary technology to enable an efficient DTCO and meet the toughest needs from advanced process development. We’re glad that SDEP is being adopted by Samsung Foundry, which enables fast iterations with design groups and further increases Primarius’ value as a Samsung SAFE ecosystem partner.”

SPICE modeling is more challenging and takes more effort at smaller technology nodes where device characteristics are more complicated. It now takes several months to develop a full SPICE model library for IC design after process technology development is completed.

In the post-Moore’s Law era, challenges include continuous shrinking of transistors and new process platforms for different applications using older technology nodes. Each variety of a process platform requires a dedicated effort on SPICE model development and foundries see more model development requests than previous generations. As a result, delivery of fast and accurate SPICE models with limited engineering resources is a challenge when faster time to market and quick iterations between process development and circuit designs are expected.

About SDEP
An innovative model development platform designed to tackle advanced SPICE modeling challenges, SDEP provides a system to retain and receive device modeling expertise and build automated flows for different process platforms and applications with intelligent target-oriented algorithms. Modeling experts can establish fully customized model auto-extraction flows for different applications using powerful and flexible modules available. With a built-in parallel SPICE as the core simulation engine for fast performance, it has integrated data analysis and validation utilities, rich parameter control and optimization functions as well as flow automation features.

At 2022 Design Automation Conference
Primarius Technologies will exhibit at the 2022 Design Automation Conference (DAC) in Booth #1419 (First floor) Monday, July 11, through Wednesday, July 13, from 10 a.m. until 6 p.m. at the Moscone Center in San Francisco.

To arrange a meeting or demonstration of the Primarius Technologies product line, send email to: [email protected].

About Primarius
Primarius Technologies (688206.SH) is a global EDA company delivering industry-leading design enablement technologies for advanced SPICE modeling, PDK generation and standard cell library characterizations, and a complete DTCO-enabled custom design EDA flow for complex memory, analog and mixed-signal designs. Powered by leading edge SPICE/FastSPICE simulation technologies, Primarius is committed to deliver innovative DTCO EDA solutions, with the mission to shorten time-to-market and improve YPPA of circuit designs at advanced process nodes, and unique data-driven EDA solutions, supported by full range of semiconductor parametric testing systems and industry’s golden low frequency noise testing systems. Visit Primarius Technologies for more information.

Japan standards
Highlighted content

SEMI Japan Office
九段南4-7-15
千代田区
Tokyo
1020074
Japan

Standards

FPD Materials & Components 
Japan TC Chapter Meeting

Date: Friday, October, 14 2022

Time: 14:30-16:30[JST]

via OVTCCM, SEMI Japan Office (Hybrid)

 

AGENDA 

Standards Contact Information:

Mami Nakajo

Coordinator, SEMI Japan

Email: [email protected] 

Phone: 81.3.3222.5949

 

NOTE:

Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.

If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!

Questions? Contact your local staff coordinator: Click here

2:30 pm - 4:30 pm Off Add to Calendar 2022-10-14 14:30:00 2022-10-14 16:30:00 FPD M&C Japan TC Chapter Meeting FPD Materials & Components  Japan TC Chapter Meeting Date: Friday, October, 14 2022 Time: 14:30-16:30[JST] via OVTCCM, SEMI Japan Office (Hybrid)   AGENDA  Standards Contact Information: Mami Nakajo Coordinator, SEMI Japan Email: [email protected]  Phone: 81.3.3222.5949   NOTE: Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend. If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today! Questions? Contact your local staff coordinator: Click here SEMI Japan Office 九段南4-7-15 千代田区 Tokyo 1020074 Japan SEMI.org [email protected] Asia/Tokyo public Asia/Tokyo
Japan Standards
Highlighted content

SEMI Japan Office
九段南4-7-15
千代田区
Tokyo
1020074
Japan

Standards

FLEXIBLE HYBRID ELECTRONICS (FHE) JAPAN TC CHAPTER MEETING


Date: Thursday, October 13, 2022 

Time: 15:00 - 17:00 [Japan Standard Time]
via SEMI Japan Office + OVTCCM (Hybrid)


AGENDA

 

Standards Contact Information:

Hirofumi Kanno

Manager, SEMI Japan

Email: [email protected] 

Phone: 81.3.3222.5863

 

NOTE:

Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend.

If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today!

Questions? Contact your local staff coordinator: Click here

3:00 pm - 5:00 pm Off Add to Calendar 2022-10-13 15:00:00 2022-10-13 17:00:00 Flexible Hybrid Electronics (FHE) Japan TC Chapter Meeting FLEXIBLE HYBRID ELECTRONICS (FHE) JAPAN TC CHAPTER MEETING Date: Thursday, October 13, 2022  Time: 15:00 - 17:00 [Japan Standard Time] via SEMI Japan Office + OVTCCM (Hybrid) AGENDA   Standards Contact Information: Hirofumi Kanno Manager, SEMI Japan Email: [email protected]  Phone: 81.3.3222.5863   NOTE: Standards meetings are open to all, but you must be a SEMI Standards Program Member to attend. If you are not a Member, please register for the International SEMI Standards Program and start making a big contribution to the industry’s progress, complete an application form today! Questions? Contact your local staff coordinator: Click here SEMI Japan Office 九段南4-7-15 千代田区 Tokyo 1020074 Japan SEMI.org [email protected] Asia/Tokyo public Asia/Tokyo

Registration Details

Members: $113.00
Non-Members: $150.00

Registration includes a copy of the RITdb Standard - SEMI E183

No refunds for cancellations; Substitutions can be made at any time.

Contact:  Michelle Sun, [email protected]

 

Belgium France Germany Italy Japan South Korea Taiwan United States RITdb master class Business Technical

Industry 4.0 brings machine to machine IOT, human augmentation, cloud, edge, and AI together to enable a better manufacturing process.  Before we can take advantage of the promise we need a efficient means to share the very complex and wide ranging data which is created and used on the test floor.  This data comes from many sources, has latency and security issues with constantly changing sources and applications. RITdb solves the sharing issues via extensible machine focused data structures and transport formats which have been validated in an advanced test environment.

This 2 hour workshop is divided into three sections: and introduction to the problems and values, a walk through on how RI and TI implemented the POC in a working production environment and finally a deep technical dive into the implementation effort needed to get started.

Course Outline

  • Introducation
    • Topology
  • Topic
    • Structure
    • Usage with Examples
  • Body
    • Structure (CBOR*)
      • CBOR  (include embedded OMAP)
      • Events
      • Data
    • Usage
      • Examples
  • Proof of Concept (POC) findings
    • Identity Requirements
    • Connection Process
    • Review use of Channels in Messaging
      • Admin
      • Logging
      • Events
    • Object Save(OS)/ Object Read (OR) Message
      • Demonstrate link between the messaging and repo
      • Demonstrate embedded OMAP

*CBOR – Concise Binary Object Representation

Virtual, Online
United States

CAST Standards

Looking to take advantage of Industry 4.0 to bring order to the chaos of your semiconductor test process? Attend this course online and learn how an implementation of the latest SEMI Standard for test floor data and events sharing can improve the productivity of your test operations.

This 2 hour workshop is a follow-on from this July STEP Class.

8:00 am - 10:00 am Off Add to Calendar Disabled America/Los_Angeles

Boston / London June 2022 – Leading surplus asset management company, EquipNet Inc., announced enhancements to its Equipment Sustainability Programs. Since 1999, EquipNet has been helping global manufacturers to track, redeploy, buy, and sell surplus manufacturing assets, contributing to clients’ overall sustainability goals even before those goals were created.

EquipNet has improved its proprietary Asset Management System (ARMS), a web-based tracking software, to not only track idle equipment throughout the enterprise but measure landfill avoidance on a global scale. This comprehensive software ensures cost savings through the redeployment of equipment from facilities that no longer have a use for the assets to locations that can use the machines. Now with the landfill avoidance tracking, the system also contributes to sustainable management. Just in the last few years, EquipNet’s clients have diverted 200,000 tonnes of waste from landfills.

“Creating a more sustainable environment for global manufacturers has been at the heart of what we do for almost a quarter of a century,” says Ben Potenza, VP of Sales & Marketing. “Redeploying and selling well-maintained equipment is only part of the story. Now we can help our clients illustrate real impact on the circular economy by tracking landfill avoidance.”

Equipment Sustainability Programs unlock idle machinery potential and contribute to positive corporate citizenship by extending machinery’s useful life, as well as delivering substantial cost avoidance to the enterprise. It’s the essence of a circular economy.

About EquipNet
EquipNet is a leading provider of proactive asset management solutions and services to leading corporations in the pharmaceutical, chemical, electronics, industrial, and consumer packaged goods industries. EquipNet’s vision is to revolutionize the way companies manage their surplus assets by maximizing financial returns and minimizing the risks associated with idle capital assets. If you have surplus you are looking to sell, or are looking for pre-owned equipment at an affordable price, visit us at www.EquipNet.com.

Press Contact
Sarah Kilburne
Director of Marketing, EquipNet
[email protected]