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SCANLAB GmbH together with its sister companies Blackbird Robotersysteme GmbH and Holo/Or Ltd. is developing promising new system concepts for laser applications such as laser welding of bipolar plates and additive manufacturing (metal 3D printing). By integrating tailored beam shapers, the novel scan setup showed the potential to nearly double the productivity of welding bipolar plates for hydrogen fuel cells.

Fuel cell technology was considered a niche market for a long time. Due to the transition phase in energy generation and the search for alternative drives, the market demand might grow notably. For efficient mass production an increase of throughput in welding of metal bipolar plates, used to build the stacks in a fuel cell, is needed. High welding speeds require fast scan systems and high power lasers, both available. However, it’s the welding process itself which determines the maximum reachable speed. Weld seam failures such as humping effects and undercut occur when a certain speed limit is exceeded.

Blackbird Robotersysteme set up a test rig integrating the 2D scan head intelliSCAN from SCANLAB and HOLO/OR’s latest development the Flexishaper, a full range adjustable beam shaper. The necessary beam shape was determined based on welding process simulations. The layout of the utilized beam shaper is the result of a combined optical design, integrating both diffractive optical elements (DOE) and scan system. The processing tests demonstrated to shift the speed limit of failure free welding speed from 45 m/min up to 70 m/min.

Adopting processing experience with DOEs
Thin sheet welding of bipolar plates has similar requirements to laser powder bed fusion (LPBF) processes. Both require scan field sizes up to 500 x 500 mm² with a typical processing speed around 1m/s and below. Also in metal 3D printing the processing speed is not limited by the speed of the scanner or the available laser power, but it is mostly the process itself which limits the throughput. Thus, the encouraging laser welding results are the first step on the way to further optimize LPBF processes as well.

“Our joint company holding creates the trust that is necessary for such a close cooperation to explore innovative solutions. Only in a setup like this you can openly analyze the upcoming market requirements and transfer the outcome in an optical design” recounts Georg Hofner, CEO SCANLAB.

“Our sister companies provide a construction kit for us, which we can translate into tangible benefits for our markets and customers based on our specific experience and application knowledge” adds Karl Christian Messer, CEO Blackbird Robotersysteme.

“This is exactly the kind of cooperation that creates high value products by combining our unique beam shaping expertise with our sister companies market deep understanding” concludes Israel Grossinger, Owner and President of HOLO/OR.

The next steps will be to test the laser welding concept in a larger scale setup and to pursue different applications in parallel. As the fiberSYS meets requirements of both LPBF and laser welding processes, the integration of DOEs into this scan system, particularly suited for multi head laser machines, was included in the development road map.

At the end of 2021, there were 153 semiconductor fabs processing 300mm wafers for the fabrication of ICs, including CMOS image sensors, and non-IC products such as power discretes.

The 300mm wafer fab count increased by 14 in 2021, the most in one year since the same number opened in 2005. There are 10 fabs scheduled to open in 2022, followed by another 13 in 2023 and 10 in 2024. This puts the industry on pace to have more than 200 300mm fab lines in operation by 2026. These are projections made in Knometa’s new Global Wafer Capacity 2022 report.

An increasing number of 300mm fabs are being built to fabricate non-IC devices, and power transistors in particular. The manufacturing cost benefits of processing chips on the large wafers come into play for device types characterized by large die sizes and high volumes. Examples of integrated circuits with these characteristics include DRAMs, flash memory, image sensors, complex logic and microcomponent ICs, PMICs, baseband processors, audio CODECs, and display drivers. While large-size power transistors are still small compared to the die sizes of these ICs, they ship in high volumes and are big enough to keep a 300mm fab loaded at a cost-effective production level. According to IC Insights, unit demand for power transistors in 2021 reached 43.5 billion for power MOSFETs and 2.2 billion for IGBTs.

300mm Wafer Fabs Opening in 2022

  • CR Micro (Runxin Microelectronics) fab in Chongqing, China, for power semiconductors
  • Silan Microelectronics fab in Xiamen, Fujian, China for power discretes and sensors
  • SK Hynix M15 Phase 2 fab in Cheongju, Korea, for 3D NAND flash
  • SMIC fab in Shenzhen for foundry services
  • ST/Tower joint venture fab in Agrate, Italy, for mixed-signal, power, and RF ICs and foundry services
  • TI RFAB2 in Richardson, Texas, USA, for analog ICs
  • TSMC Fab 18 Phase 4 in Tainan, Taiwan, for foundry services
  • TSMC Fab 16 Phase 2 in Nanjing, Jiangsu, China, for foundry services
  • TSMC Fab 18 Phase 5 in Tainan, Taiwan, for foundry services
    Winbond fab in Kaohsiung, Taiwan, for DRAMs

Of the 10 300mm wafer fabs scheduled to begin operations in 2022, two will be focused on the production of non-IC products. One is a CR Micro fab in Chongqing, China, and the other a fab in Xiamen, China, owned by Silan Microelectronics.

One-third of the new 300mm fabs opening this year are being built by TSMC. Responding to high demand for its foundry services, the company increased its capital spending 74% in 2021 to $30 billion. Much of that spending went toward equipping the Phase 4 and Phase 5 fabs at its Fab 18 campus in Tainan. TSMC is also finishing up a second fab at it Fab 16 site in Nanjing, China, to meet demand for mature technologies, especially 28nm CMOS.

Texas Instruments and STMicroelectronics (and its new fab partner Tower Semiconductor) are completing the construction of 300mm fabs targeted at analog and mixed-signal IC production. TI reported a huge increase in capital spending for 2021 with 279% more spent during the year than in 2020. Most of the money was used to buy new equipment for the company’s second fab in Richardson, Texas, and third 300mm fab overall. The RFAB2 facility will more than double wafer capacity at the Richardson site.

Only two of the new 300mm fabs scheduled to open in 2022 are for memory products. SK Hynix is expected to begin operations on a Phase 2 line for 3D NAND at its M15 fab site in Cheongju, Korea, while Winbond plans to start up a new DRAM fab in Kaohsiung, Taiwan.

View more information about Global Wafer Capacity 2022 at https://knometa.com/gwc

BENEQ, PRESS RELEASE, March 10, 2022, 14.00 EEST

Beneq, the home of Atomic Layer Deposition (ALD), has introduced BeneqCare, a new modular solution to offer support and maintenance services to organizations that own and operate Beneq ALD equipment.

Beneq leads the market with ALD products for R&D, semiconductor device fabrication, 3D and batch production, ultra-fast spatial ALD (C2R), and roll-to-roll ALD. Today, the company has launched BeneqCare to help customers in the EU, Asia and the USA maximize the value of their ALD tools throughout their equipment’s life cycles.

“We have been investing heavily in widening our service capabilities worldwide. Now, we offer service coverage in all regions. We have also established spare part hubs in every region at Beneq offices,” says Hans Fabritius, Vice President, Life Cycle Services at Beneq.

“BeneqCare simplifies ALD equipment ownership by helping our customers maximize uptime and gain access to the right support at every stage of their tool’s life cycle. We are ready to assist our customers in meeting their productivity requirements –from training personnel in using the equipment to meeting any unscheduled maintenance or spare parts needs,” asserts Fabritius.

BeneqCare provides Beneq customers who operate in the industrial and research sectors with a wide range of service modules to suit their operations, from extended warranty and training services to remote or onsite support.

“Our customers have high expectations for the performance of their Beneq ALD tools. BeneqCare brings them versatile support and service plans that grow with their businesses,” says Fabritius.

Companies and research facilities that have commissioned Beneq ALD equipment can avail of a variety of BeneqCare service modules to suit their unique requirements. Among the BeneqCare modules are technical support services, including remote support via Augmented Reality (AR); spare part services; extended warranties; preventive as well as unscheduled maintenance services; and training.

Learn more about BeneqCare: www.beneq.com/beneqcare/

Further information
Lie Luo, Head of Marketing, [email protected]

About Beneq
Beneq is the home of atomic layer deposition. In 1984, we established the world’s first industrial production using ALD. Today, we lead the market with products for R&D (TFS 200, TFS 500, R2), semiconductor device fabrication (Transform®), 3D and batch production (P400A, P800, P1500), ultra-fast spatial ALD (C2R), and roll-to-roll ALD (Genesis).

Beneq’s unique Development Service simplifies customer adoption and proof-of-concept for new ALD processes, while our Coating Service cuts down time to market by outsourcing state of the art ALD production. Our team of engineers and experts is dedicated to making ALD tools accessible for researchers.

Registration Details

Registration is free of charge, but must be done in advance 

 

 

 

Belgium France Germany United States Register Now PNT 2 Gap Analysis 2023 Business Technical

Massachusetts Institute of Technology—MIT
50 Memorial Dr,
Samberg Conference Center, Chang Building (E52)
Cambridge, MA 02142
United States

1:00 pm - 3:00 pm

Phase 2 Project Introductions

- Low-SWaP-C, GPS-free PNT technology
- Novel materials, fabrication & packaging techniques and approaches
- Advancements in atomic clock and quantum sensor photonics

3:00 pm - 4:30 pm

Break Out Sessions

Thrust Area 1: Novel Materials, Fabrication, and Packaging Techniques for Low-SWaP Inertial and PNT Sensors
Thrust Area 2: Advanced Active and Passive Integrated Photonics for Low-SWaP Atomic Clocks, Quantum Systems, & PNT Sensors
Thrust Area 3: Advancements Towards Low-SWaP, GPS-Free PNT Technologies

4:30 pm - 5:00 pm

Group Reports & Wrap Up

MSIG

SEMI MSIG has another $5M in R&D funding for sensor positioning, navigation, and timing (PNT) technology development! Register now to attend our half-day Gap Analysis workshop, taking place May 22nd, the afternoon before our premier sensor technology-event, the MEMS & Sensors Technical Congress (MSTC). Meet US Gov’t subject matter experts (SME’s) to discuss PNT pain points and get insights into this year’s request for proposals (RFP) expected in June 2023.

The workshop will feature presentations from the new 2023 PNT projects and identify areas for this year’s RFP.

Have your voice heard, as SEMI MSIG and the Army Research Lab work to fund PNT R&D technology improvements in a 5-year (2022-2027) $25M program.  This gap analysis workshop is a critical component of the program’s 2nd year activities.

1:00 pm - 5:00 pm Off Add to Calendar Disabled America/Los_Angeles

Hotel

Cambridge hotels are expensive in late May, so we have made a deal for you, click here!

We have a room block reserved at DoubleTree Suites by Hilton Hotel Boston, Cambridge for May 21, 2023 through May 25, 2023. Booking your room is simple, just select "Book a Room" to receive your group's preferred rate. Must book rooms before May 12th to obtain discounted rate.

Please book your hotel reservations online for MSTC 2023 Conference or guests can call our 24-7 reservations desk to book your room or please ask for the Front Desk and then provide the Group Code: MSTC 

Book a Room Here

*must book rooms before May 12th to obtain discount rate. 

Registration Details

During Registration, you will have the option to also register for MEMS & Sensors Technical Congress (April 26-27) and the Positing, Navigation & Timing Gap Analysis Workshop (April 25).  3 Great Opportunities to Network, Learn, Share and Connect in 1 week.

CANCELLATION POLICY:

  • Substitution available anytime with written note from original registrant.
  • 75% Refund is cancelled before April 15, 2022. 
  • 50% Refund if cancelled between April 16 and date of workshop.
  • No refunds after April 28.
Belgium France Germany Ireland Italy Japan Malaysia Singapore South Korea Taiwan United States Register Now MSIG Master Class Tile Technical

Speaker Bios

Mahesh Chowdhary, Ph.D. is a Fellow and Director of Strategic Platforms & IoT Excellence Center at STMicroelectronics based in Santa Clara CA. He leads effort on development of solutions and reference designs for mobile phones, consumer electronic devices, automotive and industrial applications that utilize MEMS sensors, computing and connectivity products. His area of expertise includes AI/ML, MEMS sensors, IoT, digital transformation, and location technologies. He has been awarded 30 patents. He has spoken extensively internationally about Machine Learning, Smart Sensors, and IoT. Mahesh received PhD in Applied Science (Particle Accelerators) from the College of William & Mary in Virginia. He is also an Adjunct Professor at IIT, Delhi.

Mahaveer Jain - Mahaveer Jain is Application Principal Engineer at STMicroelectronics(Santa Clara, CA) and specializing in MEMS sensors, Algorithm, DSP, and Machine Learning . Over the course of his career, Mahaveer worked on indoor navigation, hybrid positioning , sensor calibration, and sensor fusion. His most recent work has been developing extremely low power machine learning models to run on sensors. Mahaveer received a Bachelor of Technology in Physics from IIT Delhi.

Denis Ciocca - Denis is Staff Applications Engineer at STMicroelectronics specializing in Linux OS, Linux device drivers, Android OS, and Smart sensors. He has developed a variety of solutions with MEMS sensors, a computational platform of STM32 microcontrollers and wireless connectivity solutions. Denis has received his Master’s degree in Computer Science and Engineering from the University of Pavia, Italy.

Featured Speakers
Highlighted content

Course Abstract:

This class will explain and demonstrate how AI/ML logic can be implemented on Edge devices such as Smart sensors. Power efficiency, latency, and bandwidth considerations are important for AI/ML implementation on Edge devices. Computing can be distributed between Edge devices and Cloud. The latest trends and applications of smart sensors in consumer electronics, automotive, and industrial use cases will be discussed.

Course Outline:

  1. AI / ML on Edge devices
    1. Why AI / ML on Edge devices?
      1. Power efficiency, latency and bandwidth considerations when executing AI / ML logic on Edge devices.
    2. Computing distribution between Edge device, gateway and Cloud.
    3. Assignment: Finite State Machine and Decision Tree applications
  2. Introduction to Inertial Sensors with AI / ML capabilities
    1. Background on inertial sensors including applications
    2. Typical performance characteristics of inertial sensors
    3. Lab: SensorTile.Box and use of custom sensors to change sensor sampling rate, filters, and other configuration. 
  3. Machine Learning Core (MLC) in Smart Sensor
    1. An introduction ML at Edge of the Edge, Smart Sensors: Latest trends Applications of Smart sensors applications in consume electronics, automotive, industrial use cases. Next generation of smart sensors.
    2. AI on the Edge and requirements of distributed intelligence system.
    3. Introduction to MLC framework
      1. Input data
      2. Filters and Feature selection
      3. Optimization
      4. Tools
    4. Rapid Prototyping with MLC: current consumption under 10 uA
    5. Lab: Motion Intensity detection using MLC. Lab conducted using AlgoBuilder tool.  
  4. Finite State Machines (FSM) in Smart Sensor
    1. Introduction to FSM
      1. Input data
      2. FSM definition and structure
      3. Conditions list
      4. Tools
    2. Rapid Prototyping using FSM:
    3. Lab: Gesture recognition using FSM. Lab conducted using AlgoBuilder Tool.

SEMI
673 South Milpitas Avenue
Milpitas, CA 95035
United States

Mahesh Chowdhary
Mahesh Chowdhary, Ph.D.
Fellow & Director of Strategic Platforms & IoT Excellence Center
STMicroelectronics
Mahaveer Jain
Mahaveer Jain
Applications Principal Engineer
STMicroelectronics
Dennis Cioccca
Denis Ciocca
Staff Applications Engineer
STMicroelectronics
MSIG

Earn CEUs and IEEE PDHs from this hands-on SEMI MSIG Master Class & Lab, where instructors will explain and demonstrate how AI/ML logic can be implemented on edge devices such as smart sensors. Attendees will build and operate their own edge device with AlgoBuilder tools in 2 lab sections of the course.

This course is designed for applications engineers wanting to learn how to add sensors to an existing or new product. Instructors are experienced STMicroelectronics engineers with many sensor design and implementations.

The course covers many topics including the importance of power efficiency, latency, and bandwidth considerations for AI/ML implementation on edge devices. Learn how computing can be distributed between the edge devices and the cloud. The latest trends and applications of smart sensors in consumer electronics, automotive, and industrial use cases will also be discussed.

Join us in person at SEMI HQ, for this hands-on learning experience. 

This course is underwritten by STMicroelectronics.

ST Logo

8:30 am - 5:30 pm Off Add to Calendar Disabled America/Los_Angeles

ESPOO, Finland, 17th of February 2022 – Fraunhofer Institute for Silicon Technology (ISIT) has taken PICOSUN® P-300B ALD system into use as their powder MEMS technology platform.

Fraunhofer ISIT PowderMEMS is a new innovative technology for creating three-dimensional microstructures from a multitude of materials on wafer level. The technology is based on bonding together µm-sized powder particles in a cavity with Atomic Layer Deposition (ALD). It has many advantages compared to other manufacturing techniques as it allows using much lower process temperatures compared to a traditional sintering process. The bonded porous structures are thermally and chemically resistant thus enabling their extensive post-processing in a clean room.

"The technology can be used for various applications, such as microelectronics, MEMS sensors, MEMS actuators and microfluidics. For example, it enables the integration of porous and magnetic 3D microstructures on wafer level", explains Dr. Björn Gojdka, Group Leader at Fraunhofer ISIT.

“We were looking for a solution for conformal high surface area coating of powder located in trenches. Picosun solution is a perfect fit for this need as we are also looking into scaling up the technology. We are especially happy about the tool’s hot wall reactor, versatile precursor sources and its easy maintenance”, states Dr. Thomas Lisec, Chief Scientist at Fraunhofer ISIT.

“We are excited over this new technology coming to life and all the opportunities it will bring. I am especially impressed by the potential applications for the Fraunhofer ISIT PowderMEMS as they are exceptionally diverse. I’m looking forward to continuing working closely with Fraunhofer ISIT on bringing the technology up to industrial production”, says Dr. Christoph Hossbach, General Manager of Picosun Europe GmbH.

More information:
Dr. Christoph Hossbach, General Manager, Picosun Europe GmbH
Tel. +49 1522 449 49 11
Email: [email protected]
Web: www.picosun.com

About Picosun
Picosun provides the most advanced ALD (Atomic Layer Deposition) thin film coating solutions for global industries. Picosun’s ALD solutions enable technological leap into the future, with turn-key production processes and unmatched, pioneering expertise in the field – dating back to the invention of the technology itself. Today, PICOSUN® ALD equipment are in daily manufacturing use in numerous leading industries around the world. Picosun is based in Finland, with subsidiaries in Germany, USA, Singapore, Japan, South Korea, China mainland and Taiwan, offices in India and France, and a world-wide sales and support network. Visit www.picosun.com.

About Fraunhofer ISIT
Fraunhofer ISIT in Itzehoe is one of Europe's most modern research facilities for microelectronics and microsystems technology. At the heart of the institute are the clean room facilities, large enough not only to conduct research but also to manufacture the developed microchips on an industrial scale. In close cooperation with partners from industry, 160 scientists at ISIT develop power electronics components and microsystems with fine moving structures for sensor technology and actuator technology, including the necessary packaging technology. www.isit.fraunhofer.de

Belgium China France Germany Ireland Italy Japan South Korea Taiwan United States Register Now https://discover.semi.org/new-gdsi-dicing-process-webinar-on-demand.html MSIG WEbinar tile Business Executive Technical Featured Speakers

About the Speaker:  Rich Boardman is a 15-year veteran of the Semiconductor industry whose expertise lies in equipment sets, process technology and consumables related to wafer or substrate dicing, grinding or polishing. Rich is a Senior Sales Engineer at GDSI, located in San Jose, California.

United States

Richard Boardman GDSI
Richard Boardman
Senior Sales Engineer
GDSI

Join us for this second webinar in the MSIG series on foundries, dicing, and packaging considerations in MEMS fabrication. 

In this session, GDSI will provide an introduction of the Stealth Dicing process, highlight the applications it is most well suited to, and share design rules and process window specifications.

The Stealth laser dicing process is a water-free, particle-free wafer singulation method.  It is particularly well suited to MEMS, Quantum, bio-sensing and Silicon Photonics to name a few use cases. Secondarily, it offers great value for multi-project wafer (MPW) applications since it allows singulation of the whole wafer in a single process step, negating the need for wafer sub-dicing and remounting.

Find out if your current wafer layout is compatible with the Stealth Dicing process, and if not, what must be done to ensure initial success with this innovative dicing technology. .

8:00 am - 9:00 am Off Add to Calendar 2022-03-30 08:00:00 2022-03-30 09:00:00 MSIG Webinar GDSI Dicing Process Join us for this second webinar in the MSIG series on foundries, dicing, and packaging considerations in MEMS fabrication.  In this session, GDSI will provide an introduction of the Stealth Dicing process, highlight the applications it is most well suited to, and share design rules and process window specifications. The Stealth laser dicing process is a water-free, particle-free wafer singulation method.  It is particularly well suited to MEMS, Quantum, bio-sensing and Silicon Photonics to name a few use cases. Secondarily, it offers great value for multi-project wafer (MPW) applications since it allows singulation of the whole wafer in a single process step, negating the need for wafer sub-dicing and remounting. Find out if your current wafer layout is compatible with the Stealth Dicing process, and if not, what must be done to ensure initial success with this innovative dicing technology. . United States SEMI.org [email protected] America/Los_Angeles public America/Los_Angeles
Event format
GDSI logo

This webinar graciously underwritten by GDSI.  Registration is free to all attendees.

GDSI logo
Belgium China France Germany Ireland Italy Japan South Korea Taiwan United States Register Now https://discover.semi.org/designing-mems-with-ge-polaris-process-webinar-on-dem… 20220302 MSIG Webinar GE Business Executive Technical Featured Speakers

About the Speaker:  Robert MacDonald is a MEMS engineer at GE’s Research. His research is focused on high performance inertial sensors. He has over 20 years of experience in the MEMS and semiconductor industries. His work has covered the product life cycle of chemical, inertial and optical sensors from design through market introduction and manufacturing.

United States

Robert MacDonald, GE Research
Robert MacDonald
MEMS Engineer
GE Research
MSIG

Join us for this first webinar in the MSIG series on foundries, dicing, and packaging considerations in MEMS fabrication.

In this first in the series, GE Research will present their new MEMS process suitable for bulk silicon motion sensors. The process aims to deliver many features of complex MEMS flows, such as wafer level packaging with through silicon vias (TSVs), with a short cycle times and low mask counts. This webinar will introduce the Polaris process within the GE Research foundry and explain how to design the process, and our model for delivering new designs.

8:00 am - 9:00 am Off Add to Calendar 2022-03-02 08:00:00 2022-03-02 09:00:00 MSIG Webinar GE Polaris Process Join us for this first webinar in the MSIG series on foundries, dicing, and packaging considerations in MEMS fabrication. In this first in the series, GE Research will present their new MEMS process suitable for bulk silicon motion sensors. The process aims to deliver many features of complex MEMS flows, such as wafer level packaging with through silicon vias (TSVs), with a short cycle times and low mask counts. This webinar will introduce the Polaris process within the GE Research foundry and explain how to design the process, and our model for delivering new designs. United States SEMI.org [email protected] America/Los_Angeles public America/Los_Angeles
Event format

BENEQ, PRESS RELEASE, December 6, 2021

Beneq revolutionized ALD cluster tools for More-than-Moore device makers with the highly successful Beneq Transform® family of products. Today, Beneq broadens its product portfolio further with two new distinct solutions: the Transform® 300 and ProdigyTM.

The Beneq Transform 300 and Prodigy were each created in response to specific technology requirements in the semiconductor manufacturing sector.

“The Transform 300 is designed to meet the growing demand of emerging semiconductor applications at 300 mm for devices such as CMOS image sensors, Power Devices, Micro-OLED/LED, and Advanced Packaging, which call for a high degree of versatility,” explains Patrick Rabinzohn, Vice President, Semiconductor ALD at Beneq.

“We created Prodigy to address those market segments that need a simple solution supported by high-end technology. It inherits the ALD design and processing knowhow we at Beneq have developed over the last 15 years, packing advanced features in a simpler, targeted industrial form factor,” continues Rabinzohn.

Beneq Transform® 300
Beneq Transform 300 is the only 300 mm ALD cluster tool that combines thermal ALD (batch) and plasma ALD (single wafer) technologies to provide a highly versatile platform for IDMs and foundries. It is dedicated to advanced thin-film applications in CIS, Power, Micro-OLED/LED, Advanced Packaging and other MtM applications.

Beneq Transform 300 is a highly configurable platform that caters to multiple advanced thin-film applications ranging from gate dielectric including in high aspect ratio trenches, to anti-reflection coating, final passivation or encapsulation, Chip-Scale-Packaging and beyond.

Beneq Prodigy
Beneq Prodigy is the deal manufacturing solution for compound semiconductor including RF IC’s (GaAs/GaN/InP), LED, VCSEL, Light Detectors and for MEMS manufacturers and foundries looking to enhance device performance and reliability through an affordable stand-alone ALD batch tool. Beneq Prodigy provides best-of-breed passivation and encapsulation films across multiple wafer types and sizes.

To learn more, visit:

Beneq Transform 300:  https://beneq.com/en/products/semiconductors/transform300/

Beneq Prodigy: https://beneq.com/en/products/semiconductors/prodigy/

Further information:
Lie Luo, Head of Marketing, [email protected]

About Beneq
Beneq is the home of atomic layer deposition. In 1984, we established the world’s first industrial production using ALD. Today, we lead the market with products for R&D (TFS 200, TFS 500, R2), semiconductor device fabrication (Transform®), 3D and batch production (P400A, P800, P1500), ultra-fast spatial ALD (C2R), and roll-to-roll ALD (Genesis).  Beneq’s unique Development Service simplifies customer adoption and proof-of-concept for new ALD processes, while our Coating Service cuts down time to market by outsourcing state of the art ALD production. Our team of engineers and experts is dedicated to making ALD tools accessible for researchers. 

FREMONT, Calif. - YES (Yield Engineering Systems, Inc.), a leading manufacturer of process equipment for semiconductor advanced packaging, life sciences and “More-than-Moore” applications, today announced that it has set up Engineering Centers of Excellence at two locations in India: Coimbatore and Bangalore. A sales office will also be located in the Bangalore area.

“It is no secret that high-caliber engineering expertise is in high demand in Silicon Valley,” said Ramakanth Alapati, Chairman and CEO of YES. “Our company’s rapid growth has inspired us to widen our technical recruitment efforts to include global engineering talent powerhouses like India. In addition, we feel there is a strong market for reliable, cost-effective YES systems within India’s domestic semiconductor industry.”

Leading YES’s efforts in India will be Dr. Ankineedu Velaga, a high-tech engineering executive with more than 35 years of experience spanning engineering and fab operations, customer interaction and retention, and business development support in the US and Asia.

“Ankineedu’s experience in driving teams to improve processes will be a great resource for YES as we scale to meet the challenges of worldwide growth. We will be looking to him to draw upon his impressive track record of building organizations to develop complex semiconductor capital equipment as well as leading organizations to achieve better process development, yields, process control, cycle time, cost, and product quality,” said Rezwan Lateef, President of YES.

Dr. Velaga has held leadership roles with BRIDG, imec, SilTerra, Applied Materials, Avago, and Lucent (among others), and his global management experience extends from the US and the European Union to Malaysia and Singapore. His educational background includes a Ph.D. in Chemical Engineering from the University of Arkansas, an M.S. in Chemical Engineering from the Indian Institute of Technology in Madras, and a B.S in Chemical Engineering from the Regional Engineering College in Warangal, India.

“I am pleased and honored to be embarking on this exciting endeavor with YES,” commented Velaga. “We expect to build our India team quickly, and I look forward to talking with high-potential candidates. To see our current job postings for YES India, please visit Careers at yieldengineering.com and scroll down to the ‘YES India’ heading. If you don’t see a job there at the moment that aligns with your skills and interests, but you are a qualified candidate with a technical background and semiconductor experience, I encourage you to submit your resumé to [email protected] and include ‘YES India’ in the subject line.”

About YES
YES (Yield Engineering Systems, Inc.) is a preferred provider of high-tech, cost-effective equipment for transforming surfaces, materials, and interfaces. The company’s product lines include thermal processing systems, chemical vapor deposition (CVD) systems, plasma etching tools, and wet process equipment used for the precise surface modification of semiconductor substrates, semiconductor and MEMS devices, and biodevices. With YES, customers ranging from startups to Fortune 100 companies can create and volume-produce products in a wide range of markets, including Advanced Packaging, MEMS, Augmented Reality/Virtual Reality and Life Sciences. YES is headquartered in Fremont, California, with a growing global presence. For more information, please visit www.yieldengineering.com.