Standards

For years, cybersecurity in manufacturing was often treated as a mere compliance issue. Suppliers filled out questionnaires. A scan report was produced before shipment. A checklist was reviewed during qualification. A document proved that the equipment was "secure enough" at a given point in time. This model is no longer sufficient. As equipment becomes more software-driven, connected, and remotely maintained, cybersecurity responsibility is moving closer to the product itself and therefore closer to the OEM. Fabs still define their security expectations, but OEMs are increasingly expected to provide evidence that their equipment can remain secure throughout its lifecycle.Semiconductor manufacturing is entering a new phase of cybersecurity. The question is no longer simply, "Was this equipment compliant when it was delivered?" A stronger question is emerging: "Can this equipment continuously demonstrate that it is operating securely and reliably?" This shift matters because semiconductor equipment is no longer isolated machinery. It is software-intensive, networked, remotely maintained, data-producing, and deeply integrated into fab operations. Equipment controllers, factory interfaces, service laptops, recipes, logs, remote access tools, operating systems, middleware, and data acquisition services now comprise a significant digital presence surrounding the physical process. The risk is not theoretical. Industrial automation and control systems are now considered cybersecurity assets throughout their lifecycle rather than merely engineering systems. In the global semiconductor manufacturing industry, this shift is evident through the following SEMI standards:SEMI E169 provides guidance for equipment information system security. SEMI E187 defines cybersecurity requirements for fab equipment.SEMI E191 addresses cybersecurity status reporting for computing devices connected to the factory network.These semiconductor-specific standards align with the broader industrial cybersecurity trend. The ISA/IEC 62443 series addresses cybersecurity throughout the industrial automation lifecycle, including product development, integration, operation, maintenance, and supplier responsibility. The National Institute of Standards and Technology (NIST) has moved in the same direction with Cybersecurity Framework 2.0 by adding "govern" as a core function and making cybersecurity the responsibility of leadership, risk management, and the supply chain rather than just a technical activity.In Europe, this shift is also becoming regulatory. Under the Cyber Resilience Act, starting September 11, 2026, manufacturers will be required to actively report vulnerabilities and severe incidents affecting products with digital elements. They must provide an early warning within 24 hours and a full notification within 72 hours. This will encourage many industrial suppliers to strengthen their vulnerability management.A fab does not only need to know that an equipment was shipped with a supported operating system. It also needs to know if the system remains aligned with the approved configuration after installation, maintenance, remote support, patches, upgrades, troubleshooting, and years of production use.A fab needs more than a document saying that network security was considered. It needs practical evidence showing which ports are open, which services are active, which accounts exist, which software is running, and whether local protection mechanisms are still enabled. A fab does not only need supplier declarations. It needs operational proof.This is where the semiconductor industry faces a specific challenge. A fab cannot simply copy standard IT cybersecurity practices and apply them directly to production tools. The cost of disruption is too high. A patch that is harmless in an office system may affect equipment behavior, timing, qualification, or process stability. A security scan that is acceptable in IT may be intrusive in a production environment. Generic endpoint controls can create unacceptable side effects if they interfere with motion, recipes, automation, or equipment availability.Therefore, semiconductor cybersecurity must balance three constraints simultaneously:Protect the equipment and the factory network.Preserve deterministic production behavior.Generate evidence that can be trusted by fabs, suppliers, auditors, and increasingly, regulators.For this reason, the future of cybersecurity in semiconductor manufacturing will likely be built around five practical pillars.1. Secure by design, but validated in operationSecurity measures must be implemented from the outset of equipment architecture. The product baseline should include supported operating systems, hardened configurations, secure communication channels, access control, logging, and vulnerability handling. Figure 1: Equipment controllers expose trusted security context However, design is only the starting point. The equipment must also support validation after delivery. Fabs need a way to confirm that the deployed configuration still matches the secure baseline. This is especially important after field service, software updates, recipe changes, local troubleshooting, or remote maintenance. The industry is shifting from "trust me, it was secure at release" to "here is the evidence that it is still secure today."2. Cybersecurity evidence must become structured dataAll too often, cybersecurity evidence remains trapped in PDFs, spreadsheets, emails, and manual audit reports. This approach is not scalable. A modern factory needs structured, machine-readable cybersecurity information. This data does not need to be collected at the same frequency as process data, it should rather be collected at the right frequency for assurance, such as daily, weekly, after a restart or maintenance, or before a production release.This creates a strong opportunity for equipment manufacturers. The equipment controller can serve as a source of trusted security context. It can provide controlled, well-defined information about the current state of the equipment's software and configuration. This does not replace cybersecurity tools. Rather, it complements them with equipment-native context.This is important because the equipment itself knows things that external tools may not: which services are expected, which processes are part of the controller, which ports are required for automation, which accounts are intended for servicing, and which configuration belongs to the validated release.3. Communication security must move closer to the protocol layerMany industrial environments have relied on network segmentation, virtual private networks (VPNs), and perimeter controls. While these controls remain useful, they are insufficient for a Zero Trust approach.The next step is establishing stronger identities and trust between communicating systems. When equipment and factory systems exchange messages, they must know with whom they are communicating, and the communication channel must protect the confidentiality and integrity of the messages.This direction already exists in part of the semiconductor communication landscape. In EDA, also known as Interface A, SEMI E132 defines equipment client authentication and authorization, requiring clients to authenticate before further communication and enabling authorization controls for access to equipment functions and data.The same trust expectation is now emerging more visibly for SECS/GEM communication. A SEMI task force is working to secure HSMS communication, which is central to SECS/GEM-based host-equipment integration. The objective is to improve trust at the communication layer while preserving the proven behavior and interoperability that made HSMS successful in fabs.For semiconductor manufacturing, this must be done carefully. The industry cannot disrupt decades of host-equipment interoperability. The practical approach is to secure communication while maintaining existing automation behavior. This is a good example of the semiconductor cybersecurity challenge: modernizing the trust model without destabilizing the production model.4. Cybersecurity must be lifecycle-managedA semiconductor tool can remain in operation for many years. During that time, operating systems age, third-party components evolve, vulnerabilities are discovered, remote support practices change, and fab expectations become stricter. This means cybersecurity cannot be treated as a delivery milestone. It must be managed as a lifecycle capability, from design and release to installation, maintenance, upgrades, and end-of-support planning.For semiconductor OEMs, this creates a very practical challenge. They need clearer answers to questions that fabs will increasingly ask:Practical questionWhy it mattersWhat is the support status of each software component?To understand exposure to known vulnerabilities and end-of-support riskHow are vulnerabilities evaluated?To separate theoretical exposure from real equipment riskHow are patches qualified without creating regression risk?To protect cybersecurity without compromising process stability or tool availabilityHow is the customer informed?To support faster risk decisions and stronger supplier trustWhat is the fallback if a patch cannot be deployed?To define compensating measures and avoid unmanaged riskHow is the secure baseline restored after maintenance?To prevent configuration drift after service actionsHow is evidence retained?To support audits, incident response, and lifecycle traceability The answer is not simply more documentation. The answer is better evidence: structured, repeatable, and linked to the real equipment state. For semiconductor OEMs, the practical task is to convert cybersecurity requirements into evidence that fabs can verify during integration, operation, maintenance, and upgrades.Evidence categoryWhat the fab needs to knowWhy it mattersOS and software baselineSupported OS, installed components, patch statusReduces exposure to known vulnerabilitiesNetwork exposureOpen ports, active services, remote connectionsHelps detect unexpected attack surfacesAccess controlLocal accounts, roles, privilege modelLimits persistence and unauthorized accessEndpoint protectionFirewall, anti-malware, hardening statusConfirms local defenses remain activeLogs and monitoringSecurity events, configuration changes, authentication eventsSupports investigation and traceabilityMaintenance historyUpdates, remote sessions, service actionsShows what changed and whenVulnerability handlingKnown vulnerabilities, mitigation status, patch planSupports lifecycle accountability This lifecycle view is important because every change can modify the equipment security posture. A patch, a remote support session, a local service action, a new account, an opened port, or a firmware update can all move the tool away from its validated baseline. Figure 2: Cybersecurity becomes a lifecycle process This is also where upcoming regulations will change the supplier conversation. Vulnerability handling, reporting, and product security documentation will become part of business trust, not only technical trust. For semiconductor OEMs, the direction is clear: cybersecurity evidence must become part of the product lifecycle, not a separate compliance package prepared only when the customer asks for it.5. Compliance must be risk-based, not tool-prescriptiveOne of the important lessons from industrial cybersecurity is that standards and customer requirements are most effective when they specify the necessary capabilities and evidence rather than forcing every supplier to use the same tools or implementation methods. In the semiconductor industry, the SEMI Standardized Semiconductor Cyber Assessment (SSCA) is a useful example of this direction. It provides a semiconductor-specific assessment framework designed to evaluate cyber readiness and risk across the supply chain, from device manufacturers to OEMs and beyond. It also uses maturity-based questions to help assess the security posture of an organization, which supports a more risk-based view of cybersecurity capability rather than a simple pass/fail interpretation.This risk-based and maturity-based approach is also important at the equipment level. Semiconductor tools are not uniform products with identical architectures. A metrology tool, a sorter, an inspection system, an etcher, and an AMHS component may have different risk profiles, software stacks, connectivity models, and operational constraints. Even within one piece of equipment, cybersecurity responsibility is distributed across multiple layers: the main equipment controller, load ports, robots, sensors, embedded PCs, software libraries, remote access components, and third-party subsystems. The right question is not: "Did every OEM use the same scanner, report format, or internal process?" A better question is, "Can each OEM demonstrate that the equipment meets the required cybersecurity outcome, that the evidence is repeatable, and that the lifecycle process is controlled?"This question must also be addressed recursively across the supplier chain. A fab will ask the OEM for evidence. The OEM, in turn, must obtain and manage evidence from its subsystem suppliers. Those suppliers may need evidence from their own module, software, firmware, and component suppliers. In practice, cybersecurity assurance becomes a chain of trust that runs from the fab down to the lowest relevant technical layer. Figure 3: Cybersecurity assurance becomes a chain of trust The strategic direction is clear for semiconductor OEMs. Cybersecurity should be part of the equipment's value proposition. A secure equipment controller will execute more than just automation logic. It will also support secure communication, controlled access, structured logs, lifecycle traceability, vulnerability management, configuration evidence, and visibility into the security state.This is not just about reducing cyber risk. It is also about reducing integration friction with advanced fabs. It is about conducting audits more quickly. It is about limiting late-stage surprises. It is about giving customers confidence that they can operate, maintain, and upgrade the equipment without compromising factory security.The semiconductor industry is entering a phase in which cybersecurity will be judged less by static declarations and more by operational proof. That is a healthier model. Static compliance tells a fab what was once true. Operational proof shows what is true now. For semiconductor manufacturing, this distinction will become more crucial.About Dr. Fahad GolraAs Director of Product Innovation for Agileo Automation, Dr. Fahad Golra drives next-generation solutions in connectivity, data modeling, and communication architectures. Since joining the company in 2019, he has been a key force behind Agileo’s push toward Industry 4.0, championing interoperability, digital twins, and edge-to-cloud systems. With 15 years of experience spanning academia, research, and industry, Fahad brings deep technical insight and thought leadership to the semiconductor industry. An active contributor to SEMI, the Semiconductor Manufacturing Cybersecurity Consortium (SMCC) and the OPC Foundation, he is a frequent speaker at industry events and a published author advancing the dialogue around smart manufacturing and automation.

The SEMI Standards team hit the ground running in 2026, starting this year with an important milestone to our Flexible Hybrid Electronics (FHE) standardization efforts. As FHE technology continues to evolve into a scalable and manufacturable class of systems, we’re excited to share the upcoming release of SEMI 7242, Guide for Reliability of Flexible Hybrid Electronics. This is the first time a comprehensive framework for reliability assurance in FHE systems has been created, closing a critical gap within the industry landscape. Published as SEMI FH5, the standard is now available online via the SEMI Store or through a SEMIViews license.We’d also like to highlight a pending revision for SEMI E142, Specification for Substrate Mapping. While SEMI E142 is currently designed to work with other SEMI data exchange Standards, SEMI Draft Document 7381 proposes a subordinate standard to define maps to and from non-E142 wafer coordinate systems. Meanwhile, the Information Control Japan Technical Committee (TC) announced its new Maintenance Robot Communication (MRC) Task Force for standardizing communications for robotic maintenance systems to improve production efficiency and workloads in fabs. This quarter also included key developments from both SEMICON Korea and SEMICON China. At SEMICON Korea, members of the Semiconductor Manufacturing Cybersecurity Consortium (SMCC) discussed a unified, standards-based approach for strengthening cybersecurity amidst evolving digital threats. A month later, SEMICON China served as the backdrop for the EHS TC Chapter Formation Group Meeting, where attendees discussed critical safety, material usage, and energy efficiency standards. The North America (NA) Winter Meetings, held virtually in February 2026, also brought several TCs together to revise standards for MEMS, advanced packaging, EH S, Facilities, Gases Liquid Chemicals, factory automation, and more. For more than 50 years, the SEMI Standards International Program has worked to advance manufacturing processes, lower costs, and support key industry growth markets. To get involved in future developments, become a member of the SEMI Standards Program. Membership is free.With so much underway in Q1, we look forward to an incredible year ahead. Q1 2026 Highlights A New Standard for Flexible Hybrid Electronics As the first consensus-driven framework for reliability assurance in FHE systems, SEMI 7242, Guide for Reliability of Flexible Hybrid Electronics, was created to ease roadblocks for transitioning and commercializing FHEs. It aims to speed design cycles, improve comparability of test results, reduce the risk of integrating FHE into operations, and instill confidence for scaling FHEs from prototypes to high-volume production. Document 7242 was drafted by the FHE Reliability and Testing Task Force, with added participation from industry, academia, and government laboratories.The elevation of Document 7242 to a formal SEMI Standard reflects the field’s progression to a stage where consistent approaches to reliability are both feasible and necessary. As FHE adoption grows across medical, industrial, consumer, and defense applications, Document 7242 will support systems that offer dependable performance and sustained durability over time. Document 7242 also joins the recently published SEMI FH6 Standard on FHE Terminology.Revisions to SEMI E142SEMI E142, Specification for Substrate Mapping, defines data items required for reporting, storing, and transmitting map data for substrates. It was developed to work alongside other SEMI Standards to exchange data through a SECS/GEM interface. Identifying failure points requires a two-dimensional XY coordinate map generated for substrates. However, because some steps in the semiconductor manufacturing process may use their own XY coordinate systems, a revision is currently needed to define an infrastructure for mapping a non-E142 wafer XY coordinate system to and from the E142 Standard XY coordinate system.The Advanced Backend Factory Integration (ABFI) Task Force will ballot this potential subordinate standard from August 19 to September 18. It will be adjudicated during SEMICON West from October 13-15, 2026 in San Francisco, California.Introducing the Maintenance Robot Communication Task Force As the industry moves toward smart manufacturing, integrating robot-based maintenance solutions is becoming increasingly important for enhancing production efficiency, reducing workload, and ensuring consistent work quality in automated environments. The Maintenance Robot Communication TF was formed to address the critical need to standardize operational communications for robotic maintenance systems. A dedicated community page is now available on the Connect@SEMI platform for members to exchange ideas. This activity joins the recently established Mobile Maintenance Robot Safety Task Force which aims to develop new safety guidelines that are deemed necessary to fill the gaps between existing industry standards including SEMI Safety Guidelines with regard to safe operation of mobile maintenance robots.Standards Activities from Europe Spring MeetingThe Compound Semiconductor Materials Europe TC Chapter held its annual virtual Spring Meeting on April 14, 2026. The meeting drew robust participation from China, Japan, Europe, North America, and other regions. The TC Chapter successfully adjudicated document 7111, Revision of SEMI M81-0418, Guide for Defects Found in Monocrystalline Silicon Carbide Substrates. The major update provides significant guidance on defects in silicon carbide substrates. This document has been forwarded to SEMI Publications for final processing. The Europe TC Chapter will reconvene November 10–13, 2026, during SEMICON Europa in Munich, Germany.Underscoring the Need for Cybersecurity Standards at SEMICON Korea SEMICON Korea featured more than 200 speakers who shared insights and presented solutions that are shaping the modern AI era. From February 11-13 in Seoul, the conference also served as a meeting point for the next generation of SEMI Standards. Most notably, leaders from the Semiconductor Manufacturing Cybersecurity Consortium (SMCC) highlighted the strategies and operational frameworks needed to modernize cybersecurity protocols. SEMICON Korea Highlights:Applied Materials’ Suk Won Kang discussed SMCC Working Group (WG) 9 – a new group for addressing cybersecurity challenges unique to South Korea’s semiconductor ecosystem. WG9 was formed to better understand Korean cybersecurity risks, align with global standards, and operationalize compliance with existing SEMI frameworks. Alan Weber from PDF Solutions presented on cybersecurity as it relates to industry standards. He offered an overview of today’s technical challenges, highlighting how independently developed and secure data exchange frameworks can complement existing standard interface capabilities. SEMICON China: EHS TC Chapter Formation Group Meeting Following SEMICON Korea, SEMICON China convened thousands of attendees from March 25-27 to discuss the most important technology trends driving innovation. Alongside the event, the EHS TC Chapter Formation Group Meeting took place on March 25 to review global EH S standards overview, SEMI Regulations for forming China TC Chapter, and issues including Safety Management System, Product Safety System, and Semiconductor RobotsProgress from SEMI Standards 2026 North America Winter Meetings The Standards team hosted its SEMI Standards NA Winter Meetings virtually from February 9-12. With a packed agenda, the meetings convened several TCs, including MEMS/NEMS, Facilities Gases, Liquid Chemicals, Information Controls, and more. Over a dozen new documents were submitted for approval.The NA 3D Packaging Integration Inspection Metrology TF proposed a new standard in Document 7331, Guide for Peel Testing of RDLs and Other Traces Used Within Advanced Packages and Structures. This document was approved by the 3DP I NA TC Chapter during the NA Winter Meetings in February and recently passed procedural review by the ISC Audit Review Subcommittee. Current peel testing test methods are designed for and limited to 10 mm and wider traces, which are mainly used for PCBs.iNEMI has been investigating potential re-distribution layers (RDLs) adhesion measurement methods for RDL trace widths 20 microns and smaller to determine the actual adhesion properties associated with these smaller structures. The adhesion properties of the smaller structures are important for HDI, WLP and PLP designs, and modeling. This standard provides guidance for peel testing of small trace structures used in WLPs, PLPs, and other advanced packages based on knowledge gained during the iNEMI RDL Adhesion project. Available soon at the SEMI store, this Standard can be used to determine the adhesion properties of the structure (trace bond to substrate).Other key developments from the NA Winter Meetings include:Document 7370 – Reapproval of SEMI MS13-0221, Guide for Use of Test Patterns for Characterizing a Deep Reactive Ion Etching (DRIE) Process, introduced by the MEMS/NEMS TC. Document 7436 - Reapproval of SEMI E180-1220, Test Method for Measuring Surface Metal Contamination Through ICP-MS of Critical Chamber Components Used in Semiconductor Wafer Processing, introduced by the Metrics TC. Document 7428 - Revision to add a new subordinate Standard, Specification for Secure High-Speed SECS Message Service, to SEMI E37-0222 Specification for High-Speed SECS Message Services (HSMS) Generic Services. This was introduced by the Information Control TC. Document 7371A – Revision of SEMI S1-0824, Safety Guideline for Equipment Safety Labels. The revision was intended to add numerous safety symbols including finger pinch, entrapment, shear hazard, inhalation hazard and many others.Document R67346C - Revision to SEMI E95-1101, Specification for Human Interface for Semiconductor Manufacturing Equipment. This was introduced by the Information Control TC.New and Revised Standards Released in Q1January 2026February 2026 March 2026 Get InvolvedSEMI Standards development activities take place throughout the year in all major manufacturing regions. To participate, join the SEMI International Standards Program.SEMI Standards are available through individual download purchases or online via SEMIViews. Watch this video to learn more about how SEMIViews offers a cost-effective and streamlined way to access 1,110+ SEMI Standards. Sign up for a 30-day SEMIViews trial.For more information, please visit the Standards website and events page. For any questions regarding SEMI Standards activities, please contact your local SEMI Standards staff.Paul Trio is Director of Standards at SEMI.

2025 was a fast-paced, exciting, and impactful year for the SEMI Standards team. We developed 14 new standards on crucial topics like supply chain traceability, defect mitigation, compound semiconductor materials, and so many more. In addition, we introduced the SEMI Global Standards Summit (GSS) in North America, where we created new standardization roadmaps and continued pertinent sustainability conversations from the inaugural GSS at SEMICON Japan 2024. We’re also excited to announce that we closed out 2025 with an impactful Q4. From December 17-19, we held our SEMI International Standards Meetings during SEMICON Japan. More than 15 Task Force meetings and 5 Technical Committee meetings were held, followed by an award ceremony. The brand-new Digital Twins in Manufacturing Task Force was also established to define and standardize a digital twin framework that supports consistent and scalable implementations. We published the new SEMI T27 standard in Q4, and we celebrated several outstanding volunteers for their contributions to the SEMI Standards Program at both SEMICON West and SEMICON Europa. As we reflect on Q4, it’s apparent how important collaboration is to the success of SEMI Standards. By working together, we lay the foundation for groundbreaking innovations in microelectronics manufacturing. The SEMI Standards team would like to extend a warm and sincere thank you to everyone who donated their time and expertise to define the future of our industry. These efforts would not be possible without your commitment and support.Still, it’s never too late to join the SEMI Standards Program. Learn more about membership and how you can help influence the next phase of semiconductor manufacturing. Q4 2025 HighlightsTakeaways from the International Standards Meeting at SEMICON JapanIn Q4, the SEMI Standards team held its International Standards Meeting at SEMICON Japan, where several task forces convened to set standards for compound semiconductor materials, information and control, traceability, and more. From December 17-19 at Tokyo Big Sight, the SEMI Standards team supported these technical committees in advancing several key standards revisions, including SEMI E181, Specification for Panel FOUP for Panel Level Packaging, and SEMI E182, Specification for Panel FOUP Loadport for Panel Level Packaging. In addition, a new Maintenance Robot Communication (MRC) Task Force was established with the objective of defining communication protocols and data exchange specifications between maintenance robots and equipment.The next SEMI International Standards Meeting will take place from May 11-14 in Albany, New York, during the SEMI Advanced Semiconductor Manufacturing Conference (ASMC). Digital Twins in Manufacturing Task Force Although the terms “digital twins” and “digital twin frameworks” are becoming more prevalent in the semiconductor industry, there’s still much debate on what they cover. To develop concrete, standardized definitions for each, the SEMI Standards team established the Digital Twins in Manufacturing Task Force in Q4. After the task force defines these crucial terms, it will then create definitions for internal digital twin components outlining baseline capabilities, discovery mechanisms, prediction quality metrics, unified model interfaces, and lifecycle management. Eventually, the task force will outline a framework for Digital Twins compatible with existing guidelines like SEMI Standard E133 or ISO 23247. The SEMI Digital Twins in Manufacturing Task Force is open to industry stakeholders. To participate, join the SEMI International Standards Program or learn more. Standards Awards at SEMICON West and SEMICON Europa SEMICON West honoreesQ4 was also a time to celebrate some of the talented individuals who make a difference in the SEMI Standards Program. At SEMICON West and SEMICON Europa, we honored 25 accomplished industry leaders across the following five award categories for their commitment and participation. Merit Award winners led projects to successful completion at the task force level. SEMICON Europa honorees: Judith Wittmann, Cristina Sanna, Peter Wagner, Friedrich Passek, Frank Riedel SEMICON West honorees: Dave Dunne of Applied Materials, Kirsten Smith of UCT/ChemTrace, Tommaso Orzali of ASML, Dr. Tyler Harrison of Teledyne MEMS, and Dr. Mary Ann Maher of SoftMEMSSEMICON Europa honorees: Christian Kranert of Fraunhofer IISB, Enrica Cela of Soitec, Hans-Christian Alt of the Munich University of Applied Sciences, and Ulrich Kretzer of Freiberger Compound Materials GmbHLeadership Award winners bolstered the SEMI Standards program through member recruitment, mentoring, and training efforts. SEMICON West honorees: Michael Potts of Arcadis, David Kandiyeli of KINETICS Equipment Solutions Group, and Per Nelson of Daikin AmericaSEMICON Europa honorees: Frank Riedel and Judith Wittmann of Siltronic, Cristina Sanna of GlobalWafers, and Jochen Ruth of Pall CorporationHonor Award winners have demonstrated long-term dedication to advancing SEMI Standards.SEMICON West honorees: Steve Martell of Nordson Test Inspection Americas, Lucian Girlea of Nikon Precision, and Dave Huntley of PDF SolutionsSEMICON Europa honorees: Peter Wagner of SEMI Standards, Fritz Passek of Siltronic, Arnd Weber of SiCrystal GmbH, and Frank Petzold of trustsec IT solutions GmbHCorporate Device Member Award winners are participants from the user community who act as corporate representatives for the SEMI Standards Program from the device manufacturer side. Stefan Radloff of Intel was honored with this award at SEMICON West. Technical Editor Appreciation Award winners are adept at translating complex technical information into clear and precise language. Dr. Alissa M. Fitzgerald of A.M. Fitzgerald Associates became the award recipient in 2025. Workshops at SEMICON WestOn October 8, the SEMI Voltage Sag Immunity Task Force hosted its Enhancing Voltage Sag Immunity workshop to address fab downtime caused by voltage sags. The workshop convened more than 20 industry professionals to review the limitations of SEMI Standard F47. They found that while 20% of downtime instances can be attributed to three-phase events, SEMI Standard F47 does not require testing for such occurrences. As a result, the Voltage Sag Immunity Task Force is developing a draft revision of SEMI Standard F47, scheduled for balloting in March 2026. If you missed this workshop, you can access the recording and presentation here. October 8 also saw the exciting return of the Analytical Workshop, hosted by the SEMI Liquid Chemicals Committee after a multi-year hiatus. This year’s workshop addressed near-term challenges and advancements identified by the International Roadmap for Devices and Systems (IRDS). It covered chemical quality and consistency, trace metallic impurities and improvements in ICPMS instrumentation, automated instrumentation for online measurements, detection for particle precursors and sub-10nm particles in liquids and on-wafer, and organic particle precursors identification using FTIR-ATR, SERS and AFM-IR. If you missed this workshop, you can access the recording and presentation here. The 2026 call for abstracts will be announced soon. Lastly, the SEMI Standards and SEMI University teams worked together to host Semiconductor Device Manufacturing in a Cleanroom, a workshop meant to introduce best practices for overcoming contamination problems in the cleanroom. By reviewing different sources of contamination, reviewing analytical techniques for quality control, and performing cleanliness testing, the course aims to help cleanroom facilities improve production reliability and yield.New and Revised Standards Released in Q4October 2025November 2025December 2025Get InvolvedSEMI Standards development activities take place throughout the year in all major manufacturing regions. To participate, join the SEMI International Standards Program.SEMI Standards are available through individual download purchases or online via SEMIViews. Watch this video to learn more about how SEMIViews offers a cost-effective and streamlined way to access 1,110+ SEMI Standards. Sign up for a 30-day SEMIViews trial.For more information, please visit the Standards website and events page. For any questions regarding SEMI Standards activities, please contact your local SEMI Standards staff.Paul Trio is Director of Standards at SEMI.

Q3 2025 was packed with activity. From finalizing the Standards program for SEMICON West, to organizing the event’s corresponding Global Standards Summit (GSS), the Standards team is excited to share its most recent quarterly developments.On Tuesday, October 7, leaders from across the industry convened in Phoenix, Arizona, for the second annual GSS. This half-day summit focused on future standardization needs for supply chain traceability and environmental sustainability. In addition, the Standards team conducted two workshops at SEMICON West. The first, SEMI Liquid Chemicals Analytical Workshop, detailed recent advances in analytical methodology and instrumentation related to particle measurement, trace metals, and organics in liquid chemicals. The second, Enhancing Voltage Sag Immunity: SEMI F47 Standards Updates Insights Workshop, offered a forum for sharing improvements to SEMI Standard F47 to further enhance tool performance and reliability. Finally, Q3 saw the official introduction of SEMI Standards T26 and E195. SEMI T26-0925, Specification for Electronic Supply Chain Traceability Using Distributed Ledger Technology, will be crucial for improving security and transparency for the industry’s supply chain. Additionally, SEMI E195-0925 is now available for purchase. This standard, Test Method Using Adhesive Replacement Substrates to Assess Particulate Surface Contamination on Critical Chamber Components, offers a testing approach for measuring the ISO 14644-9 cleanliness of a critical chamber component.To participate in upcoming standard developments, learn more about becoming a member of the SEMI International Standards Program. Global Standards Summit The SEMI GSS made its North American debut at this year’s SEMICON West in Phoenix. Building on its inaugural event at SEMICON Japan 2024, GSS is a strategic forum dedicated to creating an industry-wide standardization roadmap for the next three and seven-year benchmarks. The 2025 GSS continued conversations from SEMICON Japan on environmental sustainability, while expanding its program to include supply chain traceability. As geopolitical tensions, mounting cybersecurity threats, and rising technological demands continue testing the limits of the industry’s supply chain, the need for global standardization is becoming increasingly apparent. The 2025 GSS program addressed these concerns and others across multiple sessions, offering insight on how these challenges are being addressed in the industry while highlighting critical areas still in need for standards development. Key outcomes from the GSS program include: Addressing data sharing across multiple supply chain tiers while protecting IP rights and a call for harmonization across standards. The presentation by Randy Hall from the Provenance Chain Network, offered approaches on how data owners can share information with authorized users without compromising sensitive manufacturing details. While there are standards gaps that hinder broader adoption, there is opportunity to address insufficient visibility across the industry’s supply chain amid ongoing cybersecurity threats by harmonizing across existing standards implementations. An integrated modeling framework for informing energy efficiency and carbon reduction approaches. Developed by the International Roadmap for Devices and Systems (IRDS) Environmental Sustainability for Semiconductor Facilities (ESSF) team, this effort helps address demands for maintaining rapid technological progress while still meeting the industry’s ambitious sustainability goals.Standardization opportunities for improving sustainability within manufacturing facilities. Nate Monosoff from Jacobs offered insight into the decision-making tradeoffs that balance sustainability with other facility performance areas, focusing on standard methods for calculating ESG performance. GSS concluded with a panel discussion that featured leaders from AMD, FTD Solutions, Intel, The Provenance Chain Network, Jacobs, Qualcomm, and Tokyo Electron. In this session, our thought leaders discussed the fundamental importance of standardization for our industry, standards adoption, incentivizing stakeholders, and how standards can be designed to remain flexible and adaptive as technologies and regulatory landscapes evolve. SEMI Standard T26In line with the 2025 GSS theme of supply chain traceability, the Standards team is pleased to introduce SEMI T26, Specification for Electronic Supply Chain Traceability Using Distributed Ledger Technology. This standard was published in September to define a secure and decentralized traceability system that all members of the electronics supply chain can safely share. This system is based on distributed ledger technology to improve industry-wide reliability assurance.Update on Document 7130CIn February, Document 7130C was approved during the North America Metrics Technical Committee Chapter Meeting. The document officially became SEMI E195 - Test Method Using Adhesive Replacement Substrates to Assess Particulate Surface Contamination of Critical Chamber Components in September.SEMI E195 describes a quantitative method for measuring the ISO 14644-9 surface cleanliness for particle concentration of a critical chamber component (CCC), by means of an adhesive replacement substrate. The purpose of this standard is to ensure measuring and reporting consistency across CCCs or processing equipment manufacturers. To help acquaint the industry with this standard, SEMI offered a combined, in-person course on SEMI E194 and SEMI E195 during SEMICON West. The course provided fundamental information on each standard, in addition to other process approaches for improving reliability and yield.Other SEMI Updates:SEMI Preventive Maintenance Automation White Paper SEMI Korea conducted a Global PM Automation Survey in August to better understand today’s preventive maintenance readiness issues for autonomous fabs. The results will be included in SEMI’s upcoming PM Automation Whitepaper and will ultimately guide future developments for related SEMI Standards. Standardized Semiconductor Cyber Assessment FrameworkIn Q3, the Semiconductor Manufacturing Cybersecurity Consortium (SMCC) released its Standardized Semiconductor Cyber Assessment (SSCA) framework. This document provides a detailed cybersecurity readiness plan for semiconductor companies across the supply chain. Its goals are to standardize industry-wide cybersecurity risk evaluations, establish and accelerate the adoption of best practices, and improve information sharing and collaboration. Download the SSCA framework for free.New Data Standard for Equipment Edge Governance In June, Document 6938C was approved during the Taiwan Information Control Technical Committee Chapter Meeting. The document officially became SEMI E196 - Guide for Equipment Edge Data Governance. SEMI E196 provides guidance for identifying equipment data supplied by manufacturers that can be used in equipment engineering or analysis applications.New Guide to Meet IRDS Yield Table RecommendationsAt the NA Summer Meetings, Document 6601B passed TC Chapter review with technical changes and a Ratification Ballot was issued in Cycle 7-2025. Pending final Procedural Review, Guide for Meeting IRDS Yield Table Recommendations for High Purity Polymer Materials and Components Used in Ultrapure Water, will cover areas that establish criteria for allowable contribution by critical components used for UPW treatment plant and distribution system. This document will be proactively updated to manage the risks associated with the high purity polymer materials used in the semiconductor process. The biggest challenges today are metals and particles and certain organics.Flex Standards Meeting at FLEX 2026Meet the leaders of the SEMI Standards Flexible Hybrid Electronics (FHE) Task Forces at Flex 2026, in Arizona, February 24-26, and learn about ongoing FHE standardization efforts!Standards Introduced in Q3 2025New and revised standards released in Q3. July 2025 StandardsAugust 2025 StandardsSeptember 2025 Standards Get InvolvedSEMI Standards development activities take place throughout the year in all major manufacturing regions. To participate, join the SEMI International Standards Program.SEMI Standards are available through individual download purchases or online via SEMIViews. Sign up for a 30-day SEMIViews trial.For more information, please visit the Standards website and events page. For any questions regarding SEMI Standards activities, please contact your local SEMI Standards staff. Paul Trio is Director of Standards at SEMI.

As the volume of regulations grows across all levels of government, both in the U.S. and abroad, the semiconductor industry is increasingly struggling to keep up with its reporting obligations. Potential consequences include shipments delayed by customs, existing stocks of materials, parts, and components unexpectedly being made obsolete, and disruptions to multiple tiers of the supply chain that persist over time.To minimize the burden of numerous, varied reporting expectations, the SEMI PFAS Transparency Working Group, led by Intel and Tokyo Electron, is working to:Enable standardized communication on the presence of Per- and polyfluoroalkyl substances (PFAS) in chemical formulations, materials, tools, parts, and fab infrastructure to minimize the burden of varied reporting expectations;Enable traceability; andProtect confidential business information. While the initial focus of the effort is on PFAS, the intent of the group is for the methodology to be applicable to other substance reporting requirements.The group will be holding a working session at SEMICON West in Phoenix, Arizona on Wednesday, October 8 from 10:30 a.m.-12:00 noon at the North Building, 200 Level, Room 229A of the Phoenix Convention Center. All segments of the semiconductor manufacturing supply chain are invited to join the meeting and contribute to this critical effort. This session is intended for individuals involved in: Data management and reportingSupply chain managementMajor business continuity planning and crisis managementRisk assessment and mitigationEHS/regulatory complianceSub-supply chain visibility challengesThe PFAS transparency effort will also be introduced during the SEMI EHS Summit and SEMI Global Standards Summit, both scheduled on Tuesday, October 7.For additional resources, download the PFAS Explainer or SEMI PFAS Position Paper. Contact [email protected] for questions or more information about the working group session.James Amano is Senior Director of EHS at SEMI.

In Q2, the SEMI International Standards Program made progress on several emerging initiatives. Together, we reached a critical milestone for one of our data standards initiatives with Document 6938C recently passing Technical Committee review in mid-June 2025. Ballot 6938C, which provides guidance on how to identify manufacturing equipment data provided by the equipment supplier that can be used in equipment engineering or analysis applications, is slated to join SEMI E190 and E190.1 in providing industry-enabling data standardization.In addition, we began major revisions to SEMI Standards S2, S8, and S10. These standards govern environmental, health, and safety (EHS) considerations, equipment user fatigue and injury reduction, and equipment risk assessment and evaluation, respectively. In our recently concluded North America Standards Summer 2025 Meetings, the NA EHS Technical Committee Chapter approved a revision ballot to SEMI S10. The ballot (7169) proposed several major revisions to the SEMI S10 Safety Guideline on risk assessment which included changes to references to equipment to objects under consideration. Other changes also included the relocation of the assessment of the risk of harm to property other than the OUC to a Related Information section. Additional details are provided below.We’re eagerly preparing for this year’s SEMICON West event, taking place for the first time ever in Phoenix, Arizona. We are also pleased to announce the return of the SEMI Global Standards Summit taking place Tuesday afternoon, October 7 at SEMICON West. Our inaugural Summit was held last year at SEMICON Japan 2024 last December. The Summit aims to identify standards-critical areas and work towards an industry standardization strategy for the next 3- and 7-year time horizons. This year's Global Standards Summit will feature sessions on Supply Chain Traceability as well as Environmental Sustainability. Similarly, as cybersecurity considerations become more complex, SEMICON West will host a dedicated Cybersecurity Forum from October 7-9 to address today’s most pertinent challenges. More detailed program information will be available soon. Finally, we’re looking forward to our SEMI Standards + Award Ceremony Networking Event at SEMICON West. Following the International Standards Meeting and Standards Summit on Tuesday, October 7, join us for appetizers, drinks, and great conversation from 6-7:30 p.m. In the meantime, learn more about becoming a member of the SEMI International Standards Program.Balloting for Document 6938Document 6938C introduces a new potential standard – Guide for Equipment Edge Data Governance. Under development by the Equipment Edge Data Governance (EEDG) Task Force since 2021, Document 6938C was balloted in Cycle 3-2025 and approved during the Information Control Taiwan Technical Committee (TC) Chapter meeting held on June 12, 2025. It has since received approval by the International Standards Committee Audits and Reviews Subcommittee and is now undergoing final processing for publication by SEMI. As manufacturing equipment offers more accessible data than ever, poor communication, inconsistent expectations, and data security concerns continue to halt or slow factory integration efforts. If passed, this new standard will help organize the information that supports smart manufacturing efforts at the edge. In addition, the EEDG Guide will provide a comprehensive set of best practices to both users and suppliers to increase the value of existing equipment data. Update on Revisions to SEMI S2, S8, and S10 Safety GuidelinesOur 2025 Q1 Standards Watch newsletter announced a significant overhaul for SEMI Standards S2, S8, and S10.S2, SEMI’s standard for performance-based environmental, health, and safety (EHS) considerations for semiconductor manufacturing equipment, is undergoing discussions on redefining safety interlock systems. The S2 task force will issue an informal ballot to the general audience for feedback. The results then will be used to develop a formal letter ballot.First developed in 1995, SEMI Standard S8 works to reduce fatigue and injury by matching equipment to the user’s size, strength, and range of motion. Although this safety standard has been periodically updated since its inception, its last substantial revision was in 2018. The ballot to revise S8 ultimately failed the EH S TC Chapter review at this year’s Winter Meeting. With 214 comments and negatives to consider, the task force is revising the ballot and plans to reissue in Cycle 7 of August 2025.Finally, SEMI Standard S10 is moving through ballot 7169. This standard defines a consistent means of risk estimation that other SEMI Safety Guidelines can invoke. Ballot 7169 will separate facility and building risk assessment to a non-normative portion of the document, ensure EHS risks are separately calculated from commercial object risks, and clarify risk assessment of observed events from risk assessment of foreseen events. Ballot 7169 results were reviewed on June 5 during the North America Standards Summer meetings. The document was approved and is being processed for publication by SEMI.Cybersecurity Forum at SEMICON West 2025This year’s SEMICON West will feature a dedicated Cybersecurity Forum to address the semiconductor industry’s rapidly-changing cybersecurity landscape. The SEMI Cybersecurity Forum will gather industry experts to share knowledge and experience on the following topics. The goal is to develop actionable strategies and a deeper understanding of current and future cybersecurity risks. Cybersecurity in Legacy Semiconductor ToolsEmerging and Existing Cybersecurity Legislation and ComplianceCybersecurity in Maintenance and ManufacturingImpact of Cybersecurity Events on Semiconductor Manufacturing OperationsSupply Chain SecurityThreat Landscape in Semiconductor ManufacturingThe 2025 call for abstracts is now closed. Speakers will be announced in Q3.SEMI E187 Compliance Guidance White PaperThe SEMI Semiconductor Manufacturing Cybersecurity Consortium (SMCC), in collaboration with industry experts, is pleased to announce the release of the SEMI E187 Compliance Guidance Whitepaper. This comprehensive resource is designed to support semiconductor equipment suppliers and device manufacturers as they work to meet the requirements of the SEMI E187 0122 Standard - The Specification of Cybersecurity of Fab Equipment.Professionals involved in tool development, manufacturing, operations, and security will find the guidance particularly relevant and actionable. It provides guidance to address all twelve SEMI E187 requirements and focuses on new to fab equipment.Download the Whitepaper for freeSEMI Standards North America Summer MeetingsThis year’s SEMI Standards North America Summer Meetings were held from June 2-5 at SEMI’s headquarters in Milpitas, California. The meetings convened 11 committees and 40 task forces to discuss topics ranging from EHS to facilities, 3D packaging, MEMS, and more. In addition to the results of ballot 7169, technical changes to ballot 6601B, New Standard: Guide for Meeting IRDS Yield Table Recommendations for High Purity Polymer Materials and Components Used in Ultrapure Water, was also approved by the Liquid Chemicals North America TC Chapter, since the activity began in 2019. A Ratification Ballot will be issued in Cycle 7-2025 to verify the changes. In total, over 15 activities, ranging from Auxiliary Information, Reapprovals, and Line-Item ballots, also recently passed Procedural Review by the International Standards Committee (ISC) Audits Reviews Subcommittee and will be forwarded to Publications for final processing. The next SEMI International Standards Meeting will be held at SEMICON West from October 7-9 at the Phoenix Convention Center. Some technical committees and task forces may meet virtually outside of this meeting set, so be sure to check the SEMI Standards calendar of events for updates. Standards Introduced in Q2 2025New and revised standards released in Q2. April 2025 standards: https://store-us.semi.org/collections/standards/stdpbc-0425May 2025 standards: https://store-us.semi.org/collections/standards/stdpbc-0525June 2025 standards: https://store-us.semi.org/collections/standards/stdpbc-0625Get InvolvedSEMI Standards development activities take place throughout the year in all major manufacturing regions. To participate, join the SEMI International Standards Program.SEMI Standards are available through individual download purchases or online via SEMIViews. Sign up for a 30-day SEMIViews trial.For more information, please visit the Standards website and events page. For any questions regarding SEMI Standards activities, please contact your local SEMI Standards staff. Paul Trio is Director of Standards at SEMI.

The semiconductor industry continues to push the envelope to meet demands of key applications such as advanced computing, consumer electronics, and defense, as well as environmental sustainability. There remain several critical challenges that our industry is working diligently to address, but how can these issues be tackled more effectively and at a pace that can keep up with this ever-evolving landscape?SEMI sat down with Supika Mashiro, Advisor at Tokyo Electron, where she shares her perspective on the importance of strengthening industry collaboration and what SEMI is doing through its first-ever SEMI Global Standards Summit – “Innovating Tomorrow: Standards for Future Factories” – of which she chairs the Planning Committee responsible for organizing this Summit.Trio: What is the SEMI Global Standards Summit and why is this event timely?Mashiro-san: Topics such as advanced packaging, cybersecurity, as well as supply chain and materials innovation (and their impact to the environment) are considered strategic areas requiring more industry collaboration. Many of these areas also greatly benefit from standards, and the next generation specifications and guidelines will need to be engineered to meet the technical challenges we face today and in the future. The magnitude of these standardization efforts will require engagement from all stakeholders in the design-to-manufacturing value chain as well as multiple Standards Developing Organizations (SDOs) coordinating and collaborating with each other.This is the driving force behind the Summit, and the need to bring together industry stakeholders to identify standards-critical areas and align on developing an industry standardization strategy for the next 3- and 7-year time horizons. We are excited to host this inaugural event on December 12, 2024, in conjunction with SEMICON Japan 2024. Trio: What is the focus of the Summit?Mashiro-san: The Global Standards Summit will cover three main themes: Smart Manufacturing for Future Factories, Packaging Architectures Materials, Environmental Sustainability.Factories are increasing their use of digital twins, predictive maintenance, and AI/ML to improve productivity and yield across the entire manufacturing environment. To take full advantage of these approaches, factories must reduce cybersecurity risks and secure the transfer of “smart” data across the entire supply chain while protecting IP. There is a need for standards to address these risk areas, as well as help diverse advanced analytics systems interoperate to assist personnel in increasing factory productivity. In the Smart Manufacturing for Future Factories session, we will be focusing on autonomous fabs, cybersecurity, and flow-oriented manufacturing.Similarly, packaging technologies have been progressing since the early stages of semiconductor device development more than 70 years ago. More recently, where packaging occurs in the semiconductor process has evolved, and some of the packaging processes are now done as an extension of front-end manufacturing. Moving forward, packaging architecture and materials are becoming increasingly important, driven by the adoption of heterogenous integration to address demands for more complex functionality and reduced power consumption as well as enabling chiplet integration. In the Packaging Architecture Materials session, we will discuss what kind of standardization our industry requires for copper-copper (Cu-Cu) direct interconnection, hybrid bonding, and panel-level packaging. We will also explore glass substrates as well as standards needed to enable semiconductor assembly and test automation.Our third session recognizes that the semiconductor industry is heading into an era of NetZero, in which quantification of environmental performance can have meaningful financial impact. The methods of measuring and accounting the environmental impact such as carbon emissions and the presence of substances of concern in manufacturing and products are not uniformly consistent across the industry. In order for the semiconductor industry to better navigate and make a positive impact in this arena, a consistent set of standards will be crucial. In the Environmental Sustainability session, thought leaders will present on communicating substance of concern (SOC), reporting of process emissions from factories, as well as lifecycle assessment of materials and substances used in semiconductor manufacturing, including equipment.Last but not the least, we will feature a panel session where we will explore all of these topics in a discussion with our panelists.Trio: Who should attend the Summit and why?Mashiro-san: The Summit is intended for leaders who are interested in these standardization topics to come and engage. Attendees will hear and learn about the issues critical to the future advancements of semiconductor manufacturing, what’s happening to address them, as well as new standards development. Attendee engagement is critical as we want our participants to influence and be able to contribute to the direction of standards development by providing valuable insights to help optimize future factories. To facilitate industry collaboration, we have organized networking events with other stakeholders from suppliers and solutions providers to end customers. The Summit is just one of many compelling reasons for industry stakeholders and thought leaders to come to SEMICON Japan. There are several sessions on many related topics that we are covering in the Global Standards Summit. Ultimately, at the conclusion of the Summit, we expect to have identified lists of critical standards areas, and we would like for those leaders to be able to assign and dedicate resources to these standardization efforts.For more information about the inaugural SEMI Global Standards Summit, please visit the SEMICON Japan 2024 site and register today!Supika Mashiro works as an Advisor for Strategic Planning of Industry Initiative Group at Tokyo Electron Limited.She has been involved in Factory Integration (FI) IFT of IRDS since its inauguration in 2016 and a co-chair since 2017. Her area of interest and involvement encompasses “smart” technology applications in manufacturing equipment, its co-optimization with Fab operation as well as ESH/S (Environment, Safety, and Health/ Sustainability) road-mapping and related industry standard development. For the latter, she has taken a couple of leadership roles in SEMI Standards Program as well as IEC TC/44.Paul Trio is Director of the SEMI Standards program.

The inaugural CHIPS Research and Development (R&D) Standards Summit will bring together thought leaders from industry and academia across the globe to help shape the future and drive innovation of semiconductor and microelectronics standards.

Industry associations serve a vital role in amplifying the collective voice of its members for much greater impact than individual companies going it alone.

Accellera Systems Initiative is a standards organization well-regarded by the EDA ecosystem that’s also served by the ESD Alliance, a SEMI Technology Community. Lu Dai, Senior Director of Technical Standards at Qualcomm, has chaired the Accellera Board of Directors since 2017.