SEMI Standards

The Single Device Traceability Task Force emerged from SEMI CAST’s identification of the need for device traceability through the supply chain — not just traceability for devices but for component parts such as semiconductor die, lead frames, epoxy, bond wires, and printed circuit boards. Eventually the work led to a draft document and preparation for SEMI’s standardization process.The Single Device Traceability Task Force’s charter is “To develop standards enabling traceable device-level identification (ID) throughout the IC manufacturing, test, and assembly processes to the point of use in the final system.” The scope of this work is to develop standard(s) focusing on key concepts, behaviors, and requirements as well as standards for enabling device ID and traceability, with considerations for various types of implementations. In addition, the Single Device Traceability Task Force is looking at anti-counterfeiting, which is closely associated with traceability.The motivation for this particular traceability standard comes from systems companies that purchase and use semiconductors in boards and systems. These companies need the ability to track devices through the supply chain for various reasons. They do not want an ad hoc situation where each system vendor develops its own requirements and specifications for device traceability. They want a standard to reduce traceability’s cost and complexity.In effect, customers want a standard that can be cited in a purchase order to their suppliers. This will require the supplier to mark (ECID, 2D code, RFID, etc.) their products with an ID unique for that supplier. The customer will verify the ability to read the ID and will reject devices that cannot be read, or disagree with the shipping information. This arrangement should propagate throughout the supply chain. As a result, the traceability draft standard developed by the Single Device Traceability Task Force looks at traceability from a system integrator’s perspective.Figure 1 captures the business problem for device traceability. Figure 1: Single Device Identification and Traceability Needs Permeate the Semiconductor Industry.Each time that a company ships product to the next company in the supply chain, it’s desirable to have traceability for the products being shipped while preserving the security of the information associated with those products. Initially, the only information that should be transferred is the device identification. In other words, the device traceability ID should not identify what the device is, nor should it provide any additional information relating to the device or its manufacture. In addition, the Traceability ID should not specify the number of devices shipped, the lot number associated with the devices, or any other information that might be of value to hackers or competitors. There is quite justifiable paranoia about the security of this information based on lessons learned.However, the whole point of traceability is to be able to backtrack a device through the supply chain when there’s a problem. Ultimately, any QA effort will need to know where the device was manufactured, when it was manufactured, the conditions under which it was manufactured, and other details that might help to discover the root cause of any problems.To get the additional information needed to troubleshoot a quality or manufacturing problem, a business relationship and NDAs (shown in Figure 1) must be in place between the various member companies in the supply chain. Traceability IDs based on the Single Device Identification and Traceability Standard will not carry that sort of information. They will simply allow analytic data to be obtained through appropriate business relationships.Figure 2 illustrates the types of fact finding that a Single Device Identification and Traceability standard would enable. Figure 2: Types of fact finding enabled by a Single Device Identification and Traceability standard. In this example, a Fabless or System manufacturer (shown in the center of the figure) might make an assembly that incorporates an MCM (multi-chip module) obtained from an OSAT (outsourced assembly and test) vendor. The MCM would bear a traceability ID on or inside the package. If a failure occurs in the MCM, the Fabless vendor contacts the OSAT, using an existing business relationship and NDA, and requests a comprehensive manufacturing report for the specific device using the traceability ID to identify the device in question. The OSAT then supplies a report to the Fabless company that provides the requested manufacturing data and any additional traceability IDs for the component parts in the MCM.The component traceability IDs in the OSAT’s report provide the Fabless vendor with the ability to track the MCM’s component die and package back to the semiconductor foundries and packaging vendor where these components were manufactured. These traceability IDs allow the Fabless vendor to request manufacturing reports for the components in question from the supplying foundries and the package vendor. Note that the reason that the reports go directly from the semiconductor foundries to the Fabless vendor as shown in Figure 2 is that the OSAT may not have comprehensive information about the function of these die and the Fabless vendor may want to keep that information private.The proposed new standard is called the “Specification for Single Device Traceability for the Supply Chain” and is SEMI Draft Document #6450. It addresses the first part of the systems integrators’ desire of being able to hold their suppliers accountable for having an established traceability scheme that would permit data analysis should the need arises. As of the end of November, the ballot proposal passed Technical Committee review and will undergo a procedural review process as part of the SEMI Standards development requirements. Once, these approval requirements are met, the specification will be prepared for publication and ready for industry adoption. Meanwhile, SEMI’s CAST Working Group and Standards Task Force will continue standardization efforts for device security and anti-counterfeiting. To join SEMI Standards activity, visit SEMI Standards or go directly to the Standards Membership Application.Dave Huntley is in business development at PDF Solutions.

Gas plasmas have become a fundamental building block in many semiconductor manufacturing processes. Plasma torches used to create these gas plasmas have three components: an induction coil, a plasma confinement tube, and a gas distributor or torch head that introduces multiple gases into the torch. RF generators supply the high-frequency electrical energy needed to transform the plasma-forming gases flowing through the torch, typically oxygen or a fluorine-bearing gas, into a plasma. The RF generators used for semiconductor manufacturing typically operate in the low megahertz or tens of megahertz frequency range and are expected to output high RF power at those frequencies for long periods. For example, ALD and CVD processes use RF generators with output powers on the order of a few kilowatts.About three years ago, a major semiconductor device maker experienced a recurring problem with its RF generators. The company found that more than half of the RF generators it deployed in its manufacturing lines were failing within the first two years of service. Further, the same model RF generators obtained from the same RF generator vendor simply were not behaving similarly when used for exactly the same processes under exactly the same conditions. Nor were these supposedly identical generators operating for consistent lengths of time before failing. Clearly there was variation from one generator to the next, even within the same model.A further complication occurred during procurement of these RF generators. Procurement people were acquiring generators using general specification requirements and these requirements were, at times, opaque to the intended process application. In some cases, equipment was being purchased in bulk quantities and then assigned to different processes on the semiconductor manufacturing lines. When these generators were deployed, they had not been designed or optimized for the specific task to which they were assigned, exacerbating the reliability problem.The RF generator suppliers felt that they would be able to supply more reliable generators if they could collaborate with their customers so that they could purpose-build their generators for the intended uses. However, the semiconductor makers preferred to keep the specifics of the manufacturing process applications for these generators proprietary, for obvious reasons. To make matters worse, customers did not always return failed units to RF generator vendors for analysis. Instead, the RF generators were sometimes sent out to be refurbished by third parties or repair depots, and then redeployed. As a result, failure analysis proved challenging to obtain.This is exactly the type of situation that SEMI’s Semiconductor Component, Instrument and Subsystem (SCIS) technical community exists to address. SCIS develops test methods aimed at measuring component defects for the greater semiconductor manufacturing community. SCIS tackled this RF generator problem and developed a standard test method for measuring specific RF generator characteristics. Using this test method, RF generator manufacturers can publish results for their generators in a standardized way that allows their customers to make fair, application-specific comparisons among models and vendors.Many aspects of an RF generator needed to be considered. A key aspect that interested integrated device makers (IDMs) and capital equipment OEMs was a transient-response test for RF generators.A transient-response test standard established by the SEMI-E135 standard did exist, but its tests were run only with 50-ohm RF output loads. SCIS decided to expand this transient-response test by adding high- and low-impedance load tests to the existing 50-ohm load test.The initial response to this plan was not enthusiastic. The semiconductor makers feared that this simple expansion of an existing test standard would not produce a test regimen that would help solve what they considered to be the real problem: RF generator reliability. However, a major semiconductor equipment OEM differed, and felt that the two additional load conditions would provide a much better understanding of an RF generator’s capabilities. A second major semiconductor equipment OEM also got involved by providing additional, valuable feedback on the developing RF generator testing standard.In the end, the general feeling in the community is that this newly revised standard levels the playing field and makes it easier for customers to compare RF generators from different generator vendors. Now that this revised SEMI-E135 standard with the additional output load resistances has been published, the SCIS technical community has gained broader support and is now digging into the creation of a reliability test standard for RF generators to meet the greater semiconductor manufacturing community’s strong need for such a standard.How SEMI Standards are MadeThis sequence of events illustrates how standards are developed at SEMI. The SCIS technical community (or some other technical community within SEMI) develops and incubates test methods until a document is ready for standardization. At that point, a SEMI Standards task force is created. Companies within SCIS work with the task force (or become the task force) to ready the document for standardization. For the SEMI-E135 revision, the list of participating companies encompassed the entire semiconductor manufacturing community including RF generator suppliers, semiconductor capital equipment OEMs, and IDMs. All stakeholders participate.Figure 1 illustrates the sequence of events that occurred during the revision of the SEMI-E135 standard, after the test methods had been developed by SCIS as discussed above. Figure 1: Timeline for SEMI-E135 RF generator test standard revision after SCIS had developed the new load tests. Balloting, as illustrated in Figure 1, is the main way that SEMI obtains global consensus in the standards-making process. To achieve this, SEMI sends out the standard ballot proposal, or in this case a major revision of an existing standard. The changes to SEMI-E135 were sufficiently extensive that it was treated as a complete rewrite to this standard.On first ballot, the revised SEMI-E135 standard received several rejection votes, which also included suggested modifications that would remove the objections. These ballot rejections caused the proposed standard to be further revised, with both technical as well as editorial changes, triggering a SEMI Standards process called a Ratification Ballot. This approach takes less time than starting the balloting process over again. The final revised standard was published in September 2018.Having all stakeholders participate in the early development of the revised standard helped move the standard through the balloting process immensely, but customer participation was especially important. In the end, the semiconductor device makers and equipment OEMs are the ultimate beneficiaries of a standard like SEMI-E135. When end customers help to drive a standard’s development, there’s added pressure to move the standard along in the standardization process and the standard is far more likely to be useful for their purposes.And that’s a very good thing.For those looking to learn more about SCIS or engage in ongoing efforts, please contact Paul Trio, senior manager of Strategic Initiatives at SEMI, at [email protected].

Even for someone who has been in this industry since the days of the TI Datamath 4-function calculator and the TMS1100 4-bit microcontroller (yes, that’s been a LONG time – the movie Grease premiered the same year!), it is sometimes hard to grasp the scope and complexity of what happens in today’s leading-edge semiconductor gigafabs. In fact, the only way to comprehend the enormous volume of transactions that occur is to consider what happens in a single minute – this is illustrated in the infographic we have labeled “The Gigafab Minute.”* It’s amazing enough to think that a single factory can start 100,000 wafers every month on their cyclical journey through 1500 process steps… and have 99%+ of them emerge 4 months later to be delivered to packaging houses and then on to waiting customers. It’s quite another to realize that all of this happens continuously (24 x 7) and automatically. “How is this possible?” you ask.Well, a big part of the solution is the body of SEMI standards which have evolved since the early 80s to keep pace with the ever-changing demands of the industry. From an automation standpoint, many of these standards deal with the communications between manufacturing equipment and the factory information and control systems that are essential for managing these complex, hyper-competitive global enterprises.A significant characteristic of these standards is that they have been carefully designed to be “additive.” This means that new generations of SEMI’s communications standards do not supplant or obsolete the previous generations, but rather provide new capabilities in an incremental fashion. To appreciate the importance of this in actual practice, consider how the GEM, GEM300, and EDA/Interface A standards support the transactions that occur in a single Gigafab Minute.Starting at 1:00 o’clock on the infographic and moving clockwise, you first notice that 2.31 wafers enter the line. Of course, these are actually released in 25-wafer 300mm FOUPs (Front-Opening Unified Pod), but 100K wafers per month translates to 2.31 per minute. Since these factories run continuously, once the line is full, it stays full. And with an average total cycle time of 4 months, this means that there are 400K wafers of WIP (work in process) in he factory at any given time. This number, and the total number of equipment (5000+), drive the rest of the calculations.GEM (Generic Equipment Model) – SEMI E30, etc.The GEM messaging standards were initially defined in the early 90s to support the factory scheduling and dispatching applications that decide what lots should go to what equipment, the automated material handling systems that deliver and pick-up material to/from the equipment accordingly, the recipe management systems that ensure each process step is executed properly, and the MES (Manufacturing Execution System) transactions that maintain the fidelity of the factory system’s “digital twin.”Every minute of every day, GEM messages support and chronicle the following activities: 240 process steps are completed (i.e., 240 25-wafer lots are processed), 300 recipes are downloaded along with a set of run-specific adjustable control parameters, and 600 FOUPs are moved from one place to another (equipment, stockers, under-track storage, etc.). For each of these activities, the factory’s MES is notified instantaneously.GEM300 – SEMI E40, E87, E90, E94, E157With the advent of 300mm manufacturing in the mid-to-late 90s, a global team of volunteer system engineers from the leading chip makers defined the GEM300 standards to support fully automated manufacturing operations. Starting at 5:00 o’clock on the infographic, the number of transactions per minute jumps almost 3 orders of magnitude, from the monitoring of 900 control jobs across 4000 process tools to the tracking of 360,000 individual recipe step change events. This level of event granularity is essential for the latest generation of FDC (Fault Detection and Classification) applications, because precise data framing is a key prerequisite for minimizing the false alarm rate while still preventing serious process excursions. In this context, more than 6000 recipe-, product- and chamber-specific fault models may be evaluated every minute.Simultaneously, the applications that monitor instantaneous throughput to prevent “productivity excursions” and identify systemic “wait time waste” situations depend on detailed intra-tool wafer movement events. In a fab with hundreds of multi-chamber, single-wafer processes, 75,000 or more of these events occur every minute. EDA (Equipment Data Acquisition) – SEMI E120, E125, E132, E134, E164, etc.Rounding out the SEMI standards in our example gigafab is the suite of EDA standards which complement the command and control functions of GEM/GEM300 with flexible, high-performance, model-based data collection. The EDA standards enable the on-demand collection of the volume and variety of “big data” required from the equipment to support the advanced analysis, machine learning, and other AI (Artificial Intelligence) applications that are becoming increasingly prevalent in leading semiconductor manufacturers. As EUV (Extreme Ultraviolet) lithography moves from pilot production to high-volume manufacturing at the 7nm process node and beyond, the litho process area will become a major source of process data by itself, generating 10 GB of data every minute. This is in addition to the 100 GB of data collected from other process areas. The End ResultThe final wedge (12:00 o’clock) in our infographic highlights the real objective – which is producing the millions of integrated circuits that fuel our global economy and provide the technologies that are an integral part of our modern way of life. Assuming a nominal die size of 50 square mm (typical of an 8 GB DRAM), the 2.31 wafers we started at 1:00 o’clock result in almost 3200 individual chips. But none of this would be possible without the pervasive factory automation technology we now take for granted. So, as you finish reading this posting on whatever device you happen to be using, take a micro-moment to acknowledge and thank the hundreds of standards volunteers whose insights and efforts made this a reality!You may not be responsible for running a gigafab anytime soon, but the SEMI standards used in this setting are no less applicable to any Smart Manufacturing environment. Give us a call if you’d like to know more about how these technologies can benefit your operations for many years to come.Alan Weber is Vice President, New Product Innovations, at Cimetrix Incorporated. Previously he served on the Board of Directors for eight years before joining the company as a full-time employee in 2011. Alan has been a part of the semiconductor and manufacturing automation industries for over 40 years. He holds bachelor’s and master’s degrees in Electrical Engineering from Rice University. For more information on SEMI Standards, please click here.

Advances in areas from materials, packaging and testing to devices, equipment and standards must come together to enable smart factories and new capabilities in the microelectronics manufacturing supply chain. The secure transfer of information between factories is an important part of creating the “digital thread” that will give rise to higher yield, faster cycle times and reduced cost. At SEMICON West 2018, Tom Salmon, Vice President of Collaborative Technology Initiatives at SEMI, discusses his group’s work across the supply chain – including semiconductor front-end, packaging and test, as well as PCB and final product assembly – to accelerate the development of smart manufacturing. Ariana Raftopoulos is a marketing manager at SEMI.

The arrival of Fan-Out Panel Level Packaging (FO-PLP) appears to be at a perfect time: This technology will leverage processes developed for Three Dimensional Stacked Integrated Circuits (3DS-IC) as well as panel processing technologies developed for industries such as solar panels and large-screen TVs. In this combination, FO-PLP promised the improved performance of 3DS-IC, without the expense. There was just one problem…That problem is the size of the panels to be processed. As different companies developed FO-PLP processes, they chose panels sized to meet certain technical or business goals, or chose a size based on familiarity. So, processes were being developed for more than ten sizes, each of which had one or more companies championing them. For people in the wider semiconductor industry, the development of many processes, each with a unique panel size brought a feeling of déjà vu, reminding them of the 1970s, when each device manufacturer created their own specification for wafer size, forcing them to manufacture their own wafer processing equipment since no external manufacturer was willing to produce tools usable only by a single customer.SEMI responded by developing an industry consensus silicon wafer standard – which described basic parameters, including diameter and thickness – to resolve the issue. Almost overnight the landscape changed, and new tool manufacturers sprung up, enabling the incredible growth that has persisted over more than 40 years.Recently, Cristina Chu (TEL NEXX) presented the state of FO-PLP to the North America Chapter of the SEMI Three-Dimensional Packaging and Integration (3DP I) Technical Committee, suggesting that the Committee develop a single standard dimension that would enable the technology to move into high-volume manufacturing.The Committee began by surveying the industry to determine the interest level in such a standard as well as its contents. A key finding came in response to the question “Would you support a standardized panel size?” Overwhelmingly, over 70 percent of the respondents supporting the idea for the standard, with less than 2 percent opposed. The survey also asked if other parameters should be standardized and, if so, which parameters. Majority responses pointed to edge profile, flatness, and warp, prompting the 3DP I Committee to immediately form the FO-PLP Panel Task Force (TF) to develop such a standard. Chu and Richard Allen (NIST) agreed to chair the TF and respondents to the survey were asked to participate as TF members.The TF initially decided to follow the model of SEMI M1, Specification for Polished Single Crystal Silicon Wafers, and write the document as a purchase specification. The purchase specification would indicate a limited number of mandatory parameters, identified as those that serve as bottlenecks to the development of a FO-PLP ecosystem. Parameters that were not perceived as bottlenecks but might be useful for implementing a FO-PLP process would be included as optional.Working under the SEMI Standards umbrella allowed the TF to take advantage of work done in the development of other standards, without having to recreate it from scratch. In particular, Flatness and Shape were repurposed from SEMI M1, ensuring consistent definitions of these parameters.The TF could not come to consensus on how the other parameters should be categorized, so the decision was made to move the ordering table to a new Appendix as optional.The TF will be balloting its first specification for panel substrate in the upcoming cycle, which opens September 5, 2018 (Cycle 7). The voting is open to all industry experts. Based on the feedback, the task force will continue to refine and otherwise improve the specification by incorporating other parameters that are critical to making FO-PLP a reality.SEMI Standards development activities take place throughout the year in all major manufacturing regions. To get involved, join the SEMI International Standards Program at: www.semi.org/standardsmembership.For more information regarding FO-PLP Panel Task Force activities, please contact Laura Nguyen at [email protected] Allen is a physicist in the Nanoscale Metrology Group in the Engineering Physics Division of the Physical Measurement Laboratory (PML) at the National Institute of Standards and Technology (NIST).

Did you miss the SEMI International Standards Reception at SEMICON West 2018? Not to worry, here are the highlights.SEMI honored two Standards industry leaders for their outstanding accomplishments in developing Standards for the electronics and related industries.Two awards were given recognizing the efforts of each member. The Technical Editor Award recognizes the efforts of a member to ensure the technical excellence of a committee’s Standards. This year’s recipient is Sean Larsen of Lam Research. Mr. Larsen has led the North America EHS Committee and multiple EHS task forces for over a decade. His knowledge of the Regulations, Procedure Manual, and Style Manual, combined with his vast experience in the industry, ensures that complex safety matters are explained in a clear, consistent manner, and ballot authors frequently rely on him for his technical skills in preparing ballots.In addition to co-chairing the North America EHS Committee, Mr. Larsen is currently the co-leader of the SEMI S22 (Electrical Design) Revision TF, the SEMI S2 Non-Ionizing Radiation TF, the SEMI S2 Korean High Pressure Gas Safety TF, and the Control of Hazardous Energy TF.The Corporate Device Member Award recognizes the participation of the user community and is presented to individuals from device manufacturers. This year’s recipient is Don Hadder of Intel. Mr. Hadder has been actively involved in the Standards Program for several years, and currently leads the Chemical Analytical Methods Task Force and chairs the North America Liquid Chemicals Committee. He has successfully re-energized the committee, which is now focused on enabling continued process control improvements for advanced nodes. He recently drove the development of a critical new standard: SEMI C96, Test Method for Determining Density of Chemical Mechanical Polish Slurries, the first document in a series of SEMI Standards that will be devoted specifically to CMP slurry users, IDMs, slurry suppliers, metrology manufacturers and OEM equipment suppliers.Mr. Hadder has worked at Intel for 23 years, where his experience and system ownership has been in Diffusion, Wet Etch, Planar-CMP, Ultra-Pure Water, Waste Treatment Systems, Abatement and Vacuum Systems, Bulk and Specialty Gas, Bulk Chemical Delivery and Planar Chemical Delivery.James Amano, Sr. Dr. International Standards, opened the reception with a few words. He noted that the total number of published SEMI Standards is nearing 1000, and that these documents serve as the backbone of modern day semiconductor manufacturing. SEMI president and CEO Ajit Manocha, speaking at the SEMI International Standards Reception at SEMICON West. Ajit Manocha, President and CEO of SEMI, reminisced how he was an active Standards Member, and how much he got out of SEMI Standards as a young engineer at Bell Labs. He passionately emphasized that SEMI Standards remain critical in this era of new materials and disruptive architectures and processes, calling them the "oxygen of the industry."Laura Nguyen is coordinator, International Standards, at SEMI.