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SEMI spoke with Dr. Mikko Söderlund, sales director for Beneq’s semiconductor business, about trends in Atomic Layer Deposition (ALD) applications. Söderlund shared his views ahead of his presentation at SEMI MEMS Imaging Sensors Summit, 25-27 September, 2019, at the WTC in Grenoble, France. Join us at the event to meet Beneq and other key industry influencers. Registration is open.SEMI: The Backside Illuminated (BSI) CMOS Image Sensors (CIS) market continues to experience steady growth. Which applications are currently driving market growth?Söderlund: BSI CMOS Image Sensor market continues to be driven by mobile, security, automotive and Internet of Things (IoT) applications – so there seems to be plenty of opportunities for BSI CIS market to grow further.SEMI: What is critical for advanced thin-film deposition methods to extract best electrical performance?Söderlund: It is critical to control the material properties of the deposited layer (such as charge density, resistivity or barrier property) and of course, film uniformity and conformality. Furthermore, controlling material interfaces is also important, especially for sensitive III-V materials. {% video_player "embed_player" overrideable=False, type='scriptV4', hide_playlist=True, viral_sharing=False, embed_button=False, width='350', height='197', player_id='12721134435', style='margin: 0px auto; display: block; float: right; margin-left: auto; margin-right: auto; width: 350px;' %} Coatings and material features based on existing standard techniques can be very expensive, or not feasible at all. What does Atomic Layer Deposition (ALD), as a thin film coating method, offer in particular?Söderlund: ALD offers dense, highly conformal and pinhole-free best-in-class functional layers for dielectrics, passivation, encapsulation and much more. As a gentle and precise layer-by-layer method, ALD is extremely well-suited for deposition of such performance critical layers over large surface areas such as a cassette of wafers.SEMI: Please describe the Atomic Layer Deposition (ALD) coating process. Söderlund: ALD is based on a self-limiting surface reaction controlled thin film deposition. During coating, two or more chemical vapors or gaseous precursors react sequentially on the substrate surface, producing a solid thin film (see schematic below). Most ALD coating systems use a flow-through traveling wave setup, where an inert carrier gas flows through the system and precursors are injected as very short pulses into this carrier flow. The carrier gas flow takes the precursor pulses as sequential waves through the reaction chamber, followed by a pumping line, filtering systems and, eventually, a vacuum pump.SEMI: What are the two leading edge ALD applications?Söderlund: Today’s leading-edge ALD applications are in logic (high-k/metal gate, multiple patterning) and memory (DRAM capacitor, 3D NAND). Within the More-than-Moore (MtM) markets, CIS and MEMS (actuators and sensors, RF) have been early adopters of ALD, and we also see ALD being introduced in GaN Power and RF, as well as photonics.SEMI: Give us one prediction about the opportunities offered by advanced imaging applications.Söderlund: The large diversity of imaging applications will continue to drive growth and innovation. For example, machine vision is expected to transform the imaging landscape. We see this as a big opportunity for advanced thin-film deposition methods such as ALD, provided that the tools are versatile enough to address the diverse manufacturing requirements.SEMI: What are your expectations for SEMI MEMS Imaging Sensors Summit and why do you invite your peers to attend? Söderlund: The summit brings together all key RF stakeholders in the MEMS and imaging sensors industry, and we are looking forward to a great event. It’s a special event for us as we are officially launching a new ALD cluster tool product specifically engineered for the MtM applications – so this brings great excitement that we want to share with the attendees.Dr. Mikko Söderlund is Sales Director for Beneq’s semiconductor business. He has more than 20 years of experience in product development, product management, technical sales and business development across the photonics, OLED, and semiconductor industries. Mikko received his Ph.D. in Micro- and Nanotechnology from the Helsinki University of Technology. Serena Brischetto is a marketing and communications manager at SEMI Europe.
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This year, SEMI ISS covered it all – from a high-level semiconductor market and global geopolitical overview down to the neuro morphic and quantum level. Here are key takeaways from the Day 1 keynote and Economic Trends and Market Perspectives presentations.In the opening keynote, Anne Kelleher from Intel pointed to the huge growth of data, with fabs collecting more than 5 billion sensor data points each day. The challenge, Kelleher noted, is to turn massive amounts of data into valuable information. Moore’s law is not dead. New models of computing benefit still from Moore’s law and advances in Si/CMOS technologies for conventional, deep learning, neuro morphic and quantum computing.With customers expecting continual improvements in applications, the question is whether the chip industry is moving fast enough to meet these expectations, Kelleher said. A broad supply chain, equipment and materials innovations, and attracting the “best of the best” college graduates to fuel innovation is key, she said.In the economic trends session, Nicholas Burns (ambassador ret.) from Harvard University pointed out that we will see a major shift in power. The U.S. will remain the major world power over the next 10 years, but we will see a major shift in power in the next coming decades as the gap with countries like China, Russia and India continues to narrow.Duncan Meldrum from Hilltop Economics said that we are passing the peak growth of economic cycle. He warns that a more likely outlook is that a global growth recession is developing. Although semiconductor MSI growth will see a noticeable slowdown in 2019 and 2020, the semiconductor industry is still healthy over the longer term.Bob Johnson from Gartner sees demand shifting from consumer to commercial applications with higher ROIs and budgets. AI, IoT and 5D are the major enablers. He sees structural changes in the semiconductor industry especially for memory but also for Moore’s law with increasing costs and fewer players.The DRAM markets shows volatility and NAND market may be negative in 2019 but non-memory are expected to accelerate mainly because of increasing content and some price hikes.Overall Gartner expects good long-term growth with a CAGR (2017 to 2022) of 5.1%, outpacing 2011 to 2016 CAGR of 2.6%. After a strong 2018 with 13.4% revenue, he forecasts a slower 2019 with 2.6% growth followed by a 8% growth in 2020 and negative growth rate in 2021.Andrea Lati of VLSI went “Back to fundamentals” in his presentation about the industry. VLSI sees a downside bias due to slowing global economy, tariffs, and trade wars. Future drivers are data economy, cloud, AI and automotive.As memory leads the 2019 slowdown, analog, power, logic and other sectors remain in positive territory. VLSI lowered its semiconductor equipment forecast for 2018 from 20% (Jan. 2018) to 14% (Dec. 2018) but increased its sales outlook from 8% to 15% in 2018. VLSI expects revenue to slow into the first half of 2019 but increase to over 4% in the second half of the year, resulting in total 2019 drop of 2.7%. Semiconductor equipment sales are expected to drop from 14% in 2018 to -10% in 2019.Michael Corbett of Linz Consulting, covering wafer fab materials in the years of 3D scaling, sees these as good times for the industry. His outlook for wafer fab materials is bullish based on strong MSI and because wafer fab materials suppliers are getting bigger because of M As.In the Market Perspective session, Sujeet Chand of Rockwell Automation pointed out that as more and more data is generated, the problem is how to get value of all the data collected. There is a need to create the right architecture for machine learning and AI and big data is increasingly being replaced by contextual/structured data. He expects Industry 4.0 to drive foundries to become smaller, more flexible and more productive.In the Technology and Manufacturing session, Aki Sekiguchi of TEL addressed process challenges in the age of co-optimization. The semiconductor industry continues to expand, driven by massive growth of interconnected devices, with heavy demand for processing power and storage. He expects an exponential increase of data from about 40ZB in 2018 to 50ZB in 2020 to 163 ZB in 2026.Major technologies such as DRAM, 3D NAND and logic are dealing with scaling challenges. The density of DRAM (Mb/chip) is plateauing according to 2015 to 2020 trend data, with DRAM is in need of EUV. Memory capacity demand is leading to increasing layers and higher aspect ratios that is concern for 3D NAND and mainly for plasma etch. With Logic already implementing 3D structures, it appears to be in a solid position. Buddy Nicoson of Micron talked about his 50 years in the industry and looked ahead to the next 50. The anchors – quality, cost, scale and speed – won’t change. It has been a great journey so far with unprecedented opportunities and challenges ahead of us. We are getting into a convergence (specialization, integration) and solution-based phase. We will see some inflection points in the coming years, with the best yet to come.Christian G. Dieseldorff is senior principal analyst in the Industry Research and Analysis group at SEMI in Milpitas, California.
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Process power and reactive gas subsystems for semiconductor manufacturing equipment have grown at a CAGR of 21% since 2013. The segment growth is considerably above the critical subsystems industry average of 9.5% and is attributable to higher demand for vacuum processing equipment over the period.Process power and reactive gas subsystems now account for approximately 12% of all expenditures on critical subsystems used on semiconductor manufacturing equipment, up from 7% in 2013. The main driver of this exceptional growth has been the rise in vacuum processing steps (deposition and etch) during the manufacturing processes of both logic and memory devices. Most deposition and etch processes require an RF generator to provide a plasma energy source in the chamber, increasing demand for tools with power subsystems such as RF power supplies and matching networks.Multiple patterning and the advent of 3D NAND in high-volume manufacturing have significantly increased the number of deposition and etch processing steps and, in the case of 3D NAND, longer and more difficult etch processes are requiring a wider range of power solutions. Further analysis shows that 3D NAND has been the principle growth catalyst, with the total share of power subsystems going to memory applications increasing 8 percentage points since 2013. Memory applications now account for almost half of all power subsystems demand in 2018. Interestingly, investigation of power subsystems by tool type reveals that a clear majority of power subsystems (60%) find their way on to etch tools with only 40% on deposition tools. This can be explained by the fact that more delicate etch processes can require multiple RF power solutions per tool, whereas deposition does always use plasma energy sources, for example in thermal deposition processes.Despite the staggering growth performance of the power subsystems segment over the past five years, we expect the growth rate to moderate significantly in the run-up to 2023. Now that 3D NAND has been adopted in high-volume manufacturing, we expect the rate of increase in vacuum/plasma processing steps to slow down. The introduction of EUV also has the potential to taper demand for vacuum processing equipment. However, it is not expected the reverse the trend as multiple patterning techniques will still be needed in conjunction with EUV to achieve the desired improvements in device density and performance. The future growth trend for power and reactive gas subsystems is forecast to be in line with the critical subsystems industry average at approximately 2.0% CAGR until 2023.For more information about Critical Subsystems and VLSI Research, please visit www.vlsiresearch.com/public/csubsJulian West is a technical and market analyst at VLSI Research Europe.
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