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Back in 2012, China ranked fifth among seven regions worldwide in IC wafer capacity but surged past the Americas and Japan in 2018 and 2019 to claim the number three position (figure 1). That’s a big deal given that ICs account for the largest share of wafer capacity excluding discrete, opto, MEMS and sensors.China’s IC wafer capacity growth accelerated to tune of 14% in 2019 and 21% in 2020 and is expected to grow at least 17% this year, as we report in the latest update of the World Fab Forecast, published December 3rd by SEMI. Of all regions, Taiwan boasts the second strongest growth rate over the same period at 3% to 4%.Figure 1: Total IC installed wafer capacity for top five regions The report shows that from 2019 through the end of 2021 China will have increased wafer capacity for memory by 95%, foundry by 47% and analog by 29%. Foundry will represent the largest portion of those gains, reaching 2 million wpm (200mm equivalents). Memory will follow at about 1.5 million wpm and then analog at over 120,000 wpm.But Chinese companies aren’t pulling off this feat singlehandedly. Many international companies are contributing to the wafer capacity increases in China (figure 2). Figure 2: IC wafer capacity in China by company origin The share of capacity contributed by Chinese-owned companies and international companies has changed little since 2012, though Chinese-owned companies saw a slight dip in their slice of the pie from 60% to 57%From 2019 through 2021, Chinese-owned companies will add almost 60% capacity for foundries, the most of all sectors. Companies including SMIC, Hua Hong Semiconductor, Nexchip, XMC and Hua Li Microelectronics are driving the increases.During the same period, Chinese-owned companies will ramp up memory capacity from basically zero to 300,000 wpm. Companies such as Yangtze Memory Technology and ChangXin Memory Technologies (CXMT), also known as Innotron, are powering the quick rise with aggressive ramps of 3D NAND and DRAM capacity.Among international-owned companies, TSMC and UMC are driving the largest share of foundry growth, while Samsung, SK Hynix and Intel are powering gains in memory capacity.More information is available in the World Fab Forecast report. The report currently collects information for fab equipment and construction investment, capacities, technologies and product types for over 280 fabs and lines in China alone, including 40 facilities that either began operation in 2020 or will from 2021 through 2024.Christian G. Dieseldorff is senior principal analyst in the Industry Research and Analysis group at SEMI in Milpitas, California.
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Even though microchips continue to get smarter, vital security gaps continue to be exposed through such hack attacks as Meltdown, Spectre, and in recent weeks, Plundervolt. Researchers continue to discover open doors in chip architectures for malicious players to steal increasingly sensitive data, hide the identity of counterfeits, or tamper with electronics systems most anywhere along the global microelectronics supply chain. Today, it’s impossible to have full visibility of the distributed chip making process – from design and fabrication to packaging, testing and delivery. That’s why our industry’s future hinges to a large degree on establishing a hardware root of trust throughout the silicon’s operational lifecycle. Trust but verify! It’s easy to say, but how do we do it?To gain insights, SEMI interviewed Dr. Mark Tehranipoor, currently the Intel Charles E. Young Preeminence Endowed Chair Professor in Cybersecurity at the University of Florida’s Electrical and Computer Engineering Department. A foremost authority on microelectronics security and trust, counterfeit electronics detection, and supply chain risk management, Dr. Tehranipoor will be a keynote speaker at the SEMICON Taiwan Security on Chip Summit, Friday, September 25, where a full program of industry leaders will address key security challenges and solutions involving IoT, systems on a chip (SoCs), integrated circuits, physical unclonable function (PUF) technology, future design, certifications, managed services, and more.For additional insights and to hear Dr. Tehranipoor’s full presentation, register for SEMICON Taiwan 2020, which SEMI is holding as a hybrid event with both a virtual format and an in-show program September 23-25.SEMI: What are the major uncertainties in providing the hardware root of trust within the cyber domain?Tehranipoor: One of the most critical issues we’re dealing with now is loss of control over the process of designing and fabricating integrated circuits and systems. This has happened along with globalization and the movement of supply chain operations overseas to lower costs of nearly all goods, including electronics products and semiconductors. As skill sets, talent, design and fabrication have all shifted offshore, concerns have also risen about security controls across the many different segments of the microelectronics supply chain.For example, when you think about the security of military, space, transportation, power grids, financial or other networks, it becomes a major concern if you cannot trust the underlying electronics system that runs them. New SoCs are also holding more sensitive data around encryption keys, biometrics, personal information or banking data. And as reports escalate about cybersecurity gaps at the electronics part level, it’s increasingly important to establish a hardware root of trust. Today, it’s not enough for a buyer to just call up the design house and verify the electronic ID of an asset. The ID might match, but the device could have been tampered with or replaced with a counterfeit somewhere along its end-to-end journey. Unlike software or networks where problems can be automatically identified, upgraded and fixed, verifying electronic hardware is a costly and time-consuming process, especially when they’re as complex as microchips. It can take months to deconstruct, reverse engineer, inspect, and authenticate a chip. By then, discovery of any security breaches is too late.When addressing the security of electronics systems, there are three important features to keep in mind. First, there’s confidentiality. The device shouldn’t leak information to an unauthorized user. Second, there’s integrity. Unauthorized users should not be able to manipulate an SoC’s sensitive data. The third feature is availability, which can be a result of Denial of Service (DoS) attacks. If the device is under attack and can’t access your online service or network, you must still have security measures for your electronics system to be available in a safe mode while you simultaneously identify the problem, recover from it, and return to normal functions.SEMI: What framework should be followed to establish greater trust and confidence across the entire microelectronics supply chain?Tehranipoor: In the United States, we recognize it may not be possible to bring all manufacturing, design, and delivery teams back to this country and have them certified by the U.S. Department of Defense. You could do some of it, but it would be very costly and complex to bring back all the design, fab, testing, and packaging operations involved with electronics systems and still have complete control.The most practical approach is to make sure we design electronic systems with security and trust in mind from the start. We need to provide security features up front throughout the extended supply chain – into the design flow, fab flow, and out into the field to make it easier and faster for anyone at any point to verify the authenticity of an electronic system as well as identify and mitigate a problem. Finally, we have to remember that we are all in this together – designers, developers, packaging facilities and fabs. We can’t just blame semiconductor manufacturers or any other single entity. As a result, we must be cooperative and collaborative by focusing on this issue as a consortium. Everyone in this ecosystem must come to the table, share best practices, establish standards, and initiate best practices for device to system authentication.SEMI: How can SEMI and the SEMI Electronic System Design (ESD) Alliance help the industry meet these challenges?Tehranipoor: It’s certainly of utmost importance for members of organizations like SEMI and its ESD Alliance committees to jointly develop and adhere to standards or guidelines that establish hardware root of trust across all participants in the global supply chain. At the same time, such alliances should make it a high priority to protect each company’s intellectual property (IP). Collectively, we need resolutions that allow us to develop unique IPs and more easily trace, identify, and verify the authenticity of electronics systems as they flow throughout the end-to-end electronic supply chain. Great efforts are under way and progress is being made. But it’s not enough. Clearly, more needs to be done to establish root of trust standards at the chip level.I can’t emphasize enough the importance of consortia like the SEMI ESD Alliance to create an environment where industry, government, and academia can come together, share best practices and even case studies on how they handled security vulnerabilities and breaches. We understand that not everyone wants to share their security problems, vulnerabilities, or attack surfaces, but learning from each other’s experiences can have a tremendous impact on industrywide progress. If you don’t know what you need to address, you won’t be able to address it when it happens.I also encourage organizations like SEMI to create standards or guidelines that reduce the complexity of microchip designs for security purposes. Realtors often say there are three things to consider in finding a home that will appreciate in value: Location, location, location. To build more secure electronics systems, my mantra is: Automation, automation, automation. Complexity is the enemy of security. By using automation to simplify security mechanisms and detect inconsistencies, it will be easier to find and fix security problems, not to mention lower costs at the same time. SEMI: What will an attendee take away from your talk at SEMICON Taiwan?Tehranipoor: I have a large team of researchers who day and night spot vulnerabilities by attacking and assessing data from different electronic systems set up in our labs. Attendees will see real-world examples and lab animations that show how electronics systems can be hacked most anywhere across the supply chain. They will also learn about step-by-step security solutions we have developed at the microchip level. We need to do a better job of protecting the security of our semiconductor assets and the electronic solutions or services they power. My call to action will be that we need to invest more in research and foster an environment of more open trust and cooperation. We can do this by bringing together different countries, companies, and organizations in the microelectronics ecosystem to overcome this major challenge.Dr. Mark Tehranipoor is currently the Intel Charles E. Young Preeminence Endowed Chair Professor in Cybersecurity at the ECE Department, University of Florida. He is currently serving as Director for Florida Institute for Cybersecurity Research (FICS), National Microelectronics Security Training Center (MEST), CYAN Center of Excellence, and ECI Transition Center. He also serves as Program Director of Cybersecurity for UF Herbert Wertheim College of Engineering. His current research interests include IoT security, hardware security and trust, and reliable circuit design.Samer Bahou is senior manager of corporate communications at SEMI.
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The COVID-19 pandemic has inflicted major impacts on manufacturing operations worldwide including in the semiconductor industry. The virus has left millions of people confined to their homes, resulting in a massive shift to virtual work and online engagement. In Singapore, where AEM is headquartered, our management team took proactive measures to protect our workers by implementing best practices ahead of the Singapore Circuit Breakers.AEM is globally deemed an essential service, requiring us to maintain operations and minimize impact to our customers. Business continuity plans that include work-from-home and safe-distancing guidelines are in place. As of the time of this writing, we are very fortunate that all of our employees are safe and that we’ve seen only minimal impacts to our customer commitments. AEM has confined this impact by spreading operational risks across our facilities in Asia, Europe, the U.S. and divisions in Singapore, Malaysia, China, North America, Central America, Finland, France and Vietnam. All told, these facilities employ more than 550 people (Figure 1).Figure 1 – AEM Global Presence As a global leader, AEM offers application-specific intelligent system-level test and handling solutions for semiconductor and electronics companies that serve the advanced computing, 5G communications and artificial intelligence (AI) markets.Leveraging our decade of experience, the latest AMPS solutions provide asynchronous, modular, massively parallel and smart system-level testing to meet the new test challenges of complex ICs. The modularity and scalability of these systems enables customers to scale their existing engineering device validation solutions into high-volume, massively parallel production solutions that increase faults coverage, reduces time to market, and decreases cost of test and ownership (Figure 2).Figure 2 – AMPS System-Level Test Solution In meeting 5G infrastructure test needs, AEM developed a field-deployable fiber optics tester. Called WideOptix SR4, the system was initially developed in collaboration with a world leader to support the 5G fiber infrastructure deployment in China and has now been adopted for some Ethernet standards testing. With our WideOptix SR4 development, we cultivated Silicon Photonics (SiPh) testing expertise that complements our AMPS system-level test capability. As part of our business continuation and risk diversifications plan, we had also set up factories in Penang (5,200m2) and Suzhou (3,600m2). Penang’s rising influence in the Southeast Asia semiconductor industry has prompted AMM (AEM Malaysia) to expand its scope to include value-added services with a Center of SSD Excellence and Center of Photonic Excellence.ASZ (AEM Suzhou) will continue to focus on the domestic market in China for further expansion and penetration with products ranging from cost-sensitive testers to state-of-the-art test measurement instruments. In Europe, AEM is focused on wafer-level test and cost-effective ATE test solutions. Finland-based AFORE specializes in MEMS and application-specific wafer testing with the ability to add physical stimulus. The company's state-of-the-art instruments enable the testing of devices such as diced IMU’s (Inertia and Motion Units) in continuous rotation on a wafer mounting ring. Our process increased test throughput by 3X compared to the traditional pick-and-place methods (Figure 3).Figure 3 – Wafer-Level Test Throughput Advantage A specialist in application-specific wafer handling, AFORE developed its latest design to support quantum computing in collaboration with its partner BLUE FORS. The company’s probing equipment features a handling solution with temperature tolerances to 2K (-270’C) to support cryogenic testing (Figure 4).Figure 4 – Cryogenic Quantum Computing Probing Solution AFORE also gained critical insights into creating total darkness, enabling us to further explore opportunities for dark matter testing. AFORE is currently in talks with a member of the LUX Photonics Consortium funded by the National Research Foundation (Singapore) to provide a dark body testing environment and handling for its IR detectors.In Europe, our acquisition of Mu-TEST in France helps diversify our product and service offerings while spreading our business continuity risks. Mu-TEST enjoys collective test-development experience of more than 320 man-years thanks to various ATE suppliers including Schlumberger and Credence. To help combat rising costs of traditional ATE, Mu-TEST developed cost-effective solutions using FPGA-based instruments supported by a full suite of test development, debug and production test software with links to EDA and standard interfaces. This provides Mu-TEST an agile platform that can be easily re-configured for different customer needs.This Mu-Test acquisition expands AEM’s system-level testing capability to include Functional Test, allowing BIST, SCAN, JTAG to test structural failures and perform other application-level test that interface directly with the DUT using the EVM (Electronics Validation) boards to increase fault coverage within the same test environment. Mu-TEST has also enabled AEM to form the recent partnership with UTAC to develop a cost-effective CIS test solution that addresses UTAC’s test needs and complements its CIS advanced packaging solutions. Our U.S. headquarters based in Chandler, Arizona has expanded its capabilities to provide application engineering.In summary, AEM has been expanding its global footprint while managing risk and has been fortunate to be positioned to manage the recent COVID-19 excursions. While each geographical location specializes in core technologies, all sites have access to one another’s manufacturing facilities in times of need and a pool of IP available to address new opportunities. We believe this risk diversification positions us well to serve the needs and interests of our customers worldwide.Lo Wee Tick is Director, Business Development, and Stuart Pearce is Senior Director, Field Marketing, at AEM Holdings Ltd.
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