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SEMI spoke with Dr. Mikko Söderlund, sales director for Beneq’s semiconductor business, about trends in Atomic Layer Deposition (ALD) applications. Söderlund shared his views ahead of his presentation at SEMI MEMS Imaging Sensors Summit, 25-27 September, 2019, at the WTC in Grenoble, France. Join us at the event to meet Beneq and other key industry influencers. Registration is open.SEMI: The Backside Illuminated (BSI) CMOS Image Sensors (CIS) market continues to experience steady growth. Which applications are currently driving market growth?Söderlund: BSI CMOS Image Sensor market continues to be driven by mobile, security, automotive and Internet of Things (IoT) applications – so there seems to be plenty of opportunities for BSI CIS market to grow further.SEMI: What is critical for advanced thin-film deposition methods to extract best electrical performance?Söderlund: It is critical to control the material properties of the deposited layer (such as charge density, resistivity or barrier property) and of course, film uniformity and conformality. Furthermore, controlling material interfaces is also important, especially for sensitive III-V materials. {% video_player "embed_player" overrideable=False, type='scriptV4', hide_playlist=True, viral_sharing=False, embed_button=False, width='350', height='197', player_id='12721134435', style='margin: 0px auto; display: block; float: right; margin-left: auto; margin-right: auto; width: 350px;' %} Coatings and material features based on existing standard techniques can be very expensive, or not feasible at all. What does Atomic Layer Deposition (ALD), as a thin film coating method, offer in particular?Söderlund: ALD offers dense, highly conformal and pinhole-free best-in-class functional layers for dielectrics, passivation, encapsulation and much more. As a gentle and precise layer-by-layer method, ALD is extremely well-suited for deposition of such performance critical layers over large surface areas such as a cassette of wafers.SEMI: Please describe the Atomic Layer Deposition (ALD) coating process. Söderlund: ALD is based on a self-limiting surface reaction controlled thin film deposition. During coating, two or more chemical vapors or gaseous precursors react sequentially on the substrate surface, producing a solid thin film (see schematic below). Most ALD coating systems use a flow-through traveling wave setup, where an inert carrier gas flows through the system and precursors are injected as very short pulses into this carrier flow. The carrier gas flow takes the precursor pulses as sequential waves through the reaction chamber, followed by a pumping line, filtering systems and, eventually, a vacuum pump.SEMI: What are the two leading edge ALD applications?Söderlund: Today’s leading-edge ALD applications are in logic (high-k/metal gate, multiple patterning) and memory (DRAM capacitor, 3D NAND). Within the More-than-Moore (MtM) markets, CIS and MEMS (actuators and sensors, RF) have been early adopters of ALD, and we also see ALD being introduced in GaN Power and RF, as well as photonics.SEMI: Give us one prediction about the opportunities offered by advanced imaging applications.Söderlund: The large diversity of imaging applications will continue to drive growth and innovation. For example, machine vision is expected to transform the imaging landscape. We see this as a big opportunity for advanced thin-film deposition methods such as ALD, provided that the tools are versatile enough to address the diverse manufacturing requirements.SEMI: What are your expectations for SEMI MEMS Imaging Sensors Summit and why do you invite your peers to attend? Söderlund: The summit brings together all key RF stakeholders in the MEMS and imaging sensors industry, and we are looking forward to a great event. It’s a special event for us as we are officially launching a new ALD cluster tool product specifically engineered for the MtM applications – so this brings great excitement that we want to share with the attendees.Dr. Mikko Söderlund is Sales Director for Beneq’s semiconductor business. He has more than 20 years of experience in product development, product management, technical sales and business development across the photonics, OLED, and semiconductor industries. Mikko received his Ph.D. in Micro- and Nanotechnology from the Helsinki University of Technology. Serena Brischetto is a marketing and communications manager at SEMI Europe.
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This article is the fourth in a series highlighting the vital importance of SEMI Standards to commemorate the publication of the 1000th SEMI Standard in July 2019. Find the entire series here.Computer prices have plunged over the years even as desktop and laptop PC performance has skyrocketed thanks to the semiconductor industry, giving users much more bang for their buck. The chip industry stands in a stark contrast to healthcare and education with their exponentially rising costs.What distinguishes the semiconductor industry from healthcare and education in the capacity to deliver so much for so much less over time? After all, even in other parts of the technology sector that are heavily regulated, such as cable television, we have not witnessed the same price decreases as in microelectronics.Some pundits claim that the difference among sectors is tied to their degree of regulation. Does greater regulation somehow degrade product value? The reality is far more nuanced. But one thing is clear: Smart self-regulation (i.e. standards) in the semiconductor industry has contributed mightily to its success.The recipe for success has been simple. Standards have been rocket fuel for competition, which in turn has sparked innovation, driving down device prices while boosting performance. Computer prices fell dramatically between 1997-2015 while the cost of cable TV and internet services rose. Myth of unregulated competitionA semiconductor fab might actually be the most regulated place on earth. Fabs hew to a much higher standard of air quality and cleanliness than even uber-sterile hospital operating rooms. Manufacturing processes are voluntarily regulated not to millimeters, but to nanometers. While some standards are proprietary with limited reach, others span the supply chain. Regulation has worked so well in this sector that the semiconductor industry isn’t moving toward less standardization. It’s moving toward more. Secret is smart standards The gap between regulation and self-regulation is more like a chasm. We typically view regulation as a series of top-down directives that more often focus on the interests of the producer than the consumer. Healthcare regulation, for example, may improve quality of care, but it’s often insurers, big pharma and hospitals that benefit most from regulation, rather than consumers.The semiconductor industry, on the other hand, uses self-regulation to improve business operations and make better products for consumers. Falling prices and rising performance are natural byproducts.Semiconductor industry self-regulation is an ecosystem-wide effort, where input isn’t just top-down, but also bottom-up or even side-to-side. The first SEMI Standard, which specified wafer sizes, exemplifies this approach.The SEMI Standards Committee formed in 1973 to address silicon wafer dimensional specifications. At the time, wafer specifications proliferated. Numbering more than 2,000, the various specifications led to major inefficiencies just when the industry was just getting underway. Wafer suppliers banded together under SEMI to solve this problem and rapidly developed consensus specifications for 2- and 3-inch wafers. By the mid-1970s, over 80% of wafers conformed to these new standards.Standardized wafer sizes freed equipment companies to focus on innovations that reduced cost and increased performance. It also allowed manufacturers to focus on product differentiation without having to worry about device fabrication process and cost. Since that first SEMI Standard made possible the modern semiconductor equipment industry, original equipment manufacturers (OEMs) have competed to deliver amazing innovations. For example, lithography systems routinely use light to design chips with feature sizes smaller than the wavelength of light.SEMI’s 1000th standard on energetic materials demonstrates how smart standards are also pragmatic. This standard is not about banning materials or assigning blame when things go awry. It is about creating practical guidelines that companies will follow, enabling them to realize greater innovation. Guidelines that reduce accidents and risks will spur more, not less, energetic materials’ exploration. Industry suppliers will be the big winners.The 1st to the 1000th SEMI standard all represent examples of cooperation making more sense than competition.Standards for the real worldCreating a business-friendly standard that still gets the job done is a process. As SEMI Standards Task Force and Committee members, materials, equipment and manufacturing companies take part in defining best practice guidelines that support safe and practical use of materials and equipment. Task force and committee members assign particular responsibilities and associated costs to the most logical segments of the supply chain. They also develop information-sharing practices around competitive process recipes and purity standards.Andy McIntyre, CIH, a member of the energetic materials task force and an executive vice president and managing principal at BSI EHS Services and Solutions, summarized what makes SEMI standards smart.“SEMI standards are pragmatic,” said McIntyre. “They take into account the need for implementation in a real-world business environment. They embrace an engineering approach to problem-solving to create practical solutions, and they define specifications and performance goals in ways that allow engineers — in collaboration with EHS professionals — to identify practical solutions for reducing risk in R D, pilot line and manufacturing operations.“SEMI standards employ a holistic process that considers all the important points of view throughout the supply chain, from materials selection, installation, use, recycling and/or disposal,” said McIntyre. “The breadth of SEMI EHS Guidelines, for example, is also very comprehensive as the SEMI EHS Committee and task forces work to ensure that standards keep pace with dynamic technology developments. Energetic materials is a prime example where the industry recognized the need for a new safety guideline to document safe usage of pyrophoric, water-reactive and unstable reactive materials, which have become increasingly important in semiconductor and advanced materials R D and manufacturing.”This is the real secret to the success of the semiconductor industry. Smart self-regulation allows industry players to cooperate in the development and implementation of standards that are pragmatic, comprehensive and dynamic. Participants in SEMI Standards have a voice in the semiconductor industry because they are the voice of the semiconductor industry.While innovation in semiconductors may not always keep pace with Moore’s Law, we can depend on one truth: As long as collaboration and cooperation are the rule and not the exception, we will continue to advance technology in amazing and unprecedented ways. You, me and all other consumers will continue to reap the rewards of innovation. Use your voice to affect standardization in and around the semiconductor industry. Learn about SEMI Standards – and become part of the solution.Heidi Hoffman is senior director of technology communities marketing at SEMI. Hoffman and her team shine a spotlight on the work of the more than 20 technology communities under the SEMI electronics manufacturing supply chain collaboration platform. Actively engaging community members in marketing programs that showcase their unique value, Hoffman’s team helps companies to grow and prosper through the power of connection, collaboration and innovation.
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This article is the third in a series highlighting the vital importance of SEMI Standards to commemorate the publication of the 1000th SEMI Standard in July 2019. Find the entire series here.SEMI Standards are the bedrock of the modern microelectronics industry. Without standards for wafer dimensions – which SEMI Standards first defined through a collaborative process involving semiconductor manufacturers and wafer suppliers in 1972 – the semiconductor equipment industry as we know it would not exist today. The late Robert Noyce of Intel noted in this 1992 video “being good at producing semiconductors will mean we have better, more consistent, better controlled equipment than we have in the past. Standards are going to play a vital role in that. Standards saves money and time for everyone.” Noyce also called standards a bellwether to surges of innovation in critical process technology. This is still true today as, for example, important standards-setting activity is afoot in panel-level packaging, electron microscopy and energetic materials. Will a surge of innovation follow?Panel-level packaging: a chicken-egg scenarioFrom advanced materials to more efficient production tools, one hallmark of the microelectronics industry is our fearless exploration of new technologies that will spawn change across the industry by improving performance and reducing cost. Advanced packaging techniques, such as panel-level packaging (PLP) – which moves semiconductor packaging to a larger-panel format – is one of those critical catalysts. Citing PLP’s potential to shrink costs by improving efficiency and economies of scale, research firm Yole Développement predicts a remarkable 63% CAGR for PLP from 2017-2023.[i]It’s no stretch to say that we are close to realizing a burst of innovation in packaging. With a just-published SEMI Standard (SEMI 3D20) specifying panel sizes, equipment companies will find it economically viable to invest more in developing the much-needed production tools that enable PLP. “It is really important to create standards so we come together and work much more efficiently. Creating those fundamentals allows you to be more productive in the long term,” said Christina Chu, ASM Semiconductors, and co-leader of the Panel Level Packaging Task Force, and one of five industry leaders recognized for their outstanding accomplishments in developing SEMI Standards for the electronics and related industries at the recent 1000 SEMI Standards reception during SEMICON West 2019. “This effort came up from the trenches,” said Richard Allen, NIST Quantum Measurement Division, and a co-leader of both SEMI’s 3D Packaging and Integration Committee and its Panel Level Packaging Task Force. “Equipment vendors told us that they wanted to serve the market, but they couldn’t do so without some standards. To respond to their request, our committee surveyed the market and discovered at least 15 different panel sizes in development.”“As no vendor is going to make over a dozen unique tools for the same process, we worked with the manufacturers and tool companies to write a specification that standardizes on two of the most widely accepted sizes,” Allen said. “For the first time, the industry will have a real market for panel-level packaging tools, and that will spur commercialization of new technologies that never would have seen the light of the day without standardization.”Allen pointed out that evolution of standards in microelectronics reflects the dynamism of the microelectronics industry itself. “Given the rate of technology advancement in microelectronics, SEMI Standards committee and task force members know that a newly-published standard is often just a starting point, and change will likely follow,” he said. “The Panel Level Packaging Task Force, for example, is currently determining how to best support this packaging technology, whether through possible enhancements to 3D20 or by creating new PLP standards.”Process automation is key for TEMTransmission electron microscopy (TEM) is another area where industry cooperation will fuel progress.“People throw around the phrase ‘exponential growth,’” said James Amano, senior director, International Standards at SEMI. “It’s usually a gross exaggeration, but not when it comes to TEM data. That’s because demand for more TEM data, which uniquely enables innovations around smaller feature sizes, has exploded. At the same time, TEM data is a bottleneck in the fab. Operators literally use tweezers to carry around electron microscope samples by hand, and that is untenable.” TEM sampling standards are currently being formulated under the SEMI Standards development process. “Applying a model that we have employed successfully time and time again through SEMI Standards, we are gearing up for process automation in TEM,” Amano said. “We’ll start by establishing a grid carrier standard for electron microscopy. Through ongoing standards efforts, we may realize a fully automated TEM process within just a few years. That achievement will enable exponential growth in shrinking design geometries.”Energetic materials gain safety standardAlong with wafer-level packaging and design shrinks, the push for safety in materials’ usage is a hotbed of innovation. This is especially true with energetic materials, the potentially hazardous process chemicals used increasingly in semiconductor manufacturing to spur advances in materials purity, integrity and quality.“When you’re working with energetic materials, if you don’t get it right, you may face serious yield and cost issues, and most important of all, safety risks,” said Paul Trio, senior manager of strategic initiatives at SEMI. “This isn’t a theoretical concern. Real problems occurring in fabs have made an energetic-materials standard a high priority for the industry.”“After years of collaborating with companies across the supply chain to address this significant challenge, we recently published our 1000th SEMI Standard around safe usage of energetic materials,” Trio said. “Now manufacturers can turn to a new standard – which will evolve dynamically in response to industry changes – as they employ energetic materials in their quest to achieve higher yields while controlling costs and managing safety risks.” Whether it’s packaging, design shrinks, materials or other key innovations, standards are essential to progress in microelectronics. From equipment and materials suppliers that provide the most advanced, efficient and safest tools, materials, and processes to device manufacturers that get products to market, all stakeholders in the microelectronics ecosystem benefit from SEMI Standards. Are you curious about the areas of process technology where innovations are likely to occur? Would you like to get involved in standards efforts that could have an impact on your business? Take a look at the activity of SEMI Standards Committees and Task Forces. Because that’s where innovation, pragmatism and a commitment to harness industry resources come together.Use your voice to affect standardization in and around the microelectronics industry. Learn about SEMI Standards – and become part of the solution. Heidi Hoffman is senior director of technology communities marketing at SEMI. Hoffman and her team shine a spotlight on the work of the more than 20 technology communities under the SEMI electronics manufacturing supply chain collaboration platform. Actively engaging community members in marketing programs that showcase their unique value, Hoffman’s team helps companies to grow and prosper through the power of connection, collaboration and innovation. [i] Status of Panel Level Packaging report, Yole Développement, 2018
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Tracking toward even stronger growth than forecast last year, 200mm fabs worldwide are gearing up to add more than 600,000 wafers per month from 2017 through 2022, an 11 percent growth rate that will lead to a new high of 6 million wafers per month by the end of 2022, according to the SEMI Industry Research and Statistics group in its fourth update of the Global 200mm Fab Outlook report. See chart below. All told, 56 older and newer facilities will add capacity, with the MEMS, power, logic and foundry segments contributing the most. To help meet rising demand, new fabs are under construction. Only six facilities plan to reduce capacity. The global 200mm fab count will increase from the 2017 level of the 194 fabs covered in the report to 203 by 2022. See chart. During the five-year forecast period, China, at 44 percent, is expected to account for the greatest growth, followed by Southeast Asia (19 percent), Taiwan (10 percent) and the Americas (8 percent). However, with strong demand for new 200mm fab equipment, the used 200mm fab equipment market has pretty much dried up. What’s more, the availability of key tools and spare parts has become a primary concern for many device makers. These headwinds notwithstanding, many companies remain bullish with plans to add more capacity. The forecast growth of 600,000 wafers per month may ultimately be a conservative estimate. SEMI’s Global 200mm Fab Outlook report lists more than 300 facilities and lines managed by more than 150 companies, providing details on product type, investment, technology and capacity plans by companies and fabs. The fourth update of the Global 200mm Fab Outlook report covers data and predictions from 2011 through the end of 2022, including milestones, detailed investments by quarter, product types, technology nodes and capacities down to fab and project level. Click here for the Global 200mm Fab Outlook Sample Report. Learn more about other SEMI fab databases at www.semi.org/en/MarketInfo/FabDatabase. Christian G. Dieseldorff is director of Industry Research and Statistics, SEMI, Milpitas, California.
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What’s next for smarter, more connected electronics manufacturing - Part 3 The fast-maturing infrastructure now enabling analysis of exponentially larger data volumes brings the microelectronics industry to an inflection point, where the winning companies will be the first to master the use of this data to solve the industry’s emerging challenges. SEMI expands its coverage of these vital issues with a Smart Manufacturing Pavilion and three days of talks SEMICON West, July 10-12 in San Francisco. While deep learning is starting to be applied to image recognition for wafer inspection, it is also being considered for sequential pattern recognition in order to evaluate equipment parameter traces. The next emerging applications will start to use those learned patterns to predict outcomes, and then use those predictions to automate process control. One early application of deep learning is IC process development. “People don’t think of research and development as the first place to automate, but it’s where applying our digitization and simulation has first had impact,” says David Fried, Coventor vice president of Computational Products. He noted that insertion is easier in the lab than in the fab. Technology at 10nm and beyond is now so complex that companies at the leading edge must use process modeling to understand the effect of process variation on their designs. Learning cycles can now be accelerated during development by simulating 10,000 digital wafers instead of running 25 actual wafers during screening, Fried says. Applying structured analysis and machine learning to the data simplifies optimization across the 500 or more interrelated process steps. Coventor has recently introduced a statistical analysis package that aids the design and analysis of process variation experiments by using large volumes of data from its models. Fried says these models are next being used to accelerate the yield ramp in manufacturing. Digital simulation also could speed development of high-mix, lower value products While digital twins are best known for their use in complex, high value products like jet engines, the simulation technology could also enable the electronic manufacturing services (EMS) sector to reduce the time, cost and risk of developing its high mix of products. “The EMS sector’s use of digital twins will be vital for it to smooth the move of CAD/CAM digital design data for so many different products into manufacturing, and to accelerate validation testing of designs and products by doing more of it in the virtual world,” says Dan Gamota, vice president of Engineering and Technical Services at Jabil. Gamota also highlights the push for traceability from the automotive and healthcare markets, where the digital models could be used to quickly assure that the design was built exactly as specified. “In the past year, traceability has evolved from just ‘nice to have’ to ‘how to achieve,’” he adds. “Companies are expecting it, but aren’t willing to accept the cost and risk of doing it alone. We need the community to discuss realistic implementations, identify the most critical elements and bring together the ecosystem partners to build baseline reference architectures for key digital building blocks. The community also needs to assure the reliable flow of data among the electronic manufacturing segments from semiconductor to OSAT to EMS.” Predictive maintenance and virtual metrology applications could mature in next few years While predictive maintenance initially seemed a likely early application of machine learning in factories, it remains a challenge for the electronics sector. “The difficulty is that it’s not clear where to get the most bang for the buck,” says Tom Ho, president of BISTel America, noting that it may make the most sense to track the failure performance of a single expensive part, like an electrostatic chuck, since predicting the failure performance of a whole complex system like an etcher is much harder. “Collecting enough data from all failure types, including especially the rare events, is difficult unless you have a long history of a lot of tools,” adds Doug Suerich, PEER Group product evangelist. “The gain from collecting performance information from many tools across the industry could be big, but many companies still need to overcome concerns around exposing their IP.” Another big opportunity for prediction is virtual metrology – predicting the wafer outcome from the process or sensor data with enough accuracy to replace the physical metrology. “Virtual metrology is improving, and since metrology can be slow and expensive, any reduction could mean a huge potential savings,” says Suerich. “But it is still seen as too scary for many companies. Two to three years from now, companies will expand the practice from lower risk areas into processes that require more confidence in the results.” Moving beyond prediction to automated control needs digital models Once the results are predicted, the model can be used to control or automatically optimize a process and enable the system to learn by itself, usually by reinforcement learning on a digital model. The model can then independently make adjustments to optimize the manufacturing process. “Automated process development is getting close now. Instead of smart guys turning the knobs, deep learning is automating the smart tuning,” says Suerich, suggesting the industry could see widespread adoption in as little as two to three years. This type of machine learning needs a good digital model, and masses of data for learning. One approach uses human experts to build a physics-based model of the clearly understood parts of the process, then turns to deep machine learning to optimize the lesser-understood variables. The alternative, the data-first approach, runs a computer algorithm to suggest the solution purely from data, without human input, and then relies on the human to evaluate the usefulness of the results. Modeling digital twins of wafers could enable automated process control, chamber matching, and fleet matching, says Fried. If every wafer had its own virtual twin with all the upstream metrology and structural information needed to make equipment control decisions, it could feed forward that information to enable the seamless transition from one step in the process to another based on understanding their complex interrelationships. This could potentially improve uniformity across wafers and equipment, and reduce the need for metrology, he argues. Moving metrology sensors into the chamber will also require model-based algorithms to enable dynamic process control in close to real time, says Fried. These algorithms will be needed to acquire, parse, and process the data at high speed, and then to choose how to adjust the controls. “There will be a model behind collecting and interpreting the metrology data,” he notes. “That’s a really rich vein for improvements in process control.” “The end goal is to collect equipment data in real time, analyze it with AI, and send back controls to optimize manufacturing processes,” Jabil’s Gamota says. “This requires a robust architecture for communication between equipment and consistent formats for data collection and analysis. But the cost and complexity of this heavy lifting is too great for any one company to do alone. We need a consensus-based architecture for ingesting, analyzing and acting on the data.” SEMI tests data transfer protocols, benchmarks best practices SEMI is launching a smart data project to identify the various data transfer protocols needed for inter-company communications. The project will feature a proof-of-concept model in a development fab to produce verifiable results so SEMI can better understand how different approaches meet member needs. SEMI’s smart manufacturing technology communities and the Fab Owners Alliance are also benchmarking current smart manufacturing practices in the microelectronics industry to help SEMI members better understand the path forward and potential return on investment. Speakers over all three days at SEMICON West addressing these issues include Active Layer Parametrics, Applied Materials, Applied Research Photonics, ASML, Bosch Rexroth, Cimetrix, Coventor, ECI Technologies, Edwards Vacuum, Final Phase Systems, GE Digital, Infineon, Jabil, Lam Research, Osaro, Otosense, PEER Group, Qualcomm, Rockwell Automation, Rudolph Technologies, Schneider Electric, Seagate, Siemens, Stanford University, TEL, TIBCO Software. See semiconwest.org. What’s next for smarter, more connected electronics manufacturing - Part 1 What’s next for smarter, more connected electronics manufacturing - Part 2 Paula Doe, SEMI
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