Paula Doe

New metrology and inspection technologies and new analysis approaches made possible by improving compute technology offer solutions to finding the increasingly subtle variations in materials and subsystems that meet specifications but still cause defects on the wafer. More collaboration across the supply chain is helping too. SEMICON West programs on materials and subsystems will address these issues. New metrology approaches needed to deal with process margin challenges As device process margins shrink and subtler materials variations cause unwanted deviations, the need for better monitoring of both surface and sub-surface material variations is driving a trend towards “metro-spection” – the convergence of metrology and inspection. “Device process margins have eroded to the point that traditional metrology strategies and techniques are no longer viable for controlling yield and parametric performance,” says Nanometrics Vice President Robert Fiordalice, who will speak in the materials program at SEMICON West. “Limited sampling capability, low throughput, insufficient sensitivity or the destructive nature of the techniques can often become problems. What’s more, deviations in material characteristics are not always determined by the initial quality of the material, but often arise from variations during the integration of the materials.” One new type of inline tool or line monitoring technology is Fourier Transform Infrared (FTIR) spectroscopy, traditionally used in quality control or tool characterization. Better sensitivity and higher throughput now enable rapid analysis and feedback for on-the-fly detection of subtle deviations in film properties that may compromise device performance or yield. More advanced analytics will help extract new information from old metrologyMore expensive metrology may not be required to identify subtle variations in in-spec materials that cause wafer defects. Today’s advanced compute capabilities now enable more sophisticated analysis of existing data and the identification of small but significant variations in raw materials and finished goods. The figure of merit (FoM) values presented in certificate of analysis (CoA) reports miss subtle variations in raw material properties. Of particular note is the reduction of molecular weight distributions to a mean, and standard deviation, whereas variations in the tails are associated with pattern defects. Advanced compute capabilities now allow the industry to step beyond the FoM in favor of more holistic measures, enabling predictive analysis of resist chemical variations associated with specific pattern defects. Source: JSR Micro“We often don’t need to find a new measure, but just a new way of looking at what we measure now,” says Jim Mulready, vice president of global quality assurance at JSR Micro. Mulready will speak in the SEMICON West program on materials defectivity issues. “The certificate of analysis reduces multiple measurements to a single figure of merit. But if we ignore all that raw data, we miss a chance to learn. One of our sayings in quality is ‘Customers don’t feel the average, they feel the variation.’ In many electronic materials, the quality of the raw material can have a big impact on the final performance, but the types of analysis needed to look at the tails of the distribution of these measures (such as molecular weight) in detail used to be really hard to do. Now it’s becoming increasingly straightforward and affordable.” Mulready says tools now available in the data processing sector enable the identification of subtle variations in materials that can cause defects on the wafer. These tools use methods like detailed subtractions of chromatography curves of polymer raw materials or analysis of tails of distributions of molecular weights. “Our job now is to drive these kinds of more sophisticated data analysis back into our chemical supply chain as well,” says Mulready. “We must work more closely with our suppliers to integrate their raw materials into our products. The reason the JSRs of the world exist is as a safety valve to reduce the variation from the chemical industry before it gets to the fab.”Continued collaboration with equipment suppliers required While the industry has been talking about the need for tighter collaboration between materials suppliers and equipment manufacturers for years, it still doesn’t always happen. “The material supplier and the equipment maker are tied together like kids in a three-legged race when we deliver an integrated system for consistent on-wafer performance,” says Cristina Chu, TEL/NEXX director of strategic business development, another speaker in the materials program. “When we introduce changes to the tool hardware, we need to make sure it doesn’t upset the system. Similarly, we need the material supplier to send a bottle over when a new chemistry formulation is under development. If a new chemistry runs into problems in the field, it will take much more time for both of us to fix it at the customer site. The toolmaker can provide a slightly different perspective on applications, while being more objective than a customer on how the formulation performs compared to earlier versions.”Regular and ongoing collaboration between chemistry suppliers and toolmakers enables the highest quality system solution to reach the customer. Chu notes that her team tries to maintain consistent collaborations with material suppliers across changes in organizations as the business environment changes. “For consistent on-wafer capabilities, we need a consistent collaboration process with chemistry suppliers. We need to meet with materials providers at a regular cadence throughout their development process. We need to check back with them as we scale up results from the coupon to the wafer level and to work out the kinks in the integrated solution together. The quality and consistency of our combined performance at the customer depends on ensuring the quality and consistency of our development and evaluation process as well.”Fabs and subsystems suppliers look to pilot data sharing program to improve process margins With ever tighter process margins, subtle variations in parameters that don’t appear in the specifications are also compromising results on the wafer, and neither the fab nor the supplier alone has the full information needed to improve performance. To help, a SEMI standards group is developing a protocol for a pilot program to standardize and automate some data sharing.The fab knows that performance is best with a particular parameter value, and knows when performance fluctuates, but often faces a black box problem with no way of knowing what exactly is wrong. In the rush to get the tool back up, the fab engineers may not get around to emailing the supplier about the issue for some time. The subsystems supplier, on the other hand, may know the cause of the variation, but likely has no way of knowing the critical parameters or ideal target values for the fab’s process. “In order for engineers to have constructive conversations about how to improve performance, we all need to exchange more information,” says Eric Bruce, Samsung Austin diffusion engineer, and co-chair of the SEMI Standards initiative addressing the issue, who will speak in the subsystems program at SEMICON West. A potential solution could be to create a standard and automated process to share particular data, agreed to in the purchasing contract, whereby the subsystems supplier shares more information about their parameters with the fab, and the fab in return gives feedback on what parameters work best to drive improved performance. The best place to start will likely be on parts that do not contain core yield-related IP, but where usage and lifetime information is useful.“We’re looking for people to participate in a pilot program to work together with suppliers to try sharing some information to improve performance,” says Bruce. “There’s a lot of this sharing in the backroom anyway, but this could make it fast and automated, and make everyone’s engineering job a lot easier.”Paula Doe, SEMI

For medtech applications to flourish, sensors need a supporting infrastructure that translates the data they harvest into actionable insights, says Qualcomm Life director of business development Gene Dantsker, who will speak about the future of digital healthcare in the Medtech program at SEMICON West. “Rarely can one device give a complete diagnosis,” he notes. “What’s missing is the integration of all the sensor data into prescriptive information.” The maturing medtech sector has developed to the point where sensors can now capture massive amounts of data, conveniently collected from people via mobile devices. The sector now has higher compute capacity to process the data, and improving software can produce actionable insight from the information. The next challenge is to seamlessly integrate these components into legacy medical systems without disrupting existing workflow. “Doctors and nurses don’t have time for disruptive technology – a new system has to be invisible and frictionless to use, with one or fewer buttons, no training and truly automatic Bluetooth-like pairing,” he says. “So device makers need to pack all system intelligence into the circuits and software.”Getting actionable healthcare information from sensors requires integration into the existing medical infrastructure. Source: Qualcomm LifeOne interesting example is United Healthcare’s use of the Qualcomm Life infrastructure to collect data from the fitness trackers of 350,000 patients. The insurance company then pays users $4 a day, or ~$1500 a year, for standing, walking six times a day and other behaviors that clinical evidence shows will both improve patient health and reduce healthcare costs. “It’s a perfect storm of motivations for all stakeholders,” he says.Next hot MEMS topics: Piezoelectric devices, environmental sensors, near-zero power standbyWith sensor technology continuing to evolve, look for coming innovations in MEMS in piezoelectric devices, environmental sensors and near zero-power standby devices, says Alissa Fitzgerald, Founder and Managing Member of A.M. Fitzgerald and Associates, who will provide an update on emerging sensor technologies in the MEMS program at SEMICON West.Piezoelectric devices can potentially be more stable and perhaps even easier to ramp to volume than capacitive ones, with AlN devices for microphones and ultrasonic sensors finding quick success. Now the maturing infrastructure for lead zirconate titantate (PZT) is enabling the scaling of production of higher performing piezo material with thin film deposition equipment from suppliers like Ulvac Technologies and Solmates and in foundry processes at Silex and STMicroelectronics, she notes.In academic research, where most new MEMS emerge, market interest is driving development of environmental sensors and zero-power standby devices. With demand for environmental monitoring growing, much work is focusing on technologies that improve the sensitivity, selectivity and time of response of gas and particulate sensors. Research and funding is also focusing on zero or near-zero power standby sensors, using open circuits that draw no power until a physical stimulus such as vibration or heat wakes them up.MEMS, however, likely won’t find as much of a market in autonomous vehicles as once thought. “While the automotive sensor market will need many optical sensors, MEMS players are competing with other optical and mechanical solutions,” says Fitzgerald. “And here the usual MEMS advantage of small size may not matter much, and the devices will have to meet the challenging automotive requirements for extreme ruggedness.”Paula Doe, SEMI

What’s next for smarter, more connected electronics manufacturing - Part 3 The fast-maturing infrastructure now enabling analysis of exponentially larger data volumes brings the microelectronics industry to an inflection point, where the winning companies will be the first to master the use of this data to solve the industry’s emerging challenges. SEMI expands its coverage of these vital issues with a Smart Manufacturing Pavilion and three days of talks SEMICON West, July 10-12 in San Francisco. While deep learning is starting to be applied to image recognition for wafer inspection, it is also being considered for sequential pattern recognition in order to evaluate equipment parameter traces. The next emerging applications will start to use those learned patterns to predict outcomes, and then use those predictions to automate process control. One early application of deep learning is IC process development. “People don’t think of research and development as the first place to automate, but it’s where applying our digitization and simulation has first had impact,” says David Fried, Coventor vice president of Computational Products. He noted that insertion is easier in the lab than in the fab. Technology at 10nm and beyond is now so complex that companies at the leading edge must use process modeling to understand the effect of process variation on their designs. Learning cycles can now be accelerated during development by simulating 10,000 digital wafers instead of running 25 actual wafers during screening, Fried says. Applying structured analysis and machine learning to the data simplifies optimization across the 500 or more interrelated process steps. Coventor has recently introduced a statistical analysis package that aids the design and analysis of process variation experiments by using large volumes of data from its models. Fried says these models are next being used to accelerate the yield ramp in manufacturing. Digital simulation also could speed development of high-mix, lower value products While digital twins are best known for their use in complex, high value products like jet engines, the simulation technology could also enable the electronic manufacturing services (EMS) sector to reduce the time, cost and risk of developing its high mix of products. “The EMS sector’s use of digital twins will be vital for it to smooth the move of CAD/CAM digital design data for so many different products into manufacturing, and to accelerate validation testing of designs and products by doing more of it in the virtual world,” says Dan Gamota, vice president of Engineering and Technical Services at Jabil. Gamota also highlights the push for traceability from the automotive and healthcare markets, where the digital models could be used to quickly assure that the design was built exactly as specified. “In the past year, traceability has evolved from just ‘nice to have’ to ‘how to achieve,’” he adds. “Companies are expecting it, but aren’t willing to accept the cost and risk of doing it alone. We need the community to discuss realistic implementations, identify the most critical elements and bring together the ecosystem partners to build baseline reference architectures for key digital building blocks. The community also needs to assure the reliable flow of data among the electronic manufacturing segments from semiconductor to OSAT to EMS.” Predictive maintenance and virtual metrology applications could mature in next few years While predictive maintenance initially seemed a likely early application of machine learning in factories, it remains a challenge for the electronics sector. “The difficulty is that it’s not clear where to get the most bang for the buck,” says Tom Ho, president of BISTel America, noting that it may make the most sense to track the failure performance of a single expensive part, like an electrostatic chuck, since predicting the failure performance of a whole complex system like an etcher is much harder. “Collecting enough data from all failure types, including especially the rare events, is difficult unless you have a long history of a lot of tools,” adds Doug Suerich, PEER Group product evangelist. “The gain from collecting performance information from many tools across the industry could be big, but many companies still need to overcome concerns around exposing their IP.” Another big opportunity for prediction is virtual metrology – predicting the wafer outcome from the process or sensor data with enough accuracy to replace the physical metrology. “Virtual metrology is improving, and since metrology can be slow and expensive, any reduction could mean a huge potential savings,” says Suerich. “But it is still seen as too scary for many companies. Two to three years from now, companies will expand the practice from lower risk areas into processes that require more confidence in the results.” Moving beyond prediction to automated control needs digital models Once the results are predicted, the model can be used to control or automatically optimize a process and enable the system to learn by itself, usually by reinforcement learning on a digital model. The model can then independently make adjustments to optimize the manufacturing process. “Automated process development is getting close now. Instead of smart guys turning the knobs, deep learning is automating the smart tuning,” says Suerich, suggesting the industry could see widespread adoption in as little as two to three years. This type of machine learning needs a good digital model, and masses of data for learning. One approach uses human experts to build a physics-based model of the clearly understood parts of the process, then turns to deep machine learning to optimize the lesser-understood variables. The alternative, the data-first approach, runs a computer algorithm to suggest the solution purely from data, without human input, and then relies on the human to evaluate the usefulness of the results. Modeling digital twins of wafers could enable automated process control, chamber matching, and fleet matching, says Fried. If every wafer had its own virtual twin with all the upstream metrology and structural information needed to make equipment control decisions, it could feed forward that information to enable the seamless transition from one step in the process to another based on understanding their complex interrelationships. This could potentially improve uniformity across wafers and equipment, and reduce the need for metrology, he argues. Moving metrology sensors into the chamber will also require model-based algorithms to enable dynamic process control in close to real time, says Fried. These algorithms will be needed to acquire, parse, and process the data at high speed, and then to choose how to adjust the controls. “There will be a model behind collecting and interpreting the metrology data,” he notes. “That’s a really rich vein for improvements in process control.” “The end goal is to collect equipment data in real time, analyze it with AI, and send back controls to optimize manufacturing processes,” Jabil’s Gamota says. “This requires a robust architecture for communication between equipment and consistent formats for data collection and analysis. But the cost and complexity of this heavy lifting is too great for any one company to do alone. We need a consensus-based architecture for ingesting, analyzing and acting on the data.” SEMI tests data transfer protocols, benchmarks best practices SEMI is launching a smart data project to identify the various data transfer protocols needed for inter-company communications. The project will feature a proof-of-concept model in a development fab to produce verifiable results so SEMI can better understand how different approaches meet member needs. SEMI’s smart manufacturing technology communities and the Fab Owners Alliance are also benchmarking current smart manufacturing practices in the microelectronics industry to help SEMI members better understand the path forward and potential return on investment. Speakers over all three days at SEMICON West addressing these issues include Active Layer Parametrics, Applied Materials, Applied Research Photonics, ASML, Bosch Rexroth, Cimetrix, Coventor, ECI Technologies, Edwards Vacuum, Final Phase Systems, GE Digital, Infineon, Jabil, Lam Research, Osaro, Otosense, PEER Group, Qualcomm, Rockwell Automation, Rudolph Technologies, Schneider Electric, Seagate, Siemens, Stanford University, TEL, TIBCO Software. See semiconwest.org. What’s next for smarter, more connected electronics manufacturing - Part 1 What’s next for smarter, more connected electronics manufacturing - Part 2 Paula Doe, SEMI

With artificial intelligence (AI) rapidly evolving, look for applications like voice recognition and image recognition to get more efficient, more affordable, and far more common in a variety of products over the next few years. This growth in applications will drive demand for new architectures that deliver the higher performance and lower power consumption required for widespread AI adoption. “The challenge for AI at the edge is to optimize the whole system-on-a-chip architecture and its components, all the way to semiconductor technology IP blocks, to process complex AI workloads quickly and at low power,” says Qualcomm Technologies Senior Director of Engineering Evgeni Gousev, who will provide an update on the progress of AI at the edge in a Data and AI program at SEMICON West, July 10-12 in San Francisco. Qualcomm Snapdragon 845 uses heterogeneous computing across the CPU, GPU, and DSP for power-efficient processing for constantly evolving AI models. Source: QualcommA system approach that optimizes across hardware, software, and algorithms is necessary to deliver the ultra-low power – to a sub 1-milliwatt level, low enough to enable always-on machine vision processing – for the usually energy-intensive AI computing. From the chip architecture perspective, processing AI workloads with the most appropriate engine, such as the CPU, GPU, and DSP with dedicated hardware acceleration, provides the best power efficiency – and flexibility for dealing with rapidly changing AI models and growing diversity of applications.“So far it’s been largely a brute force approach using conventional architectures and cloud-based infrastructure,” says Evgeni. “But we’re going to run out of brute force options, so future opportunities lie in developing innovative architectures, dedicated hardware, new algorithms, and new software. Innovation will be especially important for AI at the edge and applications requiring always-on functionality. Training is mostly in the cloud now, but in the near future it will start migrating to the device as the algorithms and hardware improve. AI at the edge will also remove some privacy concerns, an increasingly important issue for data collection and management.”Practical AI applications at the edge where resources are constrained run the gamut, spanning smartphones, drones, autonomous vehicles, virtual reality, augmented reality and smart home solutions such as connected cameras. “More AI on the edge will create a huge opportunity for the whole ecosystem – chip designers, semiconductor and device manufacturers, applications developers, and data and service providers. And it’s going to make a significant impact on the way we work, live, and interact with the world around us,” Evgeni said.Future generations of chips may need more disruptive systems-level change to handle high data volumes with low power A next-generation solution for handling the massive proliferation of AI data could be a nanotechnology system, such as the collaborative N3XT (Nano-Engineered Computing Systems Technology) project, led by H.S. Philip Wong and Subhasish Mitra at Stanford. “Even with next-generation scaling of transistors and new memory chips, the bottlenecks in moving data in and out of memory for processing will remain,” says Mitra, another speaker in the SEMICON West program. “The true benefits of nanotechnology will only come from new architectures enabled by nanosystems. One thing we are certain of is that massively more capable and more energy-efficient systems will be necessary for almost any future application, so we will need to think about system-level improvements.” Major improvement in handling high volumes of data with low high energy use will require system-level improvements, such as monolithic 3D integration of carbon nanotube transistors in the multi-campus N3XT chip research effort. Source: Stanford UniversityThat means carbon nanotube transistors for logic, high density non-volatile MRAM and ReRAM for memory, fine-grained monolithic 3D for integration, new architectures for computation immersed in memory, and new materials for heat removal. “The N3XT approach is key for the 1000X energy efficiency needed,” says Mitra.Researchers have demonstrated improvements in all these areas, including multiple hardware nanosystem prototypes targeting AI applications. The researchers have transferred multiple layers of as-grown carbon nanotubes to the target wafer to significantly improve CNT density and have also developed a low-power TiN/HfOx/Pt ReRAM. The low-temperature CNT and ReRAM processes enable multiple vertical layers to be grown on top of one another for ultra-dense and fine-grained monolithic 3D integration. Other speakers at the Data and AI TechXpot include Fram Akiki, VP Electronics, Siemens; Hariharan Ananthanarayanan, motion planning engineer, Osaro; and David Haynes, Sr. director, strategic marketing, Lam Research. See SEMICONWest.org.Paula Doe, SEMI

What’s next for smarter, more connected electronics manufacturing - Part 2The fast-maturing infrastructure now enabling applications for big data and artificial intelligence means disruptive change not just at individual companies but also in data connections among companies across the microelectronics manufacturing value chain. SEMI checked in with some leading players on the changes they see coming in the next several years for this article series. The trade group is expanding its programming on smart manufacturing to address these industry-wide developments at SEMICON West, July 10-12 in San Francisco.“The ramp of EUV, and the smaller geometries and smaller process margins, will drive an exponential increase in the amount of metrology data to manage,” says Neal Callan, ASML vice president, Silicon Valley. Callan notes that moving to multibeam e-beam inspection will increase data volume from megabytes per second to gigabytes per second and from thousands of data points to millions of data points. “The process is so tight and the margin so small that stochastic variation, or noise, becomes more dominant – at least it’s noise until we can learn to understand and control it. And understanding and controlling this variation will be key to delivering 5nm patterning,” he says.Single-beam e-beam inspection is already driving large increases in data as engineers extend the slow technology to broad, high-speed defect metrology applications by more intelligently instructing the system where to look for problems. Callan says ASML is now using the scanner data on wafer focus, alignment and leveling. The company is also using the computational lithography model from the design to identify the smallest process windows in the pattern that are most likely to see problems. The model then quantifies the number and significance of those instances.“The collection of all this diverse data means that tools will need to be plug-and-play so all tool data is instantly available to all systems and software,” says Doug Suerich, PEER Group product evangelist. “We need tools that can be discovered automatically by the network so it can start slurping up data immediately. The adoption of the Interface A (EDA) standard is accelerating and fabs are starting to ask for it. The proliferation of sensors also needs to self-discover. If you are going to add thousands of new sensors into a facility, you can’t afford a time-consuming integration process.”“We are now seeing that engineers are greedy for more data – if they can get the data, it’s becoming a need-to-have,” adds Tom Ho, BISTel America president. “Getting more data from more sensors, from the sensors on the tool that are not being fully utilized, and from untapped data sources like vibration is another big coming opportunity.” Process complexity drives demand for feed-forward between silos with computational models ASML co-optimizes its scanner process with etch and reticle process steps. Source: ASML In addition to the drive for trace-back of data, the increasing complexity of interrelated processes is also driving demand for feed-forward of data. “Feed-forward is becoming more important,” notes Ho. He points to the example of 3D NAND features, now getting so deep that identifying the layer being measured is a challenge unless the signal at the step before can be recognized. “We need partnerships with our peers to understand how to take advantage of the sensors they use, integrate them with our data, and then feed-forward corrections to the other systems,” concurs Callan. “To drive the best CD uniformity and overlay, we need to co-optimize litho and etch,” agrees Henk Niesing, ASML director of product management. He notes that the company is working with etcher makers to measure the overlay and CD, decompose the finger prints, and then use models to steer automated control that best adjusts both the scanner and the etcher. ASML is also working with Zeiss on co-optimization between the scanner and the reticle to make even higher-order corrections by locally modifying the reticle.These higher-order corrections, applied on each exposed field, drive the need for even more data, and at higher speed but without higher cost, notes Jan Mulkens, ASML senior fellow. These corrections increase demand for computational metrology, which combines various metrology sources with physics and deep learning models trained on real data to predict and control process results in real time. “We’re working on computational metrology to ideally use all the knobs we have in the fab,” he says. So far this effort has largely involved linking data between two companies. More consistent data formats would enable data exchange to be extended to more companies. “The software versions also need to be managed for upgrades so they still match after one party updates the system on its tool,” notes Niesing. Speakers on these issues of smart manufacturing and data handling at SEMICON West include Active Layer Parametrics, Applied Materials, Applied Research Photonics, ASML, Cimetrix, Coventor, ECI Technologies, Edwards Vacuum, Final Phase Systems, GE Digital, Infineon, Jabil, Lam Research, Osaro, Otosense, PEER Group, Rockwell Automation, Rudolph Technologies, Schneider Electric, Seagate, Seimens, Stanford University, TEL, TIBCO Software. See semiconwest.org.What’s next for smarter, more connected electronics manufacturing - Part 1What’s next for smarter, more connected electronics manufacturing - Part 3Paul Doe, SEMI

What’s next for smarter, more connected electronics manufacturing - Part 1The fast-maturing infrastructure now enabling applications for big data and artificial intelligence means disruptive change not just at individual companies but also in data connections among companies across the microelectronics manufacturing value chain. SEMI expands its smart manufacturing program with a Smart Manufacturing Pavilion with displays and three full days of talks to address these industry-wide developments at SEMICON West, July 10-12 in San Francisco.Autonomous autos’ demand for zero-defect systems and 100 percent traceability back to the manufacturing data for each die is driving a push to traceability across the chip sector. “Far more chips are being used by the automotive sector, and its very different requirements are driving demand for traceability,” says Tom Ho, president of BISTel America. “Our chipmaker customers are looking for traceability solutions and the trend is the same in backend packaging and assembly – automotive applications are driving the sector to traceability.”Traceability is also driven by the growth of systems in a package as fabless chipmakers look to connect back to the packaging companies’ fault analysis labs and die interconnect history to diagnose and fix the cases where known-good die are failing in the system, adds Mike Plisinski, CEO of Rudolph Technologies. Plisinski adds that makers of consumer products like phones that can also see harsh conditions are demanding higher quality and traceability as well. The electronic manufacturing services (EMS) sector also must establish an architecture for traceability to collect critical manufacturing-related data and to interface with OSATs and semiconductor fabs. The reason is that EMS companies are adding traditional OSAT processes such as assembly of products with bare die and complex optics modules requiring clean rooms. “A unified sand-to-smart-phone smart manufacturing roadmap should be established,” says Dan Gamota, vice president of Engineering and Technology Services at Jabil. “We need to identify protocols for manufacturing data communications that can be adopted across the supply chain.”To enable smart manufacturing, vendors need to collaborate on getting their production equipment to interoperate and support factory analytics and data management systems. Source: SEMI One big challenge, of course, is how to format this diverse data so it can be linked and used by various supply chain stakeholders. “Smart data needs to be contextual and it needs data standards across the supply chain so it’s easy to link from the front end to the back end, follow common lot IDs front and back end, and have a way to map streaming data from sensors to a discrete lot ID,” notes Ho. New approaches to metrology, analysis and test that increasingly exploit machine learning on simulations will also be needed to help predict which die and connections that test well now may fail in the future as conditions change.Another issue is how to securely share the needed data across companies without jeopardizing IP. “On the equipment side we collect data across customers on how the tool is running to improve the equipment,” notes Neal Callan, ASML VP Silicon Valley. “Next we need to integrate performance and reliability data that today is not as well shared.”The other big hurdle is how to pay for data sharing. “The challenge is that the final manufacturers reap the benefit of traceability, but since they expect their suppliers to deliver good die, they don’t want to pay more for it,” notes Plisinski. He suggests that over the next two to three years, traceability and predictive fault prevention will become the norm as the automotive sector is compelled to invest in it to assure safety. Meanwhile, fabless companies will face so much complexity in integrating different die from different suppliers in SiP that they will no longer be able to afford to simply use the cheapest supplier, potentially driving a fundamental shift in relations and division of labor among fabless chipmakers, OSATs and fabs. Standards extend across supply chainSEMI member committees are collaborating to build the infrastructure to enable these developments. Standards committees are updating standards for higher bandwidth data exchange and extending semiconductor-like vertical and two-way horizontal equipment communication standards to flow shops to enable assembly players to optimize and trace back results across players. The SMT/PCBA community is integrating its smart manufacturing work into SEMI standards, and the SEMI A1 standard was a key reference document in the development of the Japan Robotics Association’s Equipment Link Protocol.Speakers addressing these issues at SEMICON West include Active Layer Parametrics, Applied Materials, Applied Research Photonics, ASML, Bosch Rexroth, Cimetrix, Coventor, ECI Technologies, Edwards Vacuum, Final Phase Systems, GE Digital, Infineon, Jabil, Lam Research, Osaro, Otosense, PEER Group, Qualcomm, Rockwell Automation, Rudolph Technologies, Schneider Electric, Seagate, Siemens, Stanford University, TEL, TIBCO Software. See semiconwest.org.What’s next for smarter, more connected electronics manufacturing - Part 2What’s next for smarter, more connected electronics manufacturing - Part 3Paula Doe, SEMI

Chip testing is becoming smarter and more complex, creating growing requirements to stream data in real time and ensure it is ready to use for analysis, regardless of the vendor source. Adaptive testing using machine learning to predict die performance in a downstream test can reduce the number of cycles by as much as 40 per cent without compromising test performance, notes Dan Sebban, VP of data analysis, OptimalPlus, who’ll speak on machine learning challenges at SEMICON West’s Test Vision 2020 program. “As devices and their test requirements grow in complexity, the motivation for automating adaptive test greatly increases,” he states, adding that characteristics such as die location on the wafer, defects on neighboring die, condition of the tester, and test values near the specification limits can help predict which die are likely to be good.“The big issue we see is that while everyone likes the idea of machine learning, it remains a black box model, with little visibility into why it makes the decisions it does,” adds Sebban. In addition, a suitable infrastructure to run, deploy and assess a machine learning model in real time is required. “There is still some hesitation to adopt machine learning. It’s a big change of mindset. While building the confidence to use machine learning will take time and experience, using the technology to automate big data analysis with the relevant infrastructure may be our best alternative to reduce test cost.” Systems test and parts-per-billion quality become the ruleSystems test will continue to become more prominent and more complex as chips and packages shrink, affirms Stacy Ajouri, Texas Instruments system integration engineer and Test Vision 2020 event chair. “Even IC makers now need to start doing more systems test.” And as more ICs are used in automotive applications, the distinction between consumer and automotive requirements is blurring, driving demand in other markets for higher precision test with parts-per-billion defectivity requirements.“Intelligent test gets increasingly challenging as devices become more complex and as testing moves from distinguishing good from bad devices to figuring out how to repair and trim marginal devices to make them good,” adds Derek Floyd, Advantest director of business development, this year’s program chair. “We’re highlighting efforts to create the infrastructure the industry needs to manage big data for machine learning with test platforms from different vendors,” says Ajouri, citing work on new standards for streaming data from the testers and labeling critical steps in consistent language to simplify the use of data from different platforms in real time. “I have 10 platforms from multiple vendors, and I need them to mean exactly the same thing by ‘lot’ so I don’t have to sort it out before I can use the data,” she says.Are devices becoming too complicated to test at the required price point?Can testing be economical with up to a million die per wafer, 50 data points per die, a requirement for parts-per-billion accuracy, and the need to identify parts that test good now but that might fail in the future? Organizers of the event invite chipmakers and test suppliers to debate the issue. “The speed of innovation in the semiconductor industry challenges test to keep pace,” notes Floyd. “The product we’re testing is always ahead of the product we have to test it with.”The two-day event features sessions on automotive test; big data and machine learning for adaptive test; handling and interface issues such as over-the-air testing; and a general session covering memory and RF test.Paula Doe, SEMI

The fast-growing automotive semiconductor market means big change for the IC supply chain. Beyond the obvious demands for reliability and traceability, the sector is moving towards simpler and lower-cost solutions while facing the daunting challenge of automating driving in a complex world. The need for simpler and cheaper automotive intelligence will likely drive acquisitions to build complete platform solutions that are easier to integrate. This demand has already spawned a market for pre-configured test cars to save developers time and money, and is driving LiDAR (Light Detection And RADAR) towards lower-cost, solid state solutions. “The growth of the automotive electronics market provides a great opportunity for the IC supply chain to differentiate on specialty processes and quality for the high-volume automotive business with its long design cycles,” says Scott Jones, principal, strategy, at KPMG, who will speak in the automotive program at SEMICON West. “This differentiation is a chance to reduce chip suppliers’ dependence on scaling volume for the mobile phone world with its short-cycle volatility of winning and losing sockets.” He notes that increasing demand for automotive ICs is also reinvigorating the eight-inch supply chain and spurring opportunity for specialty products such as compound semiconductor devices for power efficiency. Supplying the automotive market also means addressing automotive reliability requirements, which can be 10 times more stringent than for consumer devices. At the same time, the industry must sustain fast-paced development cycles required for the volume and diversity of low-cost IoT devices, manage the segmented supply chain for both those markets, and still spread development costs. Another big challenge for the supply chain will be to automate testing and update vast amounts of embedded software in these automotive devices. “The more complete solution a company can put together, the more the automakers will gravitate to it. They want simplicity,” Jones suggests. Smaller players will need to differentiate with IP and acquire other IP provider to build a broader platform, or be acquired and folded into an all-in-one solution.AutonomouStuff helps accelerate and simplify development of autonomous driving solutionsAutonomouStuff is helping to speed development of these platforms. The company has grown from a sensor distributor into a supplier in the emerging niche of vehicles preconfigured with key interfaces for sensors and controls. These interfaces can then be customized by integrating different components for developers to test their applications. AutonomouStuff offers developers a lineup of vehicle models pre-configured with the interfaces needed to add desired chips, sensors and software to develop their autonomous vehicle systems. Source: AutonomouStuff.“Whether they’re major chipmakers or AI software startups, they don’t have a year to build their own vehicle platforms themselves for developing autonomous vehicle systems,” says Wolfgang Juchmann, VP sales and business development at AutonomouStuff. Juchmann, a SEMICON West speaker, will bring a demonstration vehicle to the show. “In four to six weeks we can prepare a custom test car with selected sensors, enabling users to start testing their computer platforms and software. It’s faster and more cost-effective for us to supply the car with the needed interfaces.” He notes that developers are using some 300 AutonomouStuff vehicles in the field. AutonomouStuff customers are starting to transition from testing on a single car or two to testing on mini-fleets with 50 to 100 vehicles. Beyond sensors and pre-configured vehicles, the next step will be to add more data intelligence services to help with capabilities like tagging the data for training, Juchmann says. AutonomouStuff already offers hardware to support Baidu’s Apollo open-source software stack and data set. The company was recently acquired by the Swedish holding company Hexagon to help support expansion.CMOS silicon LiDAR nears automotive qualificationInnovations in the hyper-competitive LiDAR market, where burgeoning demand is driving the race to develop various types of solid-state devices, may also help reduce the cost of autonomous vehicles. Among the roughly 40 LiDAR suppliers, at least one – Quanergy – is taking advantage of 45nm and 32nm foundry CMOS volume production. The company uses voltage through the semiconductor stack to change the refractive index, controlling the phases of optical beams and the resulting interference patterns of light exiting the chip to quickly steer the laser beam without the need for moving parts, much like the phased array radar its team developed earlier. Solid state LiDAR image with object recognition software. Source: QuanergySo far, most of the small LiDAR units have shipped to the security, industrial automation, drone, robots and 3D mapping markets. However, Quanergy CEO Louay Eldada, another SEMICON speaker, says the company is also winning automotive designs and expects automotive shipments to take off early next year, once automotive certification testing is completed. “We can get design wins because standard CMOS production at TSMC makes us a known entity,” says Eldada. To prevent component misalignment, the company produces its own specialized packaging to secure the laser, phase control ASIC, optical phased-array emitter, detector array, and receiver readout ASIC at its plant in Silicon Valley or the facility of its automotive partner Sensata. Through its software business, Quanergy offers an artificial intelligence (AI) perception program for object recognition and LiDAR tracking. The solution uses the people-tracker software the company acquired from Raytheon.SEMICON West this year expands to three full days of automotive electronics programming and features a Smart Transportation Pavilion. Other companies with experts who will speak as part of the program include XPT/NIO, Infineon, McKinsey, Voyage, GM Cruise, Bosch, Deepen AI, Airbus A3, Nvidia, Excelfore, Byton, Macronix, SK Hynix, SAP, Xilinx, Achronics, California Fuel Cell Partnership, Velodyne, Lam Research, KLA-Tencor, SCREEN, Rockwell, Versum Materials, TechSearch International, Entegris, ASE, Amazon, Continental and Wind River. www.semiconwest.orgPaul Doe, SEMI

The fast-maturing hardware and software that are enabling practical applications of equipment intelligence and machine learning mean disruptive change for microelectronics manufacturing. But first comes the basic work of building the basic infrastructure, figuring out IP separation, and learning to solve physical problems in the digital world. Just how much can the semiconductor industry leverage industrial IoT practices from other industries? Common wisdom may be that industrial software solutions aren’t well suited to the IC sector’s complex needs. But GE Digital enterprise account executive Luke Smaul, currently working with Intel, argues that semiconductor fabs and toolmakers are dealing with similar issues as GE did when it first started working with Delta Airlines to monitor the GE engines on Delta planes. Smaul will speak at SEMICON West about GE’s work with Intel over the past few years and, in particular, how its solution for cloud security and IP separation can work for ICs. “GE learned to provide IP security and separation in the aviation space with its suppliers, which moved us all up the value chain, providing a big engine for growth,” says Smaul, who started his career as an IC engineer. “GE Aviation saw a 25 percent increase in issue detection rates by leveraging the same common platform. We’ve shown that we can protect Intel intellectual property in its own cloud space and control who can access what.” A toolmaker can access only particular fab data as needed for analysis, and then can reveal only the output from the analysis and a subset of supporting data. “IP separation has to happen, and it will unlock huge added value,” Smaul says. GE’s Predix solution aims to supply an easy-to-use, plug-and-play system for analytics to enable a yield engineer without a deep data background to select a supported sensor, a gateway to connect automatically to the cloud, and an analytics application to test a hypothesis of how the collected data relates to yield. “This empowers the yield engineer to use and unlock information for a quick improvement, even for simple things such as looking at the impact of degradation of fan performance over time on yield,” says Smaul. “Though the scope may be small, the impact on yield in aggregate, and when scaled, is large.” “There needs to be much more collaboration across the industry to make this work, and to share best practices,” says Smaul. “Just as GE moved from selling gas turbines to selling power-as-a-service, vendors of other big, expensive assets like IC equipment will likely change their business model from selling tools towards selling yield-as-a-service. This will simplify life for the fab while bringing the toolmaker more opportunity to sell improved capabilities on existing tools.” More human intelligence makes AI smarter Applying AI neural network approaches such as deep learning to predict outcomes from digital models is enabling disruptive advances in speech and image recognition, but applying it to complex IC manufacturing problems such as predictive maintenance has been a challenge. These neural networks require massive amounts of data to train, and the IC sector doesn’t really have big data, just a lot of little data clusters due to the dynamics and context richness of processes. This data is difficult to combine for analysis. In addition, the neural network provides only an answer but can’t explain why, notes Michael Armacost, managing director of advanced service engineering at Applied Materials. “We’ve learned that it works better if we do not ignore what we know already, but rather incorporate expert knowledge in a structured way to help us focus on the key features and the key data,” says Armacost, who will also speak in the program. This includes choosing the most important steps to include in the model, identifying the limited data to collect and how to filter the data for outliers, and then selecting the final parameters and features, adjusting the limits, and making adjustments as results drift change over time. The less data needed, the better for the complicated issue of IP protection as well. The big gains from these new analysis approaches will likely require data from more than one company and supporting security for remote connectivity. “Some end users are attempting to do the AI all themselves, but in the long term there will need to be collaboration across companies,” says James Moyne, University of Michigan professor and consultant to Applied Materials, another speaker. Collaboration will need to balance the value of the solution against the risk of compromising IP. “The low-hanging fruit are applications such as predictive maintenance in areas that do not involve high-priority IP. Another approach will be to limit the amount of shared data needed – to first build the model on a wide range of data, but then to use only a very small amount of data to operate the models.” Ready-made models could speed the process Coventor’s semiconductor process models are finding initial applications in R D whereby companies use the simulation to understand the effect of process variation on their complex designs. Instead of running dozens of actual wafers to optimize semiconductor processes, users can instead quickly simulate the results of complex process interactions on their design. Going forward, the process models could find a wide range of applications, from accelerating stabilization of new processes in the fab to enabling real-time co-optimized control across previously independent unit steps to improve wafer uniformity. “This improved uniformity across wafers and equipment could potentially reduce the need for costly physical silicon validation,” suggests Joseph Ervin, Coventor director, semiconductor process and integration, another SEMICON speaker. “Making use of in-situ metrology for real-time control also demands a digital model to process and analyze the collected data for quick response. This area has tremendous potential for improving semiconductor process control.” SEMICON West features a Smart Manufacturing Pavilion with displays and three full days of speakers on building the infrastructure needed to enable disruptive artificial intelligence in the microelectronics sector. www.semiconwest.org The SEMICON West Smart Manufacturing Pavilion features interactive Touch Liquid Crystal Displays (TLCD) and working production equipment on the floor from Bosch Rexroth, Cimetrix, Rudolph Technologies, Inficon/Final Phase Systems, OMRON, DISCO and Edwards Vacuum. For information on the SEMI Smart Manufacturing Initiative and how to get involved, please click here. Paula Doe, SEMI