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This year, SEMI ISS covered it all – from a high-level semiconductor market and global geopolitical overview down to the neuro morphic and quantum level. Here are key takeaways from the Day 1 keynote and Economic Trends and Market Perspectives presentations.In the opening keynote, Anne Kelleher from Intel pointed to the huge growth of data, with fabs collecting more than 5 billion sensor data points each day. The challenge, Kelleher noted, is to turn massive amounts of data into valuable information. Moore’s law is not dead. New models of computing benefit still from Moore’s law and advances in Si/CMOS technologies for conventional, deep learning, neuro morphic and quantum computing.With customers expecting continual improvements in applications, the question is whether the chip industry is moving fast enough to meet these expectations, Kelleher said. A broad supply chain, equipment and materials innovations, and attracting the “best of the best” college graduates to fuel innovation is key, she said.In the economic trends session, Nicholas Burns (ambassador ret.) from Harvard University pointed out that we will see a major shift in power. The U.S. will remain the major world power over the next 10 years, but we will see a major shift in power in the next coming decades as the gap with countries like China, Russia and India continues to narrow.Duncan Meldrum from Hilltop Economics said that we are passing the peak growth of economic cycle. He warns that a more likely outlook is that a global growth recession is developing. Although semiconductor MSI growth will see a noticeable slowdown in 2019 and 2020, the semiconductor industry is still healthy over the longer term.Bob Johnson from Gartner sees demand shifting from consumer to commercial applications with higher ROIs and budgets. AI, IoT and 5D are the major enablers. He sees structural changes in the semiconductor industry especially for memory but also for Moore’s law with increasing costs and fewer players.The DRAM markets shows volatility and NAND market may be negative in 2019 but non-memory are expected to accelerate mainly because of increasing content and some price hikes.Overall Gartner expects good long-term growth with a CAGR (2017 to 2022) of 5.1%, outpacing 2011 to 2016 CAGR of 2.6%. After a strong 2018 with 13.4% revenue, he forecasts a slower 2019 with 2.6% growth followed by a 8% growth in 2020 and negative growth rate in 2021.Andrea Lati of VLSI went “Back to fundamentals” in his presentation about the industry. VLSI sees a downside bias due to slowing global economy, tariffs, and trade wars. Future drivers are data economy, cloud, AI and automotive.As memory leads the 2019 slowdown, analog, power, logic and other sectors remain in positive territory. VLSI lowered its semiconductor equipment forecast for 2018 from 20% (Jan. 2018) to 14% (Dec. 2018) but increased its sales outlook from 8% to 15% in 2018. VLSI expects revenue to slow into the first half of 2019 but increase to over 4% in the second half of the year, resulting in total 2019 drop of 2.7%. Semiconductor equipment sales are expected to drop from 14% in 2018 to -10% in 2019.Michael Corbett of Linz Consulting, covering wafer fab materials in the years of 3D scaling, sees these as good times for the industry. His outlook for wafer fab materials is bullish based on strong MSI and because wafer fab materials suppliers are getting bigger because of M As.In the Market Perspective session, Sujeet Chand of Rockwell Automation pointed out that as more and more data is generated, the problem is how to get value of all the data collected. There is a need to create the right architecture for machine learning and AI and big data is increasingly being replaced by contextual/structured data. He expects Industry 4.0 to drive foundries to become smaller, more flexible and more productive.In the Technology and Manufacturing session, Aki Sekiguchi of TEL addressed process challenges in the age of co-optimization. The semiconductor industry continues to expand, driven by massive growth of interconnected devices, with heavy demand for processing power and storage. He expects an exponential increase of data from about 40ZB in 2018 to 50ZB in 2020 to 163 ZB in 2026.Major technologies such as DRAM, 3D NAND and logic are dealing with scaling challenges. The density of DRAM (Mb/chip) is plateauing according to 2015 to 2020 trend data, with DRAM is in need of EUV. Memory capacity demand is leading to increasing layers and higher aspect ratios that is concern for 3D NAND and mainly for plasma etch. With Logic already implementing 3D structures, it appears to be in a solid position. Buddy Nicoson of Micron talked about his 50 years in the industry and looked ahead to the next 50. The anchors – quality, cost, scale and speed – won’t change. It has been a great journey so far with unprecedented opportunities and challenges ahead of us. We are getting into a convergence (specialization, integration) and solution-based phase. We will see some inflection points in the coming years, with the best yet to come.Christian G. Dieseldorff is senior principal analyst in the Industry Research and Analysis group at SEMI in Milpitas, California.
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Even for someone who has been in this industry since the days of the TI Datamath 4-function calculator and the TMS1100 4-bit microcontroller (yes, that’s been a LONG time – the movie Grease premiered the same year!), it is sometimes hard to grasp the scope and complexity of what happens in today’s leading-edge semiconductor gigafabs. In fact, the only way to comprehend the enormous volume of transactions that occur is to consider what happens in a single minute – this is illustrated in the infographic we have labeled “The Gigafab Minute.”* It’s amazing enough to think that a single factory can start 100,000 wafers every month on their cyclical journey through 1500 process steps… and have 99%+ of them emerge 4 months later to be delivered to packaging houses and then on to waiting customers. It’s quite another to realize that all of this happens continuously (24 x 7) and automatically. “How is this possible?” you ask.Well, a big part of the solution is the body of SEMI standards which have evolved since the early 80s to keep pace with the ever-changing demands of the industry. From an automation standpoint, many of these standards deal with the communications between manufacturing equipment and the factory information and control systems that are essential for managing these complex, hyper-competitive global enterprises.A significant characteristic of these standards is that they have been carefully designed to be “additive.” This means that new generations of SEMI’s communications standards do not supplant or obsolete the previous generations, but rather provide new capabilities in an incremental fashion. To appreciate the importance of this in actual practice, consider how the GEM, GEM300, and EDA/Interface A standards support the transactions that occur in a single Gigafab Minute.Starting at 1:00 o’clock on the infographic and moving clockwise, you first notice that 2.31 wafers enter the line. Of course, these are actually released in 25-wafer 300mm FOUPs (Front-Opening Unified Pod), but 100K wafers per month translates to 2.31 per minute. Since these factories run continuously, once the line is full, it stays full. And with an average total cycle time of 4 months, this means that there are 400K wafers of WIP (work in process) in he factory at any given time. This number, and the total number of equipment (5000+), drive the rest of the calculations.GEM (Generic Equipment Model) – SEMI E30, etc.The GEM messaging standards were initially defined in the early 90s to support the factory scheduling and dispatching applications that decide what lots should go to what equipment, the automated material handling systems that deliver and pick-up material to/from the equipment accordingly, the recipe management systems that ensure each process step is executed properly, and the MES (Manufacturing Execution System) transactions that maintain the fidelity of the factory system’s “digital twin.”Every minute of every day, GEM messages support and chronicle the following activities: 240 process steps are completed (i.e., 240 25-wafer lots are processed), 300 recipes are downloaded along with a set of run-specific adjustable control parameters, and 600 FOUPs are moved from one place to another (equipment, stockers, under-track storage, etc.). For each of these activities, the factory’s MES is notified instantaneously.GEM300 – SEMI E40, E87, E90, E94, E157With the advent of 300mm manufacturing in the mid-to-late 90s, a global team of volunteer system engineers from the leading chip makers defined the GEM300 standards to support fully automated manufacturing operations. Starting at 5:00 o’clock on the infographic, the number of transactions per minute jumps almost 3 orders of magnitude, from the monitoring of 900 control jobs across 4000 process tools to the tracking of 360,000 individual recipe step change events. This level of event granularity is essential for the latest generation of FDC (Fault Detection and Classification) applications, because precise data framing is a key prerequisite for minimizing the false alarm rate while still preventing serious process excursions. In this context, more than 6000 recipe-, product- and chamber-specific fault models may be evaluated every minute.Simultaneously, the applications that monitor instantaneous throughput to prevent “productivity excursions” and identify systemic “wait time waste” situations depend on detailed intra-tool wafer movement events. In a fab with hundreds of multi-chamber, single-wafer processes, 75,000 or more of these events occur every minute. EDA (Equipment Data Acquisition) – SEMI E120, E125, E132, E134, E164, etc.Rounding out the SEMI standards in our example gigafab is the suite of EDA standards which complement the command and control functions of GEM/GEM300 with flexible, high-performance, model-based data collection. The EDA standards enable the on-demand collection of the volume and variety of “big data” required from the equipment to support the advanced analysis, machine learning, and other AI (Artificial Intelligence) applications that are becoming increasingly prevalent in leading semiconductor manufacturers. As EUV (Extreme Ultraviolet) lithography moves from pilot production to high-volume manufacturing at the 7nm process node and beyond, the litho process area will become a major source of process data by itself, generating 10 GB of data every minute. This is in addition to the 100 GB of data collected from other process areas. The End ResultThe final wedge (12:00 o’clock) in our infographic highlights the real objective – which is producing the millions of integrated circuits that fuel our global economy and provide the technologies that are an integral part of our modern way of life. Assuming a nominal die size of 50 square mm (typical of an 8 GB DRAM), the 2.31 wafers we started at 1:00 o’clock result in almost 3200 individual chips. But none of this would be possible without the pervasive factory automation technology we now take for granted. So, as you finish reading this posting on whatever device you happen to be using, take a micro-moment to acknowledge and thank the hundreds of standards volunteers whose insights and efforts made this a reality!You may not be responsible for running a gigafab anytime soon, but the SEMI standards used in this setting are no less applicable to any Smart Manufacturing environment. Give us a call if you’d like to know more about how these technologies can benefit your operations for many years to come.Alan Weber is Vice President, New Product Innovations, at Cimetrix Incorporated. Previously he served on the Board of Directors for eight years before joining the company as a full-time employee in 2011. Alan has been a part of the semiconductor and manufacturing automation industries for over 40 years. He holds bachelor’s and master’s degrees in Electrical Engineering from Rice University. For more information on SEMI Standards, please click here.
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Process power and reactive gas subsystems for semiconductor manufacturing equipment have grown at a CAGR of 21% since 2013. The segment growth is considerably above the critical subsystems industry average of 9.5% and is attributable to higher demand for vacuum processing equipment over the period.Process power and reactive gas subsystems now account for approximately 12% of all expenditures on critical subsystems used on semiconductor manufacturing equipment, up from 7% in 2013. The main driver of this exceptional growth has been the rise in vacuum processing steps (deposition and etch) during the manufacturing processes of both logic and memory devices. Most deposition and etch processes require an RF generator to provide a plasma energy source in the chamber, increasing demand for tools with power subsystems such as RF power supplies and matching networks.Multiple patterning and the advent of 3D NAND in high-volume manufacturing have significantly increased the number of deposition and etch processing steps and, in the case of 3D NAND, longer and more difficult etch processes are requiring a wider range of power solutions. Further analysis shows that 3D NAND has been the principle growth catalyst, with the total share of power subsystems going to memory applications increasing 8 percentage points since 2013. Memory applications now account for almost half of all power subsystems demand in 2018. Interestingly, investigation of power subsystems by tool type reveals that a clear majority of power subsystems (60%) find their way on to etch tools with only 40% on deposition tools. This can be explained by the fact that more delicate etch processes can require multiple RF power solutions per tool, whereas deposition does always use plasma energy sources, for example in thermal deposition processes.Despite the staggering growth performance of the power subsystems segment over the past five years, we expect the growth rate to moderate significantly in the run-up to 2023. Now that 3D NAND has been adopted in high-volume manufacturing, we expect the rate of increase in vacuum/plasma processing steps to slow down. The introduction of EUV also has the potential to taper demand for vacuum processing equipment. However, it is not expected the reverse the trend as multiple patterning techniques will still be needed in conjunction with EUV to achieve the desired improvements in device density and performance. The future growth trend for power and reactive gas subsystems is forecast to be in line with the critical subsystems industry average at approximately 2.0% CAGR until 2023.For more information about Critical Subsystems and VLSI Research, please visit www.vlsiresearch.com/public/csubsJulian West is a technical and market analyst at VLSI Research Europe.
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