downloadGroupGroupnoun_press release_995423_000000 copyGroupnoun_Feed_96767_000000Group 19noun_pictures_1817522_000000Member company iconResource item iconStore item iconGroup 19Group 19noun_Photo_2085192_000000 Copynoun_presentation_2096081_000000Group 19Group Copy 7noun_webinar_692730_000000Path
Skip to main content
Default Banner Image

Lam Research

Never before had we expected that SEMICON SEA 2020 would go virtual.The COVID-19 crisis abruptly halted our ability to hold our premier Southeast Asia electronics manufacturing exposition as we typically do – in the physical realm. The pandemic tested our adaptability, challenged our willingness to experiment and, perhaps above all, accelerated not only our own but the world’s digital transformation. We had to change our way of doing business and learn to connect virtually like we had never had before. SEMI continues to believe that virtual interaction is no replacement for face-to-face engagement. But, like the rest of the world, we fast-tracked our digital education and staged the virtual event 20 July to 21 August 2020 to gather supply chain players and help fulfill the tremendous potential of our great industry. For all the suffering the COVID-19 has caused, the pandemic has underscored an important truth – that we need innovation through collaboration now more than ever to help solve the world’s greatest problems. We thank all our event sponsors as we turned what started as a grand experiment into a successful event that drew nearly 3,000 attendees to our webinars, business matching sessions and other online offerings designed to help them uncover new business opportunities. Following are other highlights. Southeast Asia Pavilion at Virtual SEMICON West 2020 In our first collaboration with SEMICON West, our Southeast Asia Pavilion at the event welcomed virtual visitors from around the globe to help them form new connections and grow their businesses. Business Matching Sessions Technical buyers from more than 15 multinational companies along with 141 pre-qualified suppliers attended more than 50 meetings across four online business matching sessions.Technical WebinarsCompany representatives from regions including Malaysia, Singapore, Vietnam, Taiwan, the United States, the UK, Israel, China and Japan shared their expertise and industry insights at SEMICON Southeast Asia 2020 webinars. In addition, experts from leading semiconductor companies such as Micron Semiconductor Asia Operations, ViTrox Corporation Berhad and A*STAR took part in our technical exchange by sharing the latest trends in the rapidly evolving semiconductor industry. Talent Development: Inspirational University Program Talks With building the talent pipeline critical to sustaining growth of Southeast Asia semiconductor manufacturing dynamics, talent champions from Lam Research and GLOBALFOUNDRIES highlighted career opportunities and pathways for young engineers while generating recruiting leads. More than 750 students from Malaysia and Singapore engaged panelists with questions during the sessions. The SEMICON Southeast Asia team extends its tremendous thanks to sponsors and attendees for their support. As we all navigate the pandemic and hope in the near future to awaken to a brighter day, we will continue to connect virtually and, whenever possible, in person as the semiconductor industry evolves and flourishes. The SEMICON SEA 2020 team In the meantime, we will all continue to pull together to support our resilient industry as it outperforms most other manufacturing sectors. Semiconductor capital equipment shipments were up 23% globally in the second quarter of 2020 versus the same period in 2019 and semiconductor chip growth remains in positive territory. Our team has already started planning for SEMICON SEA 2021, scheduled to take place at the Setia Spice Convention Centre in Penang, 18-20 May 2021.We look forward to seeing you again soon as we continue to strengthen the microelectronics ecosystem!Bee Bee Ng is president of SEMI Southeast Asia.
Read More
Tracking and quickly diagnosing COVID-19 infections, working from home and telemedicine recently came into sharp focus as technology executives and other subject matter experts from microelectronics heavyweights recently gathered for the first-ever virtual SEMI CTO Forum to explore how the microelectronics industry and their own companies can leverage future technology trends to drive growth. Themed Intelligent Medtech and Wearable Technologies, the forum drew CTOs from ARM, Babblelabs, Brewer Science, Dell, Dow/Dupont, E-Ink, Hewlett Packard Enterprise, Intel, Lam Research, KLA, Microchip, ON Semiconductor, Qualcomm, Tokyo Electron, Ulvac, Veeco and Xilinx. The event is designed as a strategic driver of pre-competitive innovation. Following are key takeaways from the forum. Microfluidics Promises to Speed COVID-19 Diagnosis More than 240 companies worldwide are developing microfluidics solutions to improve diagnosis and treatment of COVID-19 and other conditions, said forum speaker Dr. Kurt Petersen, a member of Band of Angels, Silicon Valley's oldest angel investment group, with an illustrious background1 in technology. And their innovations are bearing fruit. Cepheid, a company founded by Dr. Petersen, has developed a disposable microfluidic cartridge, Xpert Xpress SARS-CoV-2, used by doctors to swab the inside of a patient’s mouth. Highlighting the vital role of MEMS in medical electronics, the tiny powerful devices are behind a test that can detect COVID-19 infection in under 40 minutes. Dr. Petersen also cited a few examples of implantables and injectables under development, including: In vivo chemical sensing: Profusa developed a continuous glucose monitoring sensor via an optical patch. Glaucoma pressure monitors: Injectsense built a silicon chip the size of a grain of rice that is embedded in the eye to measure eye pressure. Retinal implants: Second Sight implanted a 60-electrode array chip that projects images onto the retina to improve vision. Microelectronics Takes Aim at Battling COVID-19 The event’s CTO roundtable, a platform for discussing societal and technology issues, revealed microelectronics technology will likely give rise to solutions for combatting pandemics and new business opportunities both in the short and long run. Areas of the greatest interest included: Tracking and Security: Infection tracking accuracy is key to limiting the spread of viruses yet comes with inherent privacy and security challenges. The consensus view of the executives was that developing trusted hardware capabilities is critical for adoption of accurate infection-tracking technologies. Remote Operation: Executives expect working from home or the use of telehealth to continue building momentum long after pandemic. To give staying power to the remote communications at the heart of these trends, microelectronics ecosystems will need to boost compute performance, both at the edge and in the cloud, while increasing bandwidth to enable applications such as augmented reality/virtual reality (AR/VR), artificial intelligence (AI), machine learning and advanced data analytics. Edge intelligence: The challenge of remote communications spans both people and the Internet of Things (IoT). Questions persist about how hundreds of billions of sensors will connect to the cloud and how much power they will consume. The need to push computing to where data is generated – at the edge – is rising and the necessary underlying technologies will only come by combining various forms of distributed computing and analytics. The microelectronics industry’s ability to seize these opportunities will only be possible with huge strides in innovation, raising concerns among the CTOs about the financial viability of cutting-edge devices because of increasing device complexity and R D costs. Technology partnerships and collaborations – an area where SEMI is contributing and will continue to expand its efforts as it works with the CTO community – will be critical to containing R D costs. SEMI will help the executives identify and mobilize the resources key to future innovation. Improving Home, Work Productivity and Experiences Key to AR Adoption Smart wearables also offer great promise. In just over a decade, AR and VR have grown from science fiction to practical uses such as AR applications for smart contact lenses, said Dr. Mike Wiemer, Co-Founder and CTO of Mojo Vision2. Dr. Wiemer said that while many AR applications remain under development, the technology will only see widespread adoption once it starts to improve productivity and efficiency at home and work and the quality of other experiences. The smart augmented reality contact lens developed by Mojo Vision is a step in that direction. The product’s built-in display gives users timely information about everything they see while remaining invisible by packing 70,000 pixels into a space smaller than a half a millimeter across, making it the smallest and densest dynamic display ever made. The contact lens is powered by an ARM-based processor, with later versions adding an image sensor, eye-tracking sensors and a communications chip. SEMI thanks EMD Performance Materials and Telit for sponsoring the CTO Forum. For more information on the CTO Forum and SEMI’s Smart Data-AI initiative, please sign up on our webpage. 1 Dr. Kurt Petersen is a member of the National Academy of Engineering, an IEEE Medal of Honor winner, and a Life Fellow of the IEEE for his contributions to the commercialization of MEMS technology. 2 Dr. Wiemer also co-founded Solar Junction, where he led technical teams to two world records in solar cell efficiency (43.5% and 44%). He also has patents and papers in Semiconductor Devices Applications, Silicon Photonics, Materials Integration, Lasers, Solar Cells, Solar Systems, and Analog Circuits. Tom Salmon is Vice President of Collaborative Technology Platforms at SEMI. Pushkar P. Apte, Ph.D., is Strategic Technology Advisor for the Smart Data AI Initiative at SEMI.
Read More
Once an unpopular career destination for university graduates in Korea, the semiconductor industry has been a plum target since the rise of Samsung Electronics and SK Hynix as global leaders and key growth engines for the Korean economy. The industry’s outsize role in innovation of cutting-edge technologies and applications such as artificial intelligence (AI), Internet of Things (IoT), 5G and autonomous driving has added to the appeal.The draw of a career in chip manufacturing is even stronger when new graduates from Korean universities consider the semiconductor industry’s rapid growth of 22.2% in 2017 and 15.5% in 2018, according to VLSI Research. Yet, even before earning their degrees, many students are unclear about steps they need to take to prepare for a career in the industry and the type of work available to them.These questions and concerns were on the top of the minds of 250 students who gathered at COEX in Seoul in mid-November for SEMI Campus Outreach, a half day of career insights from global chip companies including Lam Research, Applied Materials, Tokyo Electron, and KLA along with leading semiconductor companies in Korea such as SEMES, EO technics, JUSUNG ENGINEERING, DONGJIN SEMICHEM, PSK and Wonik IPS. Keynote - Inhak Harry Suh, CEO, Lam Research Korea 250 students gathered at Campus Outreach Campus Outreach keynote speaker Inhak Harry Suh, CEO of Lam Research Korea, stressed that talented new graduates hold the key to leading the semiconductor industry into the Industry 4.0 era and the next phase of growth. He urged the students to look for a company that treats its employees with respect and fairness and to enjoy their work. Joining the executives in inspiring the students, field and service engineers highlighted the semiconductor industry’s strong growth potential, described their job responsibilities and the skills students need to develop to thrive, and offered guidance on subjects to study in school to best prepare students for jobs in the industry. On the recruiting side, human resources representatives at the event provided overviews of their companies and skills they’re looking for as they court talent. Campus Outreach sponsors At SEMICON Korea 2020 – Feb. 5-7 at COEX in Seoul – SEMI will continue to cultivate industry talent at the Workforce Development Pavilion. To help the industry solve its critical talent shortage, the pavilion will offer university students interviews with industry experts and tutorials on semiconductor production as the students explore career paths and are mentored by engineers during the Meet the Experts program. And with a diverse workforce recognized as a competitive advantage, the Women-in-Technology session will gather leaders to discuss how the industry can improve diversity.Jaegwan Shim is a marketing specialist at SEMI Korea.
Read More
The future of the semiconductor industry began to blossom recently in Seoul, South Korea as young, innovative minds teased out secrets to electronics manufacturing and their path to enter the industry one day. Twenty-seven middle schoolers gathered in early August at Yonsei University for SEMI High Tech U (HTU), the worldwide SEMI program that introduces students to science, engineering, technology and math (STEM) careers over three days of hands-on activities and experiential learning. Since 2001, HTU has reached some 8,000 students in nine countries.Semiconductor giants including Applied Materials, KLA, Lam Research and Dongjin Semichem were key teachers as representatives from the companies gave theoretical and practical lectures to pique the students’ interest in STEM educations and careers. The speakers, all experts in microelectronics, surveyed microchips and solar cells, mathematical and scientific experimentation, engineering design and the inner workings of semiconductor manufacturing before the students broke off into teams for lessons largely of their own making. Fine-tuning a wooden contraption – a Statapult – to hurl a ball as far as possible might not sound like the stuff of microelectronics, but it drew on the type of problem-solving skills and creativity the students will need to thrive in the semiconductor industry. Student teams made adjustments to the levers of miniature catapults, then tested the throwing power of the devices. After the ball tosses, they reconvened as a class to share lessons in how they calibrated their catapults for a longer tossing distance and ways they could improve the devices’ performance. Students also took tours of two very different semiconductor manufacturing settings – one virtual and the other real. The young learners donned virtual reality headsets for a simulated walk-through of Applied Materials (the tour was sponsored by the company), then slipped on bunny suits for a tour of Yonsei University's BIT micro fab and a close-up look of how semiconductors are made.But it was the ever-popular Human Calculator game that inspired the greatest thrill as students dove deep into technology. During the exercise, they converted numbers into binary and then traced the digits through a series of gates in an electronic circuit, an exercise requiring careful team communication and concentration to generate the right outputs. The students surprised SEMI Korea employees and instructors, and themselves, by completing the exercise with record speed. Their time: less than two seconds.Human resources managers from sponsor companies were on hand to give the middle school students a head start in their careers with lessons in resume writing and career management. In mock interviews, the students honed their interviewing skills. And in meetings with SEMI High Tech U alumni they learned how their predecessors worked their way into semiconductor industry and their focus of study in college.To be sure, the day was rich in details about working in the microelectronics industry. But did it meet the students’ expectations? In a survey before the event, the more than two dozen students, on average, rated their knowledge of microelectronics at 4.5 on a scale of 1 to 10, a score that jumped to 7.7 after completing HTU. Their favorite module? No surprise: Engineering Design. In this exercise, the students designed a carrier for six 12-ounce beverage cans using only decidedly low-tech materials such as strings, rubber bands and wooden boards. Their innovations were studies in high creativity and ingenuity – just the type of imaginations the semiconductor industry needs. SEMI Korea has offered SEMI HTU since 2011. This year, various other career development programs such as semiconductor manufacturing tutorials and mentoring are planned as SEMI Korea continues to sow the seeds of the next generation of industry workers. Jaegwan Shim is a marketing specialist at SEMI Korea.
Read More
SEMI has long promoted the industry collaboration that has contributed to the rise of the smart digital world we live in today. A world where data is being generated continuously by systems, gadgets, and sensors around us – often referred to as the Internet of Things (IoT). In our personal lives, most of us have smartphones, smart watches, smart TVs and smart cars, and we live in smart homes and smart cities generating huge amounts of data.In the work world, data and analytics are now influencing almost every industry including healthcare, government, financial services, construction and transportation. This data has the potential to transform our lives and make our world even smarter – if we can communicate and process this data, and use it to come up with actionable recommendations or actions. Artificial Intelligence (AI) and Machine Learning (ML) techniques have generated much excitement precisely because they offer us ways to realize the full value of data by harnessing it and transforming it into active intelligence.Data-intensive technologies are required to store, communicate and analyze data. And it all starts with innovation in microelectronics chips and systems spanning processors, memory, sensors, radios and other devices, presenting a huge opportunity to producers of these technologies. However, with Moore's Law beginning to slow, technology paths and innovation options are diverging. Companies must swiftly assess these options in order to develop competitive offerings. But the technological complexity and divergence makes it increasingly expensive or even unaffordable for many companies to track and pursue these options.The good news is that cost-effective early assessment is possible through pre-competitive collaboration that can produce new and often unexpected cross-disciplinary insights by overcoming traditional silos in industry and academia. Unfortunately, important collaborative industry platforms, such as the International Technology Roadmap for Semiconductors (ITRS), have folded, opening a collaboration gap in the global microelectronics ecosystem.As part of its mission to help companies connect, collaborate, and innovate, SEMI has built a collaborative, cross-supply-chain platform – the Strategic Innovation Platform (SIP). The goal is to provide early and comprehensive assessment of future technologies that are five to eight years away from commercialization. The assessment identifies not just technical barriers but also manufacturing and supply-chain constraints to implementing new technologies. SIP brings together the entire microelectronics ecosystem including strategic technology thought leaders, subject matter experts, technology and application developers, academia, researchers, start-ups and government. With more than 2,100-member companies spread across the global electronics manufacturing supply chain, SEMI is uniquely positioned to enable this critical collaboration. Award-Winning First ProjectThe inaugural SIP project assessed key drivers of future technologies. A key finding was that fast, efficient interconnects between devices and components are critical to the system performance important to customers and users, implying that system-level optimization is required. For data-intensive applications, interconnects have emerged as a key bottleneck for both performance and power in various circuits and systems in part because the slowing of Moore’s Law has decelerated advances in individual device performance, and in part because systems are becoming more complex, requiring heterogeneous integration.To address this challenge, SIP brought together industry experts from ASE Inc., Dow Chemical, Lam Research, Qualcomm and Xilinx to assess the future impact of interconnects for data-intensive applications. SEMI also involved Stanford University professors to collaborate on modeling and simulation. Through this unique cross-disciplinary collaboration, SIP developed a realistic model to evaluate the system-level performance of single-chip systems, as well as multi-chip systems – including traditional 2D packages, high-performance 2.5D systems that use interposers, and futuristic 3D systems. SIP also explored supply chain challenges in business continuity, manufacturability, Environment, Health and Safety (EHS) and the regulatory environment. SEMI worked with a broad range of industry partners to ensure that the model parameters accurately reflected realities on the design and factory floors to ensure usable results. Experimentation has become ever more expensive, with one industry player reporting that “it costs us $100 million to do a good experimental evaluation.” Accurate models can go a long way toward reducing the cost of technology assessment. The SIP collaboration produced key quantifiable insights including comparisons that highlight the benefits and limitations of various materials being explored for future interconnects, and of architectures under consideration for future data-intensive applications. For example, the current workhorse for artificial intelligence (AI) platforms – 2.5D technology – delivers a 4X improvement over 2D packaging but falls short of providing the orders-of-magnitude improvement that future AI/ML applications may require. These findings enable the industry to begin to identify ways to optimize 2.5D architectures, transition to 3D heterogeneous integration for performance-critical applications in the medium term, and to eventually evaluate new paradigms such as neuromorphic and quantum. The project findings were presented late last year in the form of two research papers at Electronics System-Integration Technology Conferences (ESTC) and International Microelectronics Assembly and Packaging Society (IMAPS) recently. One received the “Best Paper of the Session” award at IMAPS – a recognition that affirms the power of a collaborative platform such as SIP to produce valuable insights to address the growing technology complexity within the microelectronics industry. The microelectronics industry is on the cusp of a historic inflection point, where it could fuel the rise of emerging applications in AI/ML and IoT, and can grow into a trillion dollar industry over the next several years. More importantly, the industry is poised to help solve some of society’s most complex problems in areas including healthy living, climate change and transportation. No company can do this alone, and pre-competitive platforms such as SIP are key both to accelerating innovation through cross-disciplinary collaboration, and to reducing costs for individual companies. Please contact Tom Salmon at [email protected] or Pushkar Apte at [email protected] for more details and to get involved in future projects.Tom Salmon is vice president of Collaborative Technology Platforms. Pushkar Apte is a strategic technology advisor at SEMI.
Read More
U.S.-China Trade War Heats UpThe U.S. Trade Representative (USTR) yesterday released a 25 percent tariff on $16 billion in imports from China, including 29 tariff lines that represent the heart of the semiconductor industry. These tariff lines include semiconductor products such as machines and spare parts used to make, wafers, flat panel displays, masks and chips, and will cost SEMI’s 400 U.S. members an estimated more than $500 million annually in additional duties.SEMI, along with hundreds of companies, including Lam Research and KLA-Tencor, submitted written comments, requesting the removal of tariff lines from the proposed list. SEMI also testified on behalf of the semiconductor industry, joining more than 80 other companies, including Applied Materials, in opposing the duties before an U.S. government interagency panel in late July.This trade action is on top of the already imposed $34 billion U.S. tariff list, which will cost SEMI’s U.S. members tens of millions of dollars annually. In the coming days, USTR will publish details on how U.S. companies can request the exclusion of products from the $16 billion tariff list, much as it did for the first round of $34 billion.In a swift retaliation, China announced a 25 percent tariff on $16 billion in U.S. exports, including products vital to semiconductor manufacturing such as chemicals, test equipment and other parts. Both U.S. and China tariffs will take effect on August 23.The new tariffs come as China considers tariffs on $60 billion of U.S. imports, and the U.S. weighs additional duties on $200 billion of Chinese imports – a wave that would inflict even deeper damage on the U.S. semiconductor industry. This latest round of U.S. tariffs would cover goods used in microelectronics manufacturing, including chemicals, glass products and spare parts. SEMI will testify against the $200 billion tariff list later this month. If your company expects to be impacted by the proposed tariffs on $200 billion worth of goods, please contact SEMI staff.SEMI stands firm in its belief that none of the tariffs address U.S. concerns over China’s trade practices. Instead, they harm companies in the semiconductor supply chain by increasing business costs, introducing uncertainty and stifling innovation. SEMI will continue to engage with policymakers as both the U.S. and China $16 billion tariff lists are implemented. We will also be evaluating the products covered by the $200 billion U.S. list and the $60 billion Chinese list as both are further considered. We encourage members to review these lists to determine impact on their companies. For more information, please contact Jay Chittooran, Public Policy Manager at SEMI, at [email protected].
Read More
Did you miss the SEMI International Standards Reception at SEMICON West 2018? Not to worry, here are the highlights.SEMI honored two Standards industry leaders for their outstanding accomplishments in developing Standards for the electronics and related industries.Two awards were given recognizing the efforts of each member. The Technical Editor Award recognizes the efforts of a member to ensure the technical excellence of a committee’s Standards. This year’s recipient is Sean Larsen of Lam Research. Mr. Larsen has led the North America EHS Committee and multiple EHS task forces for over a decade. His knowledge of the Regulations, Procedure Manual, and Style Manual, combined with his vast experience in the industry, ensures that complex safety matters are explained in a clear, consistent manner, and ballot authors frequently rely on him for his technical skills in preparing ballots.In addition to co-chairing the North America EHS Committee, Mr. Larsen is currently the co-leader of the SEMI S22 (Electrical Design) Revision TF, the SEMI S2 Non-Ionizing Radiation TF, the SEMI S2 Korean High Pressure Gas Safety TF, and the Control of Hazardous Energy TF.The Corporate Device Member Award recognizes the participation of the user community and is presented to individuals from device manufacturers. This year’s recipient is Don Hadder of Intel. Mr. Hadder has been actively involved in the Standards Program for several years, and currently leads the Chemical Analytical Methods Task Force and chairs the North America Liquid Chemicals Committee. He has successfully re-energized the committee, which is now focused on enabling continued process control improvements for advanced nodes. He recently drove the development of a critical new standard: SEMI C96, Test Method for Determining Density of Chemical Mechanical Polish Slurries, the first document in a series of SEMI Standards that will be devoted specifically to CMP slurry users, IDMs, slurry suppliers, metrology manufacturers and OEM equipment suppliers.Mr. Hadder has worked at Intel for 23 years, where his experience and system ownership has been in Diffusion, Wet Etch, Planar-CMP, Ultra-Pure Water, Waste Treatment Systems, Abatement and Vacuum Systems, Bulk and Specialty Gas, Bulk Chemical Delivery and Planar Chemical Delivery.James Amano, Sr. Dr. International Standards, opened the reception with a few words. He noted that the total number of published SEMI Standards is nearing 1000, and that these documents serve as the backbone of modern day semiconductor manufacturing. SEMI president and CEO Ajit Manocha, speaking at the SEMI International Standards Reception at SEMICON West. Ajit Manocha, President and CEO of SEMI, reminisced how he was an active Standards Member, and how much he got out of SEMI Standards as a young engineer at Bell Labs. He passionately emphasized that SEMI Standards remain critical in this era of new materials and disruptive architectures and processes, calling them the "oxygen of the industry."Laura Nguyen is coordinator, International Standards, at SEMI.
Read More
What’s next for smarter, more connected electronics manufacturing - Part 3 The fast-maturing infrastructure now enabling analysis of exponentially larger data volumes brings the microelectronics industry to an inflection point, where the winning companies will be the first to master the use of this data to solve the industry’s emerging challenges. SEMI expands its coverage of these vital issues with a Smart Manufacturing Pavilion and three days of talks SEMICON West, July 10-12 in San Francisco. While deep learning is starting to be applied to image recognition for wafer inspection, it is also being considered for sequential pattern recognition in order to evaluate equipment parameter traces. The next emerging applications will start to use those learned patterns to predict outcomes, and then use those predictions to automate process control. One early application of deep learning is IC process development. “People don’t think of research and development as the first place to automate, but it’s where applying our digitization and simulation has first had impact,” says David Fried, Coventor vice president of Computational Products. He noted that insertion is easier in the lab than in the fab. Technology at 10nm and beyond is now so complex that companies at the leading edge must use process modeling to understand the effect of process variation on their designs. Learning cycles can now be accelerated during development by simulating 10,000 digital wafers instead of running 25 actual wafers during screening, Fried says. Applying structured analysis and machine learning to the data simplifies optimization across the 500 or more interrelated process steps. Coventor has recently introduced a statistical analysis package that aids the design and analysis of process variation experiments by using large volumes of data from its models. Fried says these models are next being used to accelerate the yield ramp in manufacturing. Digital simulation also could speed development of high-mix, lower value products While digital twins are best known for their use in complex, high value products like jet engines, the simulation technology could also enable the electronic manufacturing services (EMS) sector to reduce the time, cost and risk of developing its high mix of products. “The EMS sector’s use of digital twins will be vital for it to smooth the move of CAD/CAM digital design data for so many different products into manufacturing, and to accelerate validation testing of designs and products by doing more of it in the virtual world,” says Dan Gamota, vice president of Engineering and Technical Services at Jabil. Gamota also highlights the push for traceability from the automotive and healthcare markets, where the digital models could be used to quickly assure that the design was built exactly as specified. “In the past year, traceability has evolved from just ‘nice to have’ to ‘how to achieve,’” he adds. “Companies are expecting it, but aren’t willing to accept the cost and risk of doing it alone. We need the community to discuss realistic implementations, identify the most critical elements and bring together the ecosystem partners to build baseline reference architectures for key digital building blocks. The community also needs to assure the reliable flow of data among the electronic manufacturing segments from semiconductor to OSAT to EMS.” Predictive maintenance and virtual metrology applications could mature in next few years While predictive maintenance initially seemed a likely early application of machine learning in factories, it remains a challenge for the electronics sector. “The difficulty is that it’s not clear where to get the most bang for the buck,” says Tom Ho, president of BISTel America, noting that it may make the most sense to track the failure performance of a single expensive part, like an electrostatic chuck, since predicting the failure performance of a whole complex system like an etcher is much harder. “Collecting enough data from all failure types, including especially the rare events, is difficult unless you have a long history of a lot of tools,” adds Doug Suerich, PEER Group product evangelist. “The gain from collecting performance information from many tools across the industry could be big, but many companies still need to overcome concerns around exposing their IP.” Another big opportunity for prediction is virtual metrology – predicting the wafer outcome from the process or sensor data with enough accuracy to replace the physical metrology. “Virtual metrology is improving, and since metrology can be slow and expensive, any reduction could mean a huge potential savings,” says Suerich. “But it is still seen as too scary for many companies. Two to three years from now, companies will expand the practice from lower risk areas into processes that require more confidence in the results.” Moving beyond prediction to automated control needs digital models Once the results are predicted, the model can be used to control or automatically optimize a process and enable the system to learn by itself, usually by reinforcement learning on a digital model. The model can then independently make adjustments to optimize the manufacturing process. “Automated process development is getting close now. Instead of smart guys turning the knobs, deep learning is automating the smart tuning,” says Suerich, suggesting the industry could see widespread adoption in as little as two to three years. This type of machine learning needs a good digital model, and masses of data for learning. One approach uses human experts to build a physics-based model of the clearly understood parts of the process, then turns to deep machine learning to optimize the lesser-understood variables. The alternative, the data-first approach, runs a computer algorithm to suggest the solution purely from data, without human input, and then relies on the human to evaluate the usefulness of the results. Modeling digital twins of wafers could enable automated process control, chamber matching, and fleet matching, says Fried. If every wafer had its own virtual twin with all the upstream metrology and structural information needed to make equipment control decisions, it could feed forward that information to enable the seamless transition from one step in the process to another based on understanding their complex interrelationships. This could potentially improve uniformity across wafers and equipment, and reduce the need for metrology, he argues. Moving metrology sensors into the chamber will also require model-based algorithms to enable dynamic process control in close to real time, says Fried. These algorithms will be needed to acquire, parse, and process the data at high speed, and then to choose how to adjust the controls. “There will be a model behind collecting and interpreting the metrology data,” he notes. “That’s a really rich vein for improvements in process control.” “The end goal is to collect equipment data in real time, analyze it with AI, and send back controls to optimize manufacturing processes,” Jabil’s Gamota says. “This requires a robust architecture for communication between equipment and consistent formats for data collection and analysis. But the cost and complexity of this heavy lifting is too great for any one company to do alone. We need a consensus-based architecture for ingesting, analyzing and acting on the data.” SEMI tests data transfer protocols, benchmarks best practices SEMI is launching a smart data project to identify the various data transfer protocols needed for inter-company communications. The project will feature a proof-of-concept model in a development fab to produce verifiable results so SEMI can better understand how different approaches meet member needs. SEMI’s smart manufacturing technology communities and the Fab Owners Alliance are also benchmarking current smart manufacturing practices in the microelectronics industry to help SEMI members better understand the path forward and potential return on investment. Speakers over all three days at SEMICON West addressing these issues include Active Layer Parametrics, Applied Materials, Applied Research Photonics, ASML, Bosch Rexroth, Cimetrix, Coventor, ECI Technologies, Edwards Vacuum, Final Phase Systems, GE Digital, Infineon, Jabil, Lam Research, Osaro, Otosense, PEER Group, Qualcomm, Rockwell Automation, Rudolph Technologies, Schneider Electric, Seagate, Siemens, Stanford University, TEL, TIBCO Software. See semiconwest.org. What’s next for smarter, more connected electronics manufacturing - Part 1 What’s next for smarter, more connected electronics manufacturing - Part 2 Paula Doe, SEMI
Read More
With artificial intelligence (AI) rapidly evolving, look for applications like voice recognition and image recognition to get more efficient, more affordable, and far more common in a variety of products over the next few years. This growth in applications will drive demand for new architectures that deliver the higher performance and lower power consumption required for widespread AI adoption. “The challenge for AI at the edge is to optimize the whole system-on-a-chip architecture and its components, all the way to semiconductor technology IP blocks, to process complex AI workloads quickly and at low power,” says Qualcomm Technologies Senior Director of Engineering Evgeni Gousev, who will provide an update on the progress of AI at the edge in a Data and AI program at SEMICON West, July 10-12 in San Francisco. Qualcomm Snapdragon 845 uses heterogeneous computing across the CPU, GPU, and DSP for power-efficient processing for constantly evolving AI models. Source: QualcommA system approach that optimizes across hardware, software, and algorithms is necessary to deliver the ultra-low power – to a sub 1-milliwatt level, low enough to enable always-on machine vision processing – for the usually energy-intensive AI computing. From the chip architecture perspective, processing AI workloads with the most appropriate engine, such as the CPU, GPU, and DSP with dedicated hardware acceleration, provides the best power efficiency – and flexibility for dealing with rapidly changing AI models and growing diversity of applications.“So far it’s been largely a brute force approach using conventional architectures and cloud-based infrastructure,” says Evgeni. “But we’re going to run out of brute force options, so future opportunities lie in developing innovative architectures, dedicated hardware, new algorithms, and new software. Innovation will be especially important for AI at the edge and applications requiring always-on functionality. Training is mostly in the cloud now, but in the near future it will start migrating to the device as the algorithms and hardware improve. AI at the edge will also remove some privacy concerns, an increasingly important issue for data collection and management.”Practical AI applications at the edge where resources are constrained run the gamut, spanning smartphones, drones, autonomous vehicles, virtual reality, augmented reality and smart home solutions such as connected cameras. “More AI on the edge will create a huge opportunity for the whole ecosystem – chip designers, semiconductor and device manufacturers, applications developers, and data and service providers. And it’s going to make a significant impact on the way we work, live, and interact with the world around us,” Evgeni said.Future generations of chips may need more disruptive systems-level change to handle high data volumes with low power A next-generation solution for handling the massive proliferation of AI data could be a nanotechnology system, such as the collaborative N3XT (Nano-Engineered Computing Systems Technology) project, led by H.S. Philip Wong and Subhasish Mitra at Stanford. “Even with next-generation scaling of transistors and new memory chips, the bottlenecks in moving data in and out of memory for processing will remain,” says Mitra, another speaker in the SEMICON West program. “The true benefits of nanotechnology will only come from new architectures enabled by nanosystems. One thing we are certain of is that massively more capable and more energy-efficient systems will be necessary for almost any future application, so we will need to think about system-level improvements.” Major improvement in handling high volumes of data with low high energy use will require system-level improvements, such as monolithic 3D integration of carbon nanotube transistors in the multi-campus N3XT chip research effort. Source: Stanford UniversityThat means carbon nanotube transistors for logic, high density non-volatile MRAM and ReRAM for memory, fine-grained monolithic 3D for integration, new architectures for computation immersed in memory, and new materials for heat removal. “The N3XT approach is key for the 1000X energy efficiency needed,” says Mitra.Researchers have demonstrated improvements in all these areas, including multiple hardware nanosystem prototypes targeting AI applications. The researchers have transferred multiple layers of as-grown carbon nanotubes to the target wafer to significantly improve CNT density and have also developed a low-power TiN/HfOx/Pt ReRAM. The low-temperature CNT and ReRAM processes enable multiple vertical layers to be grown on top of one another for ultra-dense and fine-grained monolithic 3D integration. Other speakers at the Data and AI TechXpot include Fram Akiki, VP Electronics, Siemens; Hariharan Ananthanarayanan, motion planning engineer, Osaro; and David Haynes, Sr. director, strategic marketing, Lam Research. See SEMICONWest.org.Paula Doe, SEMI
Read More
What’s next for smarter, more connected electronics manufacturing - Part 2The fast-maturing infrastructure now enabling applications for big data and artificial intelligence means disruptive change not just at individual companies but also in data connections among companies across the microelectronics manufacturing value chain. SEMI checked in with some leading players on the changes they see coming in the next several years for this article series. The trade group is expanding its programming on smart manufacturing to address these industry-wide developments at SEMICON West, July 10-12 in San Francisco.“The ramp of EUV, and the smaller geometries and smaller process margins, will drive an exponential increase in the amount of metrology data to manage,” says Neal Callan, ASML vice president, Silicon Valley. Callan notes that moving to multibeam e-beam inspection will increase data volume from megabytes per second to gigabytes per second and from thousands of data points to millions of data points. “The process is so tight and the margin so small that stochastic variation, or noise, becomes more dominant – at least it’s noise until we can learn to understand and control it. And understanding and controlling this variation will be key to delivering 5nm patterning,” he says.Single-beam e-beam inspection is already driving large increases in data as engineers extend the slow technology to broad, high-speed defect metrology applications by more intelligently instructing the system where to look for problems. Callan says ASML is now using the scanner data on wafer focus, alignment and leveling. The company is also using the computational lithography model from the design to identify the smallest process windows in the pattern that are most likely to see problems. The model then quantifies the number and significance of those instances.“The collection of all this diverse data means that tools will need to be plug-and-play so all tool data is instantly available to all systems and software,” says Doug Suerich, PEER Group product evangelist. “We need tools that can be discovered automatically by the network so it can start slurping up data immediately. The adoption of the Interface A (EDA) standard is accelerating and fabs are starting to ask for it. The proliferation of sensors also needs to self-discover. If you are going to add thousands of new sensors into a facility, you can’t afford a time-consuming integration process.”“We are now seeing that engineers are greedy for more data – if they can get the data, it’s becoming a need-to-have,” adds Tom Ho, BISTel America president. “Getting more data from more sensors, from the sensors on the tool that are not being fully utilized, and from untapped data sources like vibration is another big coming opportunity.” Process complexity drives demand for feed-forward between silos with computational models ASML co-optimizes its scanner process with etch and reticle process steps. Source: ASML In addition to the drive for trace-back of data, the increasing complexity of interrelated processes is also driving demand for feed-forward of data. “Feed-forward is becoming more important,” notes Ho. He points to the example of 3D NAND features, now getting so deep that identifying the layer being measured is a challenge unless the signal at the step before can be recognized. “We need partnerships with our peers to understand how to take advantage of the sensors they use, integrate them with our data, and then feed-forward corrections to the other systems,” concurs Callan. “To drive the best CD uniformity and overlay, we need to co-optimize litho and etch,” agrees Henk Niesing, ASML director of product management. He notes that the company is working with etcher makers to measure the overlay and CD, decompose the finger prints, and then use models to steer automated control that best adjusts both the scanner and the etcher. ASML is also working with Zeiss on co-optimization between the scanner and the reticle to make even higher-order corrections by locally modifying the reticle.These higher-order corrections, applied on each exposed field, drive the need for even more data, and at higher speed but without higher cost, notes Jan Mulkens, ASML senior fellow. These corrections increase demand for computational metrology, which combines various metrology sources with physics and deep learning models trained on real data to predict and control process results in real time. “We’re working on computational metrology to ideally use all the knobs we have in the fab,” he says. So far this effort has largely involved linking data between two companies. More consistent data formats would enable data exchange to be extended to more companies. “The software versions also need to be managed for upgrades so they still match after one party updates the system on its tool,” notes Niesing. Speakers on these issues of smart manufacturing and data handling at SEMICON West include Active Layer Parametrics, Applied Materials, Applied Research Photonics, ASML, Cimetrix, Coventor, ECI Technologies, Edwards Vacuum, Final Phase Systems, GE Digital, Infineon, Jabil, Lam Research, Osaro, Otosense, PEER Group, Rockwell Automation, Rudolph Technologies, Schneider Electric, Seagate, Seimens, Stanford University, TEL, TIBCO Software. See semiconwest.org.What’s next for smarter, more connected electronics manufacturing - Part 1What’s next for smarter, more connected electronics manufacturing - Part 3Paul Doe, SEMI
Read More