semiconductor manufacturing

The CxO Summit at SEMICON Europa 2025 spotlighted Europe’s ongoing efforts to build a resilient and globally competitive semiconductor industry, while calling for greater ambition, speed, and unity in execution. Following global disruptions with the automotive supply chain crisis, the European Union launched a continent-wide strategy through the EU Chips Act. While the Act has already spurred significant developments, including construction of the new ESMC fab in Dresden, Europe remains far from its goal of achieving a 20% share of global semiconductor production by 2030. The CxO Summit, part of the SEMICON Europa event in Munich, provided an opportunity for industry leaders to share ideas about how to catalyze the next phase of the European industry’s growth.Ajit Manocha, President and CEO of SEMI opened the summit by describing today’s industry landscape with one word: “unprecedented.” Manocha said, “The global growth of the industry is unprecedented, with 107 new fabs set to come online by 2028, but the uncertainties are unprecedented, from geopolitics to the talent shortage to environmental concerns. So we need unprecedented solutions.” Ajit Manocha, President and CEO, SEMILaith Altimime, President of SEMI Europe echoed the mood of uncertainty, describing Europe as caught “in a perfect storm.” Altimime said, “As we face a combination of internal challenges and intensifying external competition, collaboration is not optional — it is mission critical.” Laith Altimime, President, SEMI EuropePierre Chastenet, Head of the Unit for Microelectronics and Photonics, European Commission, highlighted the tangible progress made under the EU Chips Act. “We now have a proper toolbox to handle a future crisis in the supply chain. The Chips for Europe initiative has led to the creation of five pilot lines for advanced technologies such as FD-SOI and wide bandgap semiconductors.” Chastenet added, “Europe must now capitalize on its strengths, from materials and equipment to design tools and cutting-edge research emerging from our RTOs.”Pierre Chastanet, Head of the Unit for Microelectronics and Photonics, European CommissionEchoing the call for action, Oliver Schenk, Member of the European Parliament, urged stronger regional unity. “Europe must act together, act faster, and act with much bigger ambition,” Schenk said, reinforcing the need for cross-border commitment to strengthen the continent’s semiconductor position.Oliver Schenk, Member of the European Parliament, European ParliamentHighlighting Europe’s most critical technology gap, Luc Van den hove, President and CEO of imec, unveiled plans for a new advanced fab backed by €2.5 billion in investment from the EU, the Flemish government, and ASML. Van den hove urged Europe to commit wholeheartedly to advanced technologies: “We must be more ambitious, and focus on disruptive breakthroughs rather than incremental change if we want to ensure a prosperous future.”Luc Van den hove, President CEO, imecAt the CxO Summit, CEA-Leti and ASML signed a memorandum of understanding (MoU) to deepen their collaboration and accelerate innovation in mainstream semiconductor technologies. Building on promising results in hybrid bonding, the partnership will now target 'More-than-Moore' innovations, including heterogeneous integration and novel substrates like SiC and GaN. “We aim to combine ASML’s world-class lithography expertise with CEA-Leti’s system-level innovation,” said Sébastien Dauvé, CEO of CEA-Leti. The collaboration is set to strengthen Europe’s ecosystem by shortening the path from early research to industrial impact.Left: Anne Hidma, Senior Vice President EUR US, ASML; Right: Sébastien Dauvé, CEO, CEA-LetiTurning to Europe’s industrial base, Christian Senger, CEO of Volkswagen Autonomous Mobility, emphasized the need to shift from risk-aversion to opportunity. While the region’s automotive sector faces intense global competition, particularly from China, Senger highlighted that Europe has the potential to lead in new mobility markets. “The market for autonomous roboshuttles for people transport in large cities is forecast to be worth €400 billion in the US and Europe alone,” he said. With American firms like Waymo and Uber leading the robotaxi space, Senger stressed that Europe must “act swiftly to create an environment that supports an autonomous mobility industry here.”Christian Senger, Member of the Board for Fully Autonomous Mobility and Transport CEO of ADMT GmbH, VolkswagenEurope’s Potential to Create Advanced TechnologyOne of these RTOs, CEA-Leti, is responsible for the FAMES pilot line for FD-SOI technology. Sébastien Dauvé, CEO of CEA-Leti, agreed with Pierre Chastenet that the pilot lines show great promise. He said, “FD-SOI is a big trend in semiconductors, because it enables very low power consumption in embedded devices. We think that adoption of the technology will grow in the coming years, and that is good, because most of the technology is produced in Europe.”Sébastien Dauvé, CEO, CEA-LetiEurope is also widely recognized to be the leading global voice on sustainability – a huge issue of concern to the semiconductor industry. Henri Berthe, President of the Semiconductor and Battery Segment at Scheider Electric, told the summit that 500 million tonnes of CO2 emissions per year are attributable to the semiconductor industry – “more than the whole of Mexico emits!” he said. “We need to make fabs more efficient, and that is why Schneider Electric has launched a new playbook with Applied Materials for sustainable energy abundance for the industry.”Henri Berthe, President of the Semiconductor Segment, Schneider ElectricAnother aspect of Europe’s playbook is support for new fabs. The flagship is ESMC, the joint venture between TSMC, NXP Semiconductors, Bosch, and Infineon. Christian Koitzsch, president and managing director of ESMC, reported to the summit that the project to build in Dresden a 12nm FinFET foundry and a 28nm CMOS line, requiring a total investment of €10bn, is on schedule. “We are now developing local supply chains, hosting a series of ESMC Supplier Days which are open not only to German but generally to European suppliers,” said Koitzsch.Christian Koitzsch, President and Managing Director, European Semiconductor Manufacturing Company (ESMC)As Manfred Horstmann, General Manager and Senior Vice President of Global Foundries, pointed out, the building of the ESMC fab means that Dresden is established as the center of a cluster of semiconductor industry companies. “Global Foundries has its Fab 1 and a mask center in Dresden. In fact, one-third of the chips produced throughout the whole of Europe now comes from Dresden.”Manfred Horstmann, General Manager and Senior Vice President, GlobalFoundriesAn example of ambition was given by Terence Gan, Executive Director of the Institute of Microelectronics of Singapore. Gan told the summit how Singapore has used pilot lines to stimulate research and development in new technologies. He said: “We started research into advanced packaging as long ago as 2011. Most people thought we were mad! But today, there is strong demand for our advanced packaging capabilities because of the rise of AI and its need for high-performance computing.”Terence Gan, Executive Director, Institute of MicroelectronicsBreaking Barriers to ProgressDespite momentum, bureaucratic inefficiencies continue to hamper progress. Narjiss Haddaoui, Managing Director of European Economics called for faster decision-making: “In global competition, speed is a decisive factor. To act fast enough, the EU must change its ‘software’ - the processes by which it considers and makes decisions.” Narjiss Haddaoui, Managing Director, European economicsThe stifling character of European bureaucracy is reflected in the region’s approach to building fabs. Herbert Blaschitz, Executive Vice President of Advanced Technology Facilities at Exyte, compared fab construction timelines: 20 months in Taiwan, 34 in Europe, and 38 in the U.S., attributing delays in Europe to paperwork bottlenecks.Herbert Blaschitz, Executive VP of Advanced Technology Facilities, ExyteFabio Gualandris, President for Quality, Manufacturing and Technology at STMicroelectronics raised another concern — 100% of raw materials used in European fabs come from outside the region. Christophe Frey, Vice-President for EU Engagements at Arm France, added that geopolitical tensions are clouding the path forward: “We are a bit lost in the smoke from the big fire in the world’s semiconductor industry.” Fabio Gualandris, President Quality, Manufacturing Technology, STMicroelectronics Christophe Frey, Vice-President of EU Engagements, Arm FrancePlaybooks For Future SuccessSo amid the uncertainty and global tension, what lessons can the industry learn from successful regional examples? Tuomas Korpela, Business Development Senior Manager at Nokia, credited Finland’s strategic procurement and policy tools with enabling a vibrant semiconductor ecosystem: “Finland creates demand for advanced chips using industrial policy tools, alongside strategic procurement in sectors such as defense and aerospace, and connectivity.” Tuomas Korpela, Business Development Senior Manager - Corporate Development Organization, NokiaAt a regional level, Joerg Schulze, Director of the Bavarian Chips Alliance, said that his organization was supported by the Bavarian State Ministry of Economic Affairs, as well as by companies and universities. “We help semiconductor companies to establish themselves and grow here through help with site searches, networking and contacts, funding and support, and talent acquisition,” said Schulze.Joerg Schulze, Spokesperson for the Bavarian Chips Alliance, Director of the Fraunhofer IISB, Bayern Innovativ GmbHCompanies in the European semiconductor supply chain also provided the summit with their insights into the roots of global success. André Grede, Chief Technology Officer of Comet, described how his company’s strategy is not to wait for customers to tell it what they need, but to be “ahead of the curve.” Grede said: “Is staying in sync with the customer enough? Not for us - we are deeply embedded with our customers, and constantly looking to broaden our relevance to them.”André Grede, CTO, CometChristophe Maleville, Chief Technology Officer of Soitec, provided a real-world example of how this is done. He said: “Our engineered substrates using RF-SOI technology reduce the drain on a mobile phone’s battery power, and cut our customers’ board footprint thanks to RF front end integration. As a result, our products are now in 100% of 5G smartphones.”Christophe Maleville, CTO, SoitecAnne Hidma, Senior Vice-President for Europe and the US at ASML, shared the company’s success formula: “The reasons for ASML’s success include customer focus – decide which markets you are going to be in, and which you are not. We are also all-in on innovation. We nurture an ecosystem, which for us includes imec and CEA-Leti, as well as partnerships with academia. And lastly, we have a strong supply base, which is a core strength of Europe.” In a time marked by both uncertainty and opportunity, the example of ASML shows how the European semiconductor supply chain can survive and thrive.Anne Hidma, Senior Vice President EUR US, ASMLEurope’s Path ForwardThe CxO Summit made one thing clear: Europe has world-class innovation, policy momentum, and industrial commitment. What’s needed now is faster execution, deeper collaboration, and the courage to invest in the technologies of tomorrow. As the industry heads toward the $1 trillion milestone, the decisions made today will shape Europe’s place in the semiconductor world for decades to come.On behalf of SEMI, the SEMI Europe team would like to express appreciation to the industry leaders for sharing their visions and readiness to collaborate during the CxO Summit.SEMI ContactLaith Altimime, President SEMI [email protected]

Extended Plateau, Not a New Cycle: The Broader Industry PictureThe current recovery in the semiconductor market appears to signal revival, yet is best understood as an extended phase of the existing cycle—a phase defined less by renewed demand than by structural restraint and efficiency-driven realignment.AI-related demand is indeed driving the rebound, yet this recovery differs fundamentally from past expansionary booms. It is unfolding within an efficiency-driven adjustment phase, where capital expenditure has shifted its focus from capacity expansion to process upgrades and optimization. The observed recovery therefore reflects structural realignment rather than a conventional cyclical upswing.This realignment has created an ‘Extended Peak Plateau’—a state not of cyclical acceleration but of structural transformation. The imbalance between resilient equipment and materials spending and stagnant wafer shipments has produced an uneven recovery, concentrated in select high-value segments rather than evenly across the value chain. The apparent plateau seen today stems less from broad-based demand expansion than from price-anchored growth, sustained by firm pricing in premium segments such as AI-related and high bandwidth memory (HBM) products.At the same time, semiconductor manufacturers—particularly in memory—have adopted a supply-controlled operational strategy, emphasizing process optimization and product upgrades over large-scale capacity additions. Together, these three structural forces—supply/demand imbalance, price-anchored resilience, and efficiency-oriented adaptation—have defined the industry’s current phase, where revenue growth remains elevated but plateaued rather than accelerating or decelerating.In this context, the recent rise in DRAM prices and continued hyperscaler investment hold implications beyond short-term variables: They determine whether the industry can sustain equilibrium without widening the amplitude of future cycles between overheating and contraction. If DRAM recovery remains purely supply-driven, the upturn will likely be shallow; conversely, a slowdown in hyperscaler investment could undermine the demand foundation itself.This is why the report characterizes the current phase not as a “new cycle” but as an extended plateau. While AI-driven momentum has already taken hold, the transition toward a stable and balanced industry structure must pass through the filter of efficiency. This efficiency-based rebalancing will, in all likelihood, require a period of adjustment before a truly sustainable equilibrium — the foundation for the next phase of genuine growth — can emerge.Desynchronization Between Investment and Wafer Demand: Evidence of a Structural ShiftThe chart below visually illustrates this structural asymmetry. When normalized to Q1 2019 = 100, as of Q2 2025 equipment investment has rebounded to roughly 244, photoresist revenue to 200, and total semiconductor revenue to 184—yet wafer shipments remain near 110 and wafer revenue around 103.Diverging Trends Across the Semiconductor Value Chain (Q1 2019 = 100) * Note1. Data sources: SEMI (WWSEMS, Silicon Wafer Shipment, Photoresist Market Data), WSTS, and IR disclosures from the top five wafer suppliers.2. Wafer revenue reflects the aggregated sales of the top five suppliers; Shin-Etsu’s quarterly figures are estimated from 2Q 2021 onward.3. Semiconductor fab equipment investments reflect only wafer-processing equipment (WFE) expenditures, based on the Wafer Processing Equipment category defined in SEMI’s WWSEMS dataset. All indices are normalized to Q1 2019 = 100; wafer area shipments are originally reported in million square inches (MSI), while other indicators represent revenues or investments in U.S. dollars (USD). The data clearly indicate that while equipment and materials have rebounded, wafer shipments and related revenue remain subdued. This divergence is not a matter of cyclical timing; rather, it reflects a re-alignment of the industry’s recovery dynamics, driven by process complexity and efficiency-oriented capital deployment. In other words, the widening gap between investment and wafer industry output symbolizes the industry’s transition from expansion-driven growth to efficiency-driven operations.In previous cycles, the linear linkage of “investment expansion → production expansion” prevailed. Today, however, investment is now synonymous with process-efficiency improvement rather than capacity growth. Behind this shift lie longer cycle times, rising process complexity, and the increasing concentration of demand in AI-related nodes. More complex manufacturing now requires process sustainment, advanced process control, and continual upgrades—CapEx allocation now reflects this shift.At the same time, a clear gap has emerged between wafer revenue and shipment growth, underscoring the divergence between financial recovery and physical output. In other words, shipment volumes have improved, but average selling prices remain subdued, signaling that the recovery is not demand-driven. This indicates that the current phase is sustained not by broad-based demand expansion, but by selective growth achieved through efficiency gains and product-mix adjustments. Despite this widening gap, the industry may give the outward impression of a steady growth plateau, since CapEx spending and high-value segments continue to post solid growth. Yet what appears as stable growth in the semiconductor and equipment market could be, in fact, a structural illusion—a state shaped by process complexity, efficiency-driven investment, and deliberate product-mix management. In short, this perceived growth is the by-product of financial and supply discipline, not the result of renewed demand momentum.Realignment of the Wafer Industry: A Gradual 300 mm-Led Shift Anchored in Efficiency and Portfolio StrategyAs the broader semiconductor ecosystem shifts its focus from expansion to efficiency—and from scale to high value and customer reliability—wafer manufacturers are, in turn, redefining their competitive edge around operational efficiency and the stable delivery of high-value products. The 300 mm wafer segment continues to lead the recovery, whereas 200 mm wafer shipments remain significantly below its 2022 peak, constrained by sluggish demand from legacy and non-memory applications. On the profitability front, depreciation burdens and persistent pricing pressure are creating dual headwinds.To navigate this environment, leading wafer suppliers are pursuing a dual-track approach: renegotiating long-term supply agreements (LTAs) while managing short-term contracts and selective and disciplined pricing to sustain utilization. At the same time, they are optimizing product portfolios to balance cash-flow defense with strategic offense. In this context, the critical question is shifting from “How much can be sold?” to “What kind of portfolio—specifically, how consistently can high-value wafers be sold and delivered?”In essence, performance is now measured less by expansion and investment scale, and more by efficiency, sustainability, and reliability. This strategic realignment mirrors the broader efficiency-driven transition underway across the semiconductor value chain, underscoring that the wafer industry is no exception to the global shift toward disciplined, portfolio-centric growth.Conclusion: The Path to True Recovery — When Three Forces AlignIn summary, the current semiconductor market is best understood as having entered an extended plateau following the peak of the present cycle, with its future trajectory hinging on how effectively DRAM price resilience and Big Tech investment continuity can restore balance. In essence, the outcome will depend on the market’s ability to narrow the amplitude between overheating and contraction, moving toward a more sustainable equilibrium. Rather than focusing on the DRAM price rebound driven primarily by supply adjustments or on demand concentrated in specific sectors, what truly matters for the wafer industry is the structural alignment of three key forces: (1) the recovery of broad-based and genuine demand, (2) the stabilization of the semiconductor supply structure, and (3) the improvement of operational efficiency across the value chain. The moment these three forces align will signal the true onset of the next upcycle — not only for the broader semiconductor market, but also for the global silicon wafer industry.Such alignment rarely occurs quickly — it requires time, discipline, and structural patience.This article distills the key insights from the Market Update section of the Q3 2025 Silicon Wafer Market Monitor Report. In this quarter’s analysis, the focus lies on the semiconductor cycle’s transition into an Extended Peak Plateau — a phase characterized not by broad-based expansion, but by efficiency-driven operations and portfolio realignment. Drawing on shipment, revenue, and CapEx data across wafers, materials, and equipment, this section identifies structural asymmetries between investment and shipment dynamics, and explores how efficiency gains, product-mix optimization, and supply discipline are reshaping the industry’s recovery trajectory.Separate from this focused article, the full SEMI Silicon Wafer Market Monitor Report provides a wider array of charts and indicators, offering a multidimensional perspective on how key variables interact to shape the future of the global wafer industry. Rather than serving as background commentary, the full report aims to deliver data-driven, decision-ready insights that support strategic thinking amid persistent market uncertainty.For more information on the report or to subscribe, please contact the SEMI Market Intelligence Team at [email protected]. Details on SEMI market data are available at SEMI Market Data. Sungho Yoon is a Principal Analyst on the SEMI Market Intelligence team.

The semiconductor industry faces an unprecedented paradox: AI demand is booming, fab investments are rising, yet wafer shipments remain stubbornly flat. What's driving this disconnect, and when will it break?As of mid-2025, the global silicon wafer market appears calm on the surface, but underlying structural tensions are quietly mounting. The demand for AI semiconductors remains resilient, and certain high-value supply chains continue to operate near capacity. Yet wafer shipments have shown little sign of meaningful recovery—a divergence that raises questions about the conventional supply-demand playbook.SEMI's latest Silicon Wafer Market Monitor Report begins with a structural hypothesis: that the current market dynamics cannot be explained solely by weak demand or delayed orders. Instead, we propose that the demand pattern of fab operations itself has fundamentally changed.The Hidden Constraint: Time ExtensionOne critical metric has emerged as a structural bottleneck—fab cycle time, or the average duration for a wafer to complete its full process flow. Our quantitative analysis reveals that since 2020, fab cycle times have grown at a compound annual growth rate of 14.8%. This represents a fundamental deceleration in fab throughput, meaning that even with the same number of tools and consistent utilization rates, the volume of wafers that can be processed is now structurally constrained.Why is this happening? Rising process complexity, increased equipment density, and tighter quality control requirements are absorbing more capital per wafer while paradoxically slowing production. Equipment spending per wafer area has surged over 150% since 2020, yet this investment translates into longer processing times rather than higher throughput.The High Bandwidth Memory (HBM) Economic ThresholdSimultaneously, the market is approaching a new inflection point driven by the rapid rise of HBM. HBM wafers consume over three times more wafer area per bit compared to standard DRAM, creating potentially significant wafer demand. However, HBM currently accounts for just 16% of total memory revenue—still below a critical economic threshold.Our analysis identifies that when HBM reaches 25% of total memory revenue, the trade ratio rises to 1.5. This is the structural breakeven point where CapEx per wafer for HBM-dedicated lines aligns with standard DRAM economics. At this threshold, memory makers gain clear incentives to expand wafer input, and customers become more willing to pay premium prices.The Quantitative FrameworkInstead of relying on conventional forecasts, we model the interaction of four critical variables—HBM penetration, DRAM bit growth, fab utilization, and cycle time—using a quantitative simulation framework. Under current conditions (16% HBM revenue share, 15% annual bit growth, 95% fab utilization, and 14.8% cycle time increase), wafer input would need to increase by 23.9% annually to meet projected demand.Yet no fab is scaling wafer input to that extent today. This suggests the market isn't demand-constrained but operating within a conditionally responsive system—one that won't activate until key thresholds align.Beyond Economics: Technical and Operational ReadinessThe slow pace of HBM expansion isn't solely about investment timing. Technical constraints including low yields, delayed customer qualification, and process stabilization challenges also play critical roles. These preconditions—investment readiness, yield optimization, and qualification completion—haven't yet aligned, keeping the market in strategic latency despite robust underlying demand.Additional factors compound this delay. Backend bottlenecks in Chip-on-Wafer-on-Substrate (CoWoS) packaging are causing semi-finished wafers to accumulate as inventory, constraining upstream wafer input. At the fab level, companies prioritize efficiency gains through process conversions over new construction. Meanwhile, macroeconomic uncertainty, geopolitical tensions, and foreign exchange volatility continue suppressing capital execution.The Three-Tier Response ModelThis structural shift creates a three-tier demand response across the supply chain:Wafer demand: Conditionally responsive, awaiting economic threshold alignmentEquipment investment: Process-transition driven, already responding to complexity increasesMaterials demand: Directly tied to cycle time extensions, with potential for early bottlenecksFor certain process-critical materials like EUV photoresists and TSV chemicals, supply constraints may emerge even before wafer input fully ramps, preceding equipment expansion.Strategic ImplicationsFor industry stakeholders, this analysis suggests three key actions: wafer suppliers should prepare scenario-based capacity plans around the 25% HBM threshold; equipment makers should anticipate process-transition driven demand regardless of current wafer volumes; and materials suppliers should prepare for potential bottlenecks as extended cycle times increase consumption per wafer.Crucially, the current stagnation shouldn't be interpreted as structural decline. Rather, the market exists in a state of strategic readiness, with key conditions not yet aligned. Once they are, wafer demand will likely respond nonlinearly—and momentum is already building in that direction.The structural inflection point (≈25% HBM penetration) and cycle time increase (+14.8%) serve as forward-looking indicators not just for wafer producers, but for the entire upstream supply chain. The question isn't whether this inflection will occur, but when. Companies that understand these structural dynamics and prepare accordingly will be best positioned to capitalize on the nonlinear demand response when it arrives.These key insights are from the market update section of the Q2 2025 Silicon Wafer Market Monitor Report. This quarter's analysis models structural inflection points using scenario-based projections across nine core charts and tables, offering data-driven perspective on the industry's readiness for the next demand shift. Download your free sample report today.For more information on the report or to subscribe, please contact the SEMI Market Intelligence Team at [email protected]. Details on the complete SEMI market data portfolio are available at our Market Intelligence website. Sungho Yoon is a Principal Analyst in the Silicon Wafer Market Research at SEMI Market Intelligence.

The semiconductor industry has long followed a well-defined cyclical structure. Typically, price declines lead to a contraction in capital expenditure, followed by inventory normalization and eventual recovery. This repeated pattern—comprising pricing correction, investment pullback, inventory adjustment, and eventual market rebound—continues to offer a relevant lens through which to interpret the current uncertain market environment.As of April 2025, the industry faces a mix of conflicting signals. Concerns are rising that AI-related demand may have already peaked, while cautious optimism persists over a possible rebound in DRAM prices in the second half of the year. These market dynamics are further complicated by rising macroeconomic uncertainty, including renewed trade friction between the U.S. and China, reemerging tariff risks, and persistent inflationary pressure. In such a complex and volatile environment, the importance of cycle-based structural analysis has never been greater.Viewed from a momentum perspective, the recovery in semiconductor equipment investment—marked by a rebound in year-over-year growth (measured on a 12-month moving average basis) beginning in mid-2024—can be interpreted as a potential sign of renewed demand. However, this apparent stability may be misleading. While global companies significantly curtailed their fab investments throughout the second half of 2023 and the first half of 2024, China moved in the opposite direction, intensifying state-led expansion efforts aimed at achieving semiconductor self-sufficiency. This divergence in investment behavior has distorted the global capital expenditure landscape, potentially creating the impression of a broader recovery, while in reality the momentum remains concentrated in a single region driven by policy rather than market fundamentals.Similarly, the recent uptick in DRAM pricing appears to be driven more by production cuts than demand-side momentum. Major suppliers have been deliberately scaling back output to manage inventory and support pricing. In this context, price rebounds not backed by end-market demand are unlikely to sustain a meaningful recovery in wafer procurement. Simulation results—based on second-half projections—suggest that unless DRAM blended ASP increases by more than 20% quarter-over-quarter in both Q3 and Q4 2025, a meaningful upward inflection in the year-over-year pricing trend (on a 12-month moving average basis) remains improbable. This highlights the fragility of the current price recovery suggests that without a meaningful improvement in end-market demand—particularly for DRAM—wafer procurement for DRAM production is unlikely to recover in a sustained manner, regardless of supply-side actions. As SEMI highlights in this Silicon Wafer Market Monitor Report, a deeper understanding of the wafer market requires a close examination of raw material inventory trends. The inventory behavior of memory makers—due to their dominant scale and transparency—is widely regarded as a proxy for broader semiconductor industry trends. Following the pandemic, memory makers' raw material stockpiles surged to levels equivalent to five times their historical average relative to sales. While these ratios were significantly reduced between 2023 and 2024, inventory levels still meaningfully exceed pre-pandemic norms. With leading players signaling further inventory drawdowns, there is little incentive to rebuild raw material stockpiles—including silicon wafers—unless there is clear evidence of sustained demand recovery.This inventory dynamic is closely tied to wafer shipment growth. Historical data reveals a strong inverse relationship between raw material inventory-to-sales ratios at the top three memory makers—Samsung, SK hynix, and Micron—and wafer shipments. When this ratio declines year-over-year, wafer shipment growth typically improves. However, a slowdown in the pace of inventory ratio reduction could result in stagnant or declining wafer shipment growth in subsequent periods.Moreover, even as these inventory ratios continue to decline, wafer average selling prices (ASPs) have yet to show signs of recovery. This decoupling of pricing from inventory adjustments reflects the presence of a structural imbalance in supply and demand. On the supply side, all top five global wafer producers have secured greenfield fab capacity and are prepared to scale production. With depreciation pressures mounting, they face strong incentives to maintain economically viable utilization rates, contributing to ongoing ASP erosion.Meanwhile, chip capacity expansion in China—primarily driven by demand for 200mm applications—is adding further downward pressure. Chinese wafer suppliers, who already hold a meaningful share in China’s 200mm market, are now directing more of their investment toward 300mm wafer production—intensifying price pressure and adding to the longer-term competitive pressures facing global suppliers. This focus aligns with China’s broader push into mature process nodes, even as demand outside the region remains tepid. Accordingly, local Chinese wafer suppliers are competing aggressively on price, weakening the regional competitiveness of established global wafer players.As a result, the competitive landscape is undergoing a structural shift: global wafer suppliers are contending with intensified price-based competition among themselves in non-China markets, while simultaneously coming under mounting pressure from Chinese local players within China. This dual-front competition highlights the threshold point the industry has reached—where traditional pricing models and market dynamics are being fundamentally challenged.Moreover, long-term supply agreements (LTAs), once effective tools for pricing stability, are expected to gradually lose relevance. As semiconductor manufacturers—who purchase wafers under LTAs—move toward shorter-term and more customized purchasing models, and as pricing volatility increases, the incentive to commit to such agreements is projected to steadily diminish. The market, therefore, is not yet in a phase of strong recovery but appears to be undergoing a structural transition defined by persistent imbalances. The full report presents three scenario-based outlooks centered on four key variables—DRAM pricing, inventory normalization, equipment investment, and China’s regional influence. The most probable scenario currently assumes modest growth in 2025–2026, a correction in 2027, and a recovery in 2028. Wafer shipment growth rates under this scenario are projected at +5.1%, +5.4%, –6.2%, and +9.8%, respectively.However, even this base case remains vulnerable to potential macroeconomic disruptions. The large-scale tariff measures announced by the U.S. in April 2025 could trigger cascading effects across the ecosystem—from weakening enterprise demand and delaying infrastructure investments to softening DRAM prices and curbing wafer procurement. In past cycles, leading macro indicators such as the OECD Composite Leading Indicators (CLI) tended to lead DRAM price movements. If macro momentum slows, the market could deviate from the base case and move closer to the downside scenario. This downside scenario assumes weak or negative growth through 2026, a moderate recovery in 2027, and a stronger rebound by 2028 as supply-demand conditions begin to normalize.The current market trajectory suggests limited room for either sharp declines or sharp rebounds. The next phase will depend on how four forces interact: DRAM price momentum, inventory rebalancing pace, regional investment activity, and policy risks. A clear inflection point will only emerge when these factors begin to align. In other words, a meaningful shift—either upward or downward—will only occur when these forces move in the same direction and reinforce one another. Ultimately, any directional shift—whether delayed or accelerated—will still unfold within the broader framework of the semiconductor cycle previously discussed. In that sense, these indicators do not reverse the cycle itself; they merely influence the timing and pace at which it plays out.This article presents a summary of key insights from the Q1 2025 Market Update section of the SEMI’s Silicon Wafer Market Monitor Report, which is compiled in PowerPoint format and distributed as a PDF. In this edition, scenario-based analysis was used to navigate growing macroeconomic uncertainty and assess potential turning points in wafer demand. To support this analysis, the Market Update section presents 10 core quantitative charts and long-term data series dating back to 2000—particularly curated to visualize and analyze semiconductor revenue, investment, and pricing cycles in a single view. Separate from this focused section, the full SEMI’s Silicon Wafer Market Monitor Report includes a much broader array of charts and indicators, providing a multi-dimensional analysis of how fundamental variables interact to shape the future of the silicon wafer industry. Rather than simply offering background explanation, the full report is intended to provide clear, data-driven insights that can support strategic thinking amid market uncertainty.For more information on the report or to subscribe, please contact the SEMI Market Intelligence Team at [email protected]. Details on SEMI market data are available at SEMI Market Data. Sungho Yoon is a Principal Analyst on the SEMI Market Intelligence team.

New pilot lines offer European innovators access to the most advanced semiconductor technologies for product development and validation.The global semiconductor landscape has undergone significant transformation in recent years. With disruptions such as the semiconductor supply chain crisis and the challenges it posed to the automotive sector, Europe’s dependence on external fabrication facilities, particularly in Taiwan, has become a pressing concern. In response, the European Union (EU) introduced the EU Chips Act, a comprehensive framework designed to reduce this reliance and boost Europe’s share of the global semiconductor market. ITF Chip into the Future, hosted by imec at SEMICON Europa 2024, was a pivotal event that brought together industry leaders, policymakers, and experts to explore the implementation of the EU Chips Act and the future of Europe’s semiconductor ecosystem. Jari Kinaret, Executive Director of the Chips Joint Undertaking (Chips JU)—the body overseeing the EU’s semiconductor investments—explained, “The Chips JU is about capacity building to drive semiconductor innovation in Europe. We will continue to be dependent on the rest of the world, but we want to make sure that the rest of the world depends on us as well.” Jari Kinaret, Executive Director, Chips JUEuropean research is driving progress towards sub-nanometer fabricationOne of the pilot lines, located at imec’s research center in Belgium, is focused on advancing methods that push Moore’s Law forward by achieving smaller and more efficient circuit features. As Luc Van den hove, President and CEO of imec, explained, “imec is now powering innovation for tomorrow’s chip designs, including stacked layers of chips, with each layer containing specific functionality implemented on chip processes optimized for each function. This allows us to scale much further than if all functionality had to be implemented on a single monolithic layer.”Luc Van den hove, President and CEO, imec Another pilot line, based in France and operated by CEA-Leti, is focused on pushing the limits of technology across multiple dimensions. CEA-Leti CEO, Sébastien Dauvé, explained that the goal of the FAMES pilot line is to advance “not only FD-SOI at 10nm and 7nm nodes, but also novel non-volatile memory technologies, RF components, 3D integration, and the development of small inductors for DC-DC converters.” Sébastien Dauvé, CEO, CEA-LetiAdvancements in 3D integration and chiplet technologies are closely tied to innovation in chip packaging. Christoph Kutter, Executive Director of Fraunhofer EMS, described how the Advanced Packaging and Heterogeneous Integration for Electronic Components and Systems (APECS) pilot line in Germany is designed to meet the needs of industrial customers’ growing demand for advanced packaging solutions. Kutter noted “Customers told us that they needed to integrate logic and power, sensors and logic, and other combinations of functions. We have built the APECS pilot line to provide what they asked for.”Christoph Kutter, Executive Director, Fraunhofer EMSThe EU Chips Act is spurring investments not only in chip fabrication but also in the underlying technologies which support chipmaking. Emmanuel Sabonnadière, EVP at Soitec, highlighted how fabrication of advanced silicon carbide (SiC) power devices “is enabled by SmartSiC™ technology from Soitec – part of a built-in-Europe solution for silicon carbide.” Sabonnadière explained that SmartSiC technology “creates very thin layers of SiC material which make really differentiated substrates supporting the production of high-performance SiC devices.” Emmanuel Sabonnadière, EVP, SoitecInnovation in materials emerged as an important theme at ITF Chip into the Future. Julien Arcamone, Vice President of Corporate R D at ASM, described the critical role of materials for atomic layer deposition (ALD) in the advancing 3D semiconductor integration. Arcamone emphasized the importance of collaboration across the semiconductor value chain, describing ASM’s partnership with imec as part of “a win-win ecosystem.” Julien Arcamone, Vice President of Corporate R D, ASMDeveloping the skills to implement advanced semiconductor technologiesWhile the EU Chips Act is subsidizing the construction of new facilities including pilot lines needed for the hardware of the semiconductor industry’s expansion – the ITF speakers underlined the equally important “software” element of the semiconductor industry ecosystem: the knowledge and expertise of the people working in the industry. One of the biggest challenges in implementing the EU Chips Act is addressing Europe’s talent gap. Katrien Marent, Executive Vice President and Chief Marketing and Communications Officer at imec, said that the gap is in part “because students who graduate in STEM subjects are not trained in advanced semiconductor technologies.” From left to right: Katrien Marent, Executive Vice President and Chief Marketing and Communications Officer, imec; Julien Arcamone, Vice President of Corporate R D, ASM; Thomas Heurung, CEO, Siemens EDA; Frédérique Le Grevès, President STMicroelectronics France and Executive Vice President, Europe France Public Affairs, STMicroelectronics; Romano Hoofman, Director imec.IC-link, imec; and Christophe Frey, Vice-President of EU engagements Managing Director, ARM.Thomas Heurung, CEO of Siemens EDA, highlighted the need for educational reform in the electronics industry. He suggested that “we might not have the right degree-level curriculum for changing times in the electronics industry. We need to change the way that we train students at university, and we need more scope for early or mid-career training on specialist micro-curriculums aimed at a particular skill or knowledge set.”The industry also struggles to attract individuals. Frédérique Le Grevès, President of STMicroelectronics France and Executive Vice President, Europe France Public Affairs of STMicroelectronics, emphasizes the importance of rebranding the industry to attract new talent. She remarked, “The word ‘semiconductor’ itself isn't very exciting—it’s even off-putting to some. By simply changing the name of educational programs, we’ve seen significant increases in enrollment. This demonstrates the power of language in shaping perceptions and interest.”Thomas Heurung of Siemens EDA also called for a stronger emphasis on entrepreneurship, noting “there is a big contrast between Europe and the US, particularly Silicon Valley.” He explained how his company’s Cre8Ventures unit had been set up to help start-ups through the key stages of creating a successful new company, including product development, attracting funding, and bringing the product to market. Thomas Fleischmann, Program Manager at Robert Bosch, explained how the EU Chips Act has accelerated the formation of the European Semiconductor Manufacturing Company (ESMC) joint venture, in which Bosch is a key stakeholder. ESMC is building a new semiconductor fabrication plant in Dresden, dedicated to producing chips for the automotive and industrial sectors. Fleischmann emphasized that ESMC will play a crucial role in helping Europe “scale advanced technologies to high volumes at a competitive cost.”In addition, the EU Chips Act also provides a broader platform for the expansion of Europe’s deep tech capacity. This includes the creation of five pilot lines, which will offer European companies access to manufacturing capacity for prototyping at the most advanced semiconductor technology nodes.Thomas Fleischmann, Program Manager, Robert BoschITF Chip into the Future at SEMICON Europa 2024 highlighted the broad scope of the EU Chips Act – not only supporting the building of advanced fabs but also providing the foundations for technology development, production, and marketing – all aimed at supporting semiconductor innovation in Europe. SEMI ContactMaria Daniela Perez, Communications ManagerEmail: [email protected]

Leaders in the semiconductor industry are finding ways to balance rapid demand growth with strategies to mitigate the risks of geopolitical uncertainty and a complex supply chain.At the CxO Summit during SEMICON Europa, industry leaders gathered to share insights into the immense opportunities ahead for the semiconductor sector, as well as the challenges that could impede growth. Laith Altimime, President of SEMI Europe, highlighted how discussions last year centered on reaching $1 trillion in global sales by 2030. “The conversation today is about how far above $1 trillion we will be in 2030,” said Altimime. “Artificial intelligence is an amazing and exciting technology, and the semiconductor industry is at the heart of it.”Laith Altimime, President, SEMI EuropeAjit Manocha, President and CEO of SEMI, described the current state of the semiconductor industry with one word – “unprecedented.” Emphasizing quantum computing as the next growth driver after AI, Manocha urged leaders to prepare for the next landmark - $4 trillion in global sales by 2040. However, the challenges facing the industry are equally unprecedented. Manocha identified four key obstacles: geopolitical volatility, the Net Zero challenge, the competition for top talent, and supply chain disruptions. “We need to work together to solve these challenges – we need unprecedented collaboration,” he explained. Ajit Manocha, President and CEO, SEMIA European Perspective on the Industry’s ChallengesWith the CHIPS Act in the US and the European Union (EU) Chips Act, the industry is also seeing unprecedented governmental engagement. Gustav Kolbe, Acting Director of Enabling and Emerging Technologies at Directorate-General for Communications Networks, Content and Technology of the European Commission, explained that Europe had been deeply impacted by the effect of trade tensions and supply chain disruptions. “In the field of semiconductors, we realized that we cannot keep doing business as usual and expect to achieve more resilience and reduced dependence on non-European supply chains,” Kolbe said. Gustav Kolbe, Acting Director of Enabling and Emerging Technologies, DG CONNECT, European CommissionJari Kinaret, Executive Director of the Chips Joint Undertaking (Chips JU), which is responsible for implementing EU Chips Act programs, described how its projects amplify the effect of EU funding by leveraging matching contributions from member states and participating companies. “This means that our budget of €4 billion actually produces investments in the semiconductor industry of about €11 billion,” he noted. Jari Kinaret, Executive Director, Chips JUThe Chips JU funded projects are designed to position Europe at the forefront of advanced semiconductor technology. Belgium’s imec, for example, is operating a Chips JU pilot line focused on leading-edge semiconductor innovation. Luc Van den hove, President and CEO of imec, highlighted the potential for 3D integration, “We can now combine multiple chips through silicon interposers with very fast connectivity between them. This allows us to build compute platforms which are far larger than what can be made with a single silicon chip,” he explained referring to this approach as “CMOS 2.0.” However, Van den hove warned that Europe cannot achieve its goals alone, emphasizing the complex semiconductor value chain and the need for collaboration. “Self-sufficiency leads to mediocrity,” he warned, advocating for a global approach that leverages the “best of the best.”Luc Van den hove, President and CEO, imecStephan Haferl, Chief Executive Officer of Comet Group, introduced the CA20, a tool designed to improve efficiency and quality in semiconductor manufacturing. The CA20 uses advanced imaging and AI to quickly identify and address production challenges, such as defects in solder bumps, without damaging components. Now fully automated, it integrates smoothly into factory workflows, providing real-time information to help manufacturers maintain high standards and increase production yields. This innovation highlights the role of new technologies in overcoming key obstacles and driving progress in the semiconductor industry.Left to right: Isabella Drolz, Vice President Marketing Product Strategy, Comet Yxlon; Laith Altimime, President, SEMI Europe; Stephan Haferl, Chief Executive Officer, Comet Group; and Dionys van de Ven, President, Comet YxlonCarlos Mazure, Chief Strategy Officer at Institute of Microelectronics – A*STAR in Singapore, illustrated this point by highlighting the institute’s focus on advanced packaging, a key Singaporean strength. “We have built a state-of-the-art 300mm prototyping line, enabling companies to implement wafer-to-wafer and chip-to-wafer bonding as well as fanout chip packaging,” Mazure said. Carlos Mazure, Chief Strategy Officer, Institute of Microelectronics – A*STARTurning back to Europe, Pierre Barnabé, CEO of Soitec, highlighted materials science as a regional strength. Soitec’s engineered substrates are driving energy efficiency breakthroughs in electronic, acoustic, and photonic applications. “We can bond anything to anything, creating advanced substrates for any active layer,” Barnabé explained. Pierre Barnabé, CEO, SoitecKai Beckmann, Member of the Executive Board and CEO Electronics at Merck KGaA, Darmstadt, Germany, also emphasized the role of materials in enabling sustainable growth. “The semiconductor industry faces a challenge with the contribution of process gases to its total greenhouse gas emissions. We hope to solve the problem by using AI to support materials research, and to design new molecules – an approach we have learned from the pharmaceuticals industry,” Beckmann shared. Kai Beckmann, Member of the Executive Board and CEO Electronics, Merck KGaA, Darmstadt, GermanyCollaboration Strengthens the Semiconductor Supply Chain Despite the breadth of enabling technologies emerging from Europe, the rapid growth in semiconductor demand has not always been matched by a secure supply. Barbara Frenkel, Member of the Executive Board Purchase at Porsche, shared that the company is collaborating with the industry to improve its access to the chips needed for automotive electrification. This includes joining industry groups such as the SEMI Global Automotive Advisory Council (GAAC) and, as she said, “learning your language.” Frenkel added, “Porsche aims to emulate Apple’s approach with Intel and Motorola to drive innovation – we will do the same with suppliers of automotive chips.”Barbara Frenkel, Member of the Executive Board Purchase, PorscheAnother solution to supply constraints is to widen the supply pipeline. John Behnke, General Manager for Smart Manufacturing at Inficon, described how smart technology can significantly improve efficiency and output. “A semiconductor fab is 100 times more complicated than anything else in the world – it is a mathematical nightmare to model it. That gives massive opportunities for improved productivity if we can implement smart control technologies,” Behnke explained. John Behnke, General Manager for Smart Manufacturing, InficonThe Challenge of Achieving Sustainable GrowthWhile the prospect of exceeding $1 trillion in annual sales energizes the industry, there is widespread recognition that growth must not come at the expense of environmental responsibility. As the industry doubles in size in the 2020s, it cannot afford to double its use of resources, such as energy or greenhouse gas emissions. Frédéric Godemel, Executive Vice President for Power Systems and Services at Schneider Electric, shared that the biggest impact on sustainability could come from “energy frugality” – using energy more efficiently. He explained that implementing data fusion in a semiconductor fab – combining detailed analysis of the operation of chillers with external data sets, such as weather conditions to allow for more efficient use – results in energy savings of 10%. “This approach saved costs, reduced CO2 emissions, and provided a financial payback in less than one year,” Godemel said.Frédéric Godemel, Executive Vice President for Power Systems and Services, Schneider ElectricThe value of smart control in fab operations was also highlighted by Katharina Westrich, Global Vice President of Electronics, Semiconductors Simulation Digital Industries at Siemens. She described how Siemens makes digital twins of factories before they are built. “This is an approach that the semiconductor industry can also adopt,” Westrich said. “A digital twin enables more efficient allocation of resources to the fab and sub-fab, allowing simulation of fab operation and optimization of processes and resources.”Katharina Westrich, Global Vice President of Electronics, Semiconductors Simulation Digital Industries, SiemensThe semiconductor industry faces a future full of opportunity, yet also marked by significant obstacles—ones that delegates at the CxO Summit are now better equipped to tackle head-on.On behalf of SEMI, the SEMI Europe team would like to express appreciation to the industry leaders for sharing their visions and readiness to collaborate during the CxO Summit.SEMI ContactCassandra Melvin, Senior Director of Business Development and OperationsEmail: [email protected]

The silicon wafer market showed promising signs of recovery in Q2 2024, bouncing back after a prolonged downturn. The growth is fueled by seasonal factors and strong demand from investments in AI data centers, however, the consumer, automotive, and industrial segments are experiencing a slower pace of recovery. Historically, year-over-year (YoY) growth in semiconductor equipment investments tends to hit a low point before rebounding and typically contributing to an upward trend in wafer shipments. Figure 1 depicts this trend since 2001, with the only exceptions to wafer shipments following the rebound of fab equipment spending coming in the periods of the second and third quarters in 2002 and 2013, which are highlighted in gray. Figure 1* Notes 1) Data source: SEMI WWSEMS and SMG wafer shipments data 2) For semiconductor equipment spending, data from 2001 to 2024 is based on WWSEMS wafer processing equipment billing data 3) Equipment spending is updated through August 2024 This pattern underscores the crucial role of equipment investments in expanding production capacity and driving wafer demand. Following the rebound in equipment investment growth rates observed in 2024, projections indicate continued growth into 2025. This recovery in investments is expected to translate into increased wafer shipments, reinforcing a positive outlook for the silicon wafer market’s sustained growth.Additionally, the influence of DRAM Blended ASP (Average Selling Price) growth trends on wafer demand is significant. The historical data in Figure 2 shows that when DRAM ASP growth rates peak and then decline, wafer shipment growth tends to slow down after a lag. Figure 2* Remarks 1) Data source: SEMI SMG wafer shipments data and the Bank of Korea 2) DRAM ASP is updated through September 2024. With DRAM pricing potentially entering a downward trend in early 2025, this poses a key risk to the pace of the wafer market’s recovery. Looking ahead, wafer shipment growth is expected to vary by wafer type and diameter, with low to mid-double-digit growth projected for 2025, mid-to-high single-digit growth for 2026, and a notable slowdown in 2027. This forecast reflects evolving demand dynamics and ongoing market adjustments.In conclusion, the sustained recovery of the silicon wafer market hinges on a combination of increasing semiconductor equipment investments, the stabilization of raw material inventory levels among chipmakers, and careful monitoring of DRAM pricing trends. While the current upward trend in equipment investments is a positive driver for wafer shipments, the potential deceleration of DRAM Blended ASP growth poses a significant downside risk. If DRAM pricing exerts a sustained negative influence, it could shorten both the amplitude and duration of the current wafer market upcycle more than anticipated. This report not only examines these key investment and shipment dynamics but also provides an in-depth analysis of broader market trends, including supply-demand balances and pricing dynamics. By addressing these interconnected factors, it offers a comprehensive and forward-looking perspective on the long-term growth potential of the silicon wafer market.SEMI’s Silicon Wafer Market Monitor Report offers unique insights into global silicon wafer shipments, supply and demand dynamics, and average selling price (ASP) projections. This comprehensive quarterly report breaks down silicon shipments by region and wafer size, including 300mm, 200mm, and 150mm wafers, providing a detailed view of the market landscape.Semiconductor manufacturers, investors, and industry analysts rely on this report as an essential tool for making informed business decisions and exploring the latest data and trends shaping the future of the semiconductor industry.Download a sample of the Semiconductor Manufacturing Monitor report. For more information on the report or to subscribe, please contact the SEMI Market Intelligence Team at [email protected]. Details on SEMI market data are available at SEMI Market Data. Sungho Yoon is Principal Analyst on the SEMI Market Intelligence team.

SEMI Korea Members Day 2025 in September featured a wealth of insights on semiconductor industry market and technology trends. As the two-year semiconductor inventory correction eases, Soo-Kyoum Kim, vice president at International Data Corporation (IDC), provided a market update during his address to the event’s 400 attendees at the Suwon Convention Center. He highlighted that the semiconductor market is showing signs of gradual recovery, with growth predicted for the second half of 2024 and into 2025. This growth, he said, is being fueled by rising demand for artificial intelligence (AI) and high bandwidth memory (HBM). He projected that the total semiconductor market would grow to $779.8 billion in 2025, marking a 15.8% increase from this year's estimate of $673 billion. By next year, the memory market is expected to rise by 24%, largely driven by demand for AI. Although consumer demand will likely weaken due to a slowdown in the Chinese market, Kim shared that easing inventory adjustments will lead to a rebound during the second half of 2024, particularly in the growth of DRAM and NAND. Kim also predicted that the non-memory market, which reached $503.4 billion this year, will grow to $569.4 billion by 2025.Additionally, the compound annual growth rate (CAGR) for semiconductor network and data center sales is projected to be 26.4% and 16.2% by 2028, respectively. Kim explained that the strong demand for AI semiconductors in data centers and networks will help the semiconductor market maintain an 8% CAGR over the next five years, following the 2023 market adjustment.SEMI Korea Members Day HighlightsH.D. ChoThe AI-driven industrial transformation is demanding more advanced processes. To accommodate AI, the industry has shifted its focus away from miniaturization toward back-end processes. However, the challenges facing Korea's semiconductor industry have also intensified. Leading semiconductor research firms shared in-depth market forecasts and presented their latest semiconductor technology roadmaps, offering insights on business strategies for Korea’s semiconductor ecosystem.In his opening remarks, H.D. Cho, president of SEMI Korea, expressed deep gratitude for the exceptional resilience of SEMI Korea’s members, who continue to overcome roadblocks despite global uncertainties. He also highlighted the growth of SEMI Korea’s member companies, emphasizing their positive role in the global semiconductor supply chain, as well as SEMI's ongoing commitment in supporting their innovations.Call for Renewable Energy Policy Reform to Achieve Net ZeroBora Lee, leader of Solutions For Our Climate (SFOC), emphasized the strong correlation between the semiconductor industry and Korea's economic growth. Lee also outlined key factors contributing to the high costs that hinder renewable energy adoption in the semiconductor sector. "Korea's levelized cost of electricity (LCOE) for renewable energy is about 2-3 times higher than the global average," she said. "The establishment of a policy council involving semiconductor companies is a crucial step in developing cooperative strategies to promote the use of renewable energy." In addition, Lee stressed that collaboration among suppliers, consumers, and policymakers is necessary to address these barriers and accelerate the transition to renewable energy within the industry. AI is Reshaping the Global Memory MarketPeter Lee of CITI Group shared that the convergence of cloud and edge computing is helping support new demands from AI, the metaverse, and automotive applications. As a result, this will increase long-term demand for memory. "The growing demand for AI is diversifying the memory market," Lee said. "This includes products such as HBM, LLW, LPDDR5T, and CXL, all of which are expected to see increased adoption according to AI computing requirements."As the need for parallel processing in AI training and inference tasks grows, Lee predicted the demand for HBM3 and DDR5 will significantly rise. HBM's share of total DRAM revenue is expected to increase dramatically – from 11% in 2023, to 30% by 2027. Expected Growth of the GaN Power Semiconductor MarketHo-Young Cha, a professor at Hongik University and co-founder and CTO of ChipsK, highlighted that the GaN power semiconductor market is expected to see continuous growth due to its advantages over silicon-based devices. The expansion of GaN technology applications in various industries, including consumer electronics, automotive, and telecommunications, he said, will drive additional growth."The GaN power semiconductor market will grow from $180 million in 2022 to $2.04 billion by 2028," said Cha. Growth Outlook for the Semiconductor Equipment and Materials Market in 2025 Clark Tseng, director of the SEMI Market Intelligence Team, projected that the short-term outlook for the global semiconductor market will gradually recover due to improvements in end-demand for major electronic product sectors and surging demand for AI chips. "The equipment and materials markets are expected to show a slight improvement in 2024, with a strong recovery anticipated in 2025," Tseng stated. He noted that the equipment market would grow by approximately 3% in 2024 from $95 billion in 2023 and is expected to grow by 15% in 2025. Regarding wafer fab materials, the silicon wafer market is expected to decline from $14.1 billion in 2023 to $13.2 billion in 2024. However, recovery is anticipated to begin in the second half of 2024, with the market projected to reach a new record of $48 billion in 2025. For more insights on Korea and the industry, attend SEMICON Korea from February 19-21, 2025 at COEX Convention Exhibit Center. Visionaries and leaders will gather to discuss the latest developments, innovations, and business opportunities within the industry. As the region’s premier microelectronics event, SEMICON Korea 2025 is expected to host 70,000 attendees, 500 exhibitors, and 200 speakers. More event information, including registration details, will be available soon.Jaegwan Shim is Senior Specialist, Marketing at SEMI.

With economic forces, semiconductor industry markets, and growth drivers key themes at ISS 2024 last month, Françoise von Trapp of 3D InCites caught up with members of the SEMI Market Intelligence Team for a podcast to drill down into semiconductor industry trends in 2024.

Paul Cohen and Bob Smith of the Electronic System Design Alliance and SEMI senior director of product marketing David Ghodsizadeh joined Francoise von Trapp of 3D InCites for a podcast to discuss key takeaways from the Q4 2022 EDMD report.