Moore's Law

As monolithic scaling slows down, the semiconductor industry is increasingly relying on advanced packaging technologies to extend Moore’s law through heterogeneous integration. Higher on-package bandwidth, improved yield resiliency and the need to integrate diverse IP from multiple foundries are driving demand for advanced packaging technologies that address these issues but introduce challenges of their own such as efficient power delivery to all the different domains in a heterogeneous system. SEMI spoke with Kaladhar Radhakrishnan, Intel Fellow at Intel, about heterogeneous system integration trends and new developments in the semiconductor industry. Radhakrishnan shared his views ahead of his keynote at the SEMI Connecting Heterogeneous Systems Summit, 1-3 September 2021, an online event. Join the summit to meet experts from Intel and other key industry influencers. Registration is open. SEMI: What is driving the adoption of electronics and semiconductor devices nowadays and why is the development of new and innovative technologies important? Radhakrishnan: We are living in an increasingly data-driven world where devices have become an integral part of our lives. A recent study estimated that in the United States alone, 13.6 connected devices per capita consume an average of 300 gigabytes worth of data every month. In the workplace, COVID-19 has driven fundamental business changes that has sped up the adoption of digital technologies such as virtual conferencing, remote work, and e-commerce. Organizations are realizing that a high-quality video conference can be an adequate substitute for many in-person meetings. As a result, businesses are accelerating the digital transformation in order to adapt and thrive in this new environment. Five decades of sustained exponential growth in semiconductor performance has conditioned the average digital consumer to expect more from their devices. However, there are some headwinds ahead as traditional scaling slows down and power density rises. Because consumers and businesses are now generating data at a faster rate than they can consume it, technologists need to scale compute, storage, and bandwidth even faster to keep pace. Without investments in research and development of new and innovative technologies to address these challenges, the full potential of this data will go unrealized. SEMI: What forces are heightening the importance of heterogeneous system integration? What are the implications for increased on-package bandwidth, improved yield resiliency and the need to integrate diverse IP from multiple foundries? Radhakrishnan: The semiconductor industry increased transistor density and scaled performance through classical Dennard scaling until the turn of the century. By then, the gate oxide thickness had scaled down to atomic dimensions and the exponential increase in sub-threshold leakage signaled the end of scaling through traditional methods. Since that time, the chip industry has been relying on innovations in transistor materials and structures such as high-k metal gate, strained silicon, and FinFETs to keep pace with Moore’s law. However, this alone will not be sufficient to continue scaling and the industry needs to explore other vectors to augment improvements in transistor technology. Heterogeneous integration through advanced packaging is one key technology that can help drive these gains. Technologies like Foveros can enable device density scaling by creating a 3D stack of multiple die using high-density interconnects. Heterogeneous integration enables chipmakers to move from a monolithic system designed on a single large chip to a heterogeneous system comprised of a number of smaller chiplets. The main benefit of using smaller chiplets is that they improve yield and enable application based customization of the foundry processes. However, if the disaggregation to smaller chiplets is not accompanied by an increase in on-package bandwidth, the power and performance penalties associated with chiplet-to-chiplet communication will hobble system performance. This is why advanced packaging technologies that improve die-to-die communication are key enablers for heterogeneous integration. SEMI: What are some of the key technology challenges in developing heterogeneous systems? Radhakrishnan: The obvious challenge that most people focus on is the need for improved on-package bandwidth. However, as we rely on 3D stacking to continue device scaling at the package level, it is important to comprehend power delivery and thermal challenges as well. Power to the top die has to be delivered through TSVs on the bottom die, which not only adds resistance but also reduces the useful area available on the bottom die. This problem is further exacerbated when we stack more than two die. Excessive noise on the power delivery network can cause timing issues that limit the maximum operating frequency of the transistor. Similarly, when we stack multiple die, we must take into account associated thermal challenges. For example, each interface of the multi-die stack adds thermal resistance, which makes it harder to cool the chips at the bottom. SEMI: What are some of the key global market trends that driving demand for heterogeneous and system-level integration? Radhakrishnan: The number of artificial intelligence (AI) and machine learning applications have grown dramatically due to their ability to solve highly complex problems across a wide range of segments. AI and machine learning models require more memory bandwidth and compute capabilities that are difficult to achieve without some form of heterogeneous integration. Another market trend driving demand for heterogeneous integration is the increasing reliance on custom hardware accelerators. To combat the slowdown in frequency scaling and single-core performance, we have moved to multi-core architectures by tackling the inherent parallelism in our workloads. However, Amdahl’s law tells us that such an approach will hit a bottleneck when we reach the limits of the serial portion of the workload. As these constraints slow the performance of general-purpose processors, the reliance on custom hardware accelerators to boost performance for specific workloads is growing. Heterogeneous integration at the system level with a combination of CPUs, GPUs, FPGAs and other accelerators can optimize system power and performance. SEMI: What solutions is Intel developing to address these market needs? Radhakrishnan: Intel is actively involved in the development of the industry ecosystem for heterogeneous integration. We have developed a number of innovative advanced packaging solutions such as the EMIB and Foveros that are used in products today. Intel is also developing the next generation of advanced packaging technologies, Foveros Omni and Foveros Direct, which will dramatically scale the IO density by using direct Cu-Cu bonding technology. Foveros Omni is a crucial building block technology to enable high-voltage power conversion on the package for efficient power delivery. Intel is uniquely positioned to predict the design needs for future systems and deploy its resources to develop the technology building blocks needed to continue performance scaling. Our IDM 2.0 strategy enables us to leverage our leadership in packaging technologies to design the best products and use the best IP to deliver leading products across a broad range of categories. SEMI: What do you expect from your participation at SEMI Connecting Heterogeneous Systems Summit? Radhakrishnan: I’m hoping to shed some light on some of the new technologies we have been developing at Intel to enable heterogeneous system integration. I also want to bring awareness to the power-related challenges we are facing with heterogeneous systems. I also look forward to listening to what other industry leaders have to say on the topic. Kaladhar Radhakrishnan is an Intel Fellow and a Power Delivery Architect with the Technology Development group at Intel. He plays a significant role in shaping and driving power delivery technologies for Intel microprocessors. His areas of expertise include integrated voltage regulators, advanced packaging and passives technologies. Kaladhar is a two-time recipient of the Intel Achievement Award, the highest Intel honor an individual or small team can receive. He has authored four book chapters, over 40 technical papers in peer-reviewed journals, and has been awarded 35 U.S. patents. He has also served as an adjunct professor at Arizona State University. Kaladhar joined Intel in 2000 soon after receiving his Ph.D. in Electrical Engineering from the University of Illinois at Urbana-Champaign. Serena Brischetto is senior manager of marketing and communications at SEMI Europe.

This article is the fourth in a series highlighting the vital importance of SEMI Standards to commemorate the publication of the 1000th SEMI Standard in July 2019. Find the entire series here.Computer prices have plunged over the years even as desktop and laptop PC performance has skyrocketed thanks to the semiconductor industry, giving users much more bang for their buck. The chip industry stands in a stark contrast to healthcare and education with their exponentially rising costs.What distinguishes the semiconductor industry from healthcare and education in the capacity to deliver so much for so much less over time? After all, even in other parts of the technology sector that are heavily regulated, such as cable television, we have not witnessed the same price decreases as in microelectronics.Some pundits claim that the difference among sectors is tied to their degree of regulation. Does greater regulation somehow degrade product value? The reality is far more nuanced. But one thing is clear: Smart self-regulation (i.e. standards) in the semiconductor industry has contributed mightily to its success.The recipe for success has been simple. Standards have been rocket fuel for competition, which in turn has sparked innovation, driving down device prices while boosting performance. Computer prices fell dramatically between 1997-2015 while the cost of cable TV and internet services rose. Myth of unregulated competitionA semiconductor fab might actually be the most regulated place on earth. Fabs hew to a much higher standard of air quality and cleanliness than even uber-sterile hospital operating rooms. Manufacturing processes are voluntarily regulated not to millimeters, but to nanometers. While some standards are proprietary with limited reach, others span the supply chain. Regulation has worked so well in this sector that the semiconductor industry isn’t moving toward less standardization. It’s moving toward more. Secret is smart standards The gap between regulation and self-regulation is more like a chasm. We typically view regulation as a series of top-down directives that more often focus on the interests of the producer than the consumer. Healthcare regulation, for example, may improve quality of care, but it’s often insurers, big pharma and hospitals that benefit most from regulation, rather than consumers.The semiconductor industry, on the other hand, uses self-regulation to improve business operations and make better products for consumers. Falling prices and rising performance are natural byproducts.Semiconductor industry self-regulation is an ecosystem-wide effort, where input isn’t just top-down, but also bottom-up or even side-to-side. The first SEMI Standard, which specified wafer sizes, exemplifies this approach.The SEMI Standards Committee formed in 1973 to address silicon wafer dimensional specifications. At the time, wafer specifications proliferated. Numbering more than 2,000, the various specifications led to major inefficiencies just when the industry was just getting underway. Wafer suppliers banded together under SEMI to solve this problem and rapidly developed consensus specifications for 2- and 3-inch wafers. By the mid-1970s, over 80% of wafers conformed to these new standards.Standardized wafer sizes freed equipment companies to focus on innovations that reduced cost and increased performance. It also allowed manufacturers to focus on product differentiation without having to worry about device fabrication process and cost. Since that first SEMI Standard made possible the modern semiconductor equipment industry, original equipment manufacturers (OEMs) have competed to deliver amazing innovations. For example, lithography systems routinely use light to design chips with feature sizes smaller than the wavelength of light.SEMI’s 1000th standard on energetic materials demonstrates how smart standards are also pragmatic. This standard is not about banning materials or assigning blame when things go awry. It is about creating practical guidelines that companies will follow, enabling them to realize greater innovation. Guidelines that reduce accidents and risks will spur more, not less, energetic materials’ exploration. Industry suppliers will be the big winners.The 1st to the 1000th SEMI standard all represent examples of cooperation making more sense than competition.Standards for the real worldCreating a business-friendly standard that still gets the job done is a process. As SEMI Standards Task Force and Committee members, materials, equipment and manufacturing companies take part in defining best practice guidelines that support safe and practical use of materials and equipment. Task force and committee members assign particular responsibilities and associated costs to the most logical segments of the supply chain. They also develop information-sharing practices around competitive process recipes and purity standards.Andy McIntyre, CIH, a member of the energetic materials task force and an executive vice president and managing principal at BSI EHS Services and Solutions, summarized what makes SEMI standards smart.“SEMI standards are pragmatic,” said McIntyre. “They take into account the need for implementation in a real-world business environment. They embrace an engineering approach to problem-solving to create practical solutions, and they define specifications and performance goals in ways that allow engineers — in collaboration with EHS professionals — to identify practical solutions for reducing risk in R D, pilot line and manufacturing operations.“SEMI standards employ a holistic process that considers all the important points of view throughout the supply chain, from materials selection, installation, use, recycling and/or disposal,” said McIntyre. “The breadth of SEMI EHS Guidelines, for example, is also very comprehensive as the SEMI EHS Committee and task forces work to ensure that standards keep pace with dynamic technology developments. Energetic materials is a prime example where the industry recognized the need for a new safety guideline to document safe usage of pyrophoric, water-reactive and unstable reactive materials, which have become increasingly important in semiconductor and advanced materials R D and manufacturing.”This is the real secret to the success of the semiconductor industry. Smart self-regulation allows industry players to cooperate in the development and implementation of standards that are pragmatic, comprehensive and dynamic. Participants in SEMI Standards have a voice in the semiconductor industry because they are the voice of the semiconductor industry.While innovation in semiconductors may not always keep pace with Moore’s Law, we can depend on one truth: As long as collaboration and cooperation are the rule and not the exception, we will continue to advance technology in amazing and unprecedented ways. You, me and all other consumers will continue to reap the rewards of innovation. Use your voice to affect standardization in and around the semiconductor industry. Learn about SEMI Standards – and become part of the solution.Heidi Hoffman is senior director of technology communities marketing at SEMI. Hoffman and her team shine a spotlight on the work of the more than 20 technology communities under the SEMI electronics manufacturing supply chain collaboration platform. Actively engaging community members in marketing programs that showcase their unique value, Hoffman’s team helps companies to grow and prosper through the power of connection, collaboration and innovation.

AI vs. energy. Quantum for everyone. Biofabrication of human organs on a mass scale. Slowing advancements from Moore’s law.In the midst of a market dip, optimism reigned as keynote and AI Design Forum speakers addressed both looming challenges and explosive market opportunities during July 9-10 presentations at SEMICON West 2019 in San Francisco. SEMICON West again proved to be a magnet for visionaries who laid out the path to electronics innovation over the coming years.“The current business environment demands that the industry looks ahead toward issues that need attention sooner, not later – especially since we are approaching a once-in-a-generation inflection point that has the potential to be a $10 trillion opportunity,” observed SEMI Americas president Dave Anderson.Market forecasts punctuate the point: The microelectronics supply chain is on the verge of what has the potential to be the longest-lived electronics era.“Inflection points like this are rare, but not unprecedented,” Anderson added, citing 2007 as the inflection of the growth curve from new technologies that led to last year’s historic high semiconductor sales.SEMICON West squarely focused on the future, with a number of industry leaders noting that chip, tool and materials makers need to look beyond their immediate suppliers and customers in developing strategic partnerships. Dr. Cliff Young, data scientist with the Google Brain Team, for one, invited semiconductor and equipment firms to explore chip codesigning opportunities with his Google.The recently formed Quantum Economic Development Consortium – and its 50 members including Boeing, Google and IBM – debuted roadmapping activities devoted to the pursuit of U.S. leadership in the rapidly emerging global quantum computing industry. IBM’s Jeff Welser showcased the IBM Q Computer model built upon decades of semiconductor industry advances. Markets that could see staggering leaps from a quantum computational capacity include automotive, medical, financial and energy. Today, anyone can dabble with the future quantum computing capabilities by connecting online with IBM’s 16-qubit quantum computer. Dr. Aart de Geus, chairman and co-CEO of Synopsys, suggested that software and other programming tends to develop more quickly if it is open sourced. He recommends an open source model that allows semiconductor and equipment companies to work together in the cloud to speed chip development.Nate Baxter, TEL development and production group general manager, advocated sharing big data with competitors in pre-competitive spaces to ensure data quality, improve measurement and solve problems faster. The key is security. “Yes, we can share data while protecting it,” he said. “We’re quickly seeing opportunities that we didn’t know existed.”Gary Dickerson, Applied Materials president and CEO, said that embedding artificial intelligence (AI) in chips will drive significant long-term industry growth by processing far more big data computations much faster than humans can.That is, if there is enough electricity. Almost invisibly, AI-enabled machines already are crunching massive amounts of data while gulping power in the process. As AI use rapidly expands, current power grids will be stressed as never before. Dickerson added that speed of innovation, societal acceptance, security and safety will guide how well and quickly AI is adopted. A potential hurdle, however, is sustainability. He warned power constraints could be “very high” and a “barrier to AI adoption if we don’t drive innovation” in substantially reducing the power draw of power-hungry AI chips.Of the five members of a venture capitalist panel, four agreed that Moore’s Law as we knew it is dead. The promising news is that the average age of a first-time mobile phone user is 10, more than 40 percent of the world population is now under 25 and about to wield considerable market influence, and 5G is on the cusp of helping connect trillions of devices. AMD CEO Lisa Su noted “there’s a tremendous amount of innovation yet to come” from microarchitectural advances, chiplets and die stacking, and heterogenous platforms.And there’s nothing more innovative – or intriguing – than regenerating human organs in mass volume. Legendary inventor Dean Kamen laid out his well-funded plans to biofabricate the viscera of human existence but warned of two crucial missing pieces – scale and talent. “I’m here at SEMICON West to beg for high-tech’s help in getting artificial human organs out of labs and ramped up for volume manufacturing and widespread distribution,” Kamen said during his keynote. “The basic science already exists, but researchers can’t bring it to scale like Silicon Valley can.”The talent Kamen needs to fulfill his dream will come from the pool of skilled workers the microelectronics industry is feverishly working to recruit to make good on its own ambitions. As if on cue, SEMI endorsed Kamen’s FIRST Global program, establishing a united effort to encourage young people worldwide to pursue engineering careers. “Together, we can better help provide a path to success for generations to come,” SEMI’s Anderson said.Scott Stevens, SEMI

Materials innovation has always been vital to the semiconductor industry. In the past, it was high-κ gate dielectrics. Today, Cobalt is seen as a replacement for Tungsten in middle-of-line (MOL) contacts.What materials innovation will the future bring?A likely answer is Graphene, the wonder material discovered in 2004.Graphene is one atomic layer of carbon, the thinnest and strongest material that has ever existed. It is 200 times stronger than steel and the lightest material known to man (1 square meter weighing around 0.77 mg). It is an excellent electrical and thermal conductor at room temperature with an electron mobility of ~ 200,000cm2.V-1.s-1. At one atomic layer, graphene is flexible and transparent. Other notable properties of Graphene are its uniform absorption of light across the visible and near infrared spectrum and its applicability towards spintronics-based devices.Graphene and Moore’s LawMoore’s Law scaling can be broken down into 4 key areas: Lithography FET Advanced Packaging (2.5D and 3D IC) Interconnect Material Solutions for upcoming nodes are starting to emerge in the first two areas (EUV and Nanowire- or Nanosheet-based FET respectively). Graphene play an important role in the latter two areas. For advanced packaging, Graphene can be used as a heat spreader (to lower overall thermal resistance), or as an EM shield (to lower crosstalk) as part of a 3D IC package.Active Graphene device layers can potentially be stacked on top of each other using a low-temperature transfer process ( 400°C) to allow for a dense heterogeneous “memory near compute” configuration. This is an area DARPA is actively researching as part of its new $1.5 billion Electronics Resurgence Initiative.Regarding interconnects, Copper interconnects are running out of steam and becoming a major IC bottleneck (projected 40% total delay for 7 nm node). Graphene’s high electron mobility and thermal conductivity make it an attractive interconnect material for MOL and back-end-of-line (BEOL), especially at line widths 30 nm.Graphene Device ApplicationsGraphene-based semiconductor applications are already starting to hit the market. A fully integrated optical transceiver (with a Graphene modulator and photodetector) operating at 25 Gb/s/channel was on display at the recent Mobile World Congress in Barcelona. San Diego-based Nanomedical Diagnostics is selling a medical device that uses a Graphene biosensor. Europe-based Emberion is building Graphene optoelectronic sensors that might find a home in LIDAR applications, where there is currently a focus on improving sensing in low-light conditions.What will the overall Graphene roadmap in the semiconductor industry look like? The history of ion implantation serves as a good example of how a fundamental scientific discovery moves from the lab to the foundry floor.The dominant view in the semiconductor industry at the time was that ion implantation would not work in practice (vs. thermal diffusion) and that, if it did, it would only marginally improve the manufacturing yields of existing products. There was nothing obvious about the transfer of ion bombardment techniques from nuclear physics research to semiconductor production.Varian (led by British physicist Peter Rose) built a new, advanced ion implant tool that Mostek (DRAM manufacturer based in Texas) was able to use to create MOS ICs with clear competitive advantages. The successful collaboration between Varian and Mostek was the turning point in the development of ion implantation as a major semiconductor manufacturing process. Over the next few years, semiconductor firms used ion implantation in a growing number of process steps and, by the late 1970s, it became one of the main processes used in semiconductor manufacturing.Likewise, the Graphene world needs to work closely with the semiconductor industry to develop the tools and techniques required to solve fundamental issues around Graphene growth (good uniformity over large area, low defect density) and Graphene transfer (high throughput, CMOS compatible). It is only then will we fully realize a future that includes 2D materials.The first step in this process is cross-industry education and initiating the dialogue between semiconductor industry and graphene companies. The National Graphene Association will be hosting the largest gathering of graphene companies and commercial stakeholders at the Global Graphene Expo Conference, October 15-17, 2018, in Austin, Texas.Learn more about graphene at the upcoming Global Graphene Expo Conference with dedicated panels of experts and investors, and roundtable discussions on how Graphene will impact the semiconductor industry. The event promo code is SEMINGA. About the AuthorAnand Chamarthy is the CEO and Co-Founder of Lab 91, an Austin-based startup that is working towards Graphene/CMOS integration at the foundry level. Anand can be reached at [email protected]. About the National Graphene AssociationThe National Graphene Association is the main organization and body in the U.S. promoting and advocating for commercialization of graphene and addressing critical issues such as standards and policy development.